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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: USB2 ChipIdea USB controller maintainers: - Xu Yang <xu.yang_2@nxp.com> - Peng Fan <peng.fan@nxp.com> properties: compatible: oneOf: - enum: - chipidea,usb2 - lsi,zevio-usb - nvidia,tegra20-ehci - nvidia,tegra20-udc - nvidia,tegra30-ehci - nvidia,tegra30-udc - nvidia,tegra114-udc - nvidia,tegra124-udc - qcom,ci-hdrc - items: - enum: - nvidia,tegra114-ehci - nvidia,tegra124-ehci - nvidia,tegra210-ehci - const: nvidia,tegra30-ehci - items: - enum: - fsl,imx23-usb - fsl,imx25-usb - fsl,imx28-usb - fsl,imx35-usb - fsl,imx50-usb - fsl,imx51-usb - fsl,imx53-usb - fsl,imx6q-usb - fsl,imx6sl-usb - fsl,imx6sx-usb - fsl,imx6ul-usb - fsl,imx7d-usb - fsl,vf610-usb - const: fsl,imx27-usb - items: - enum: - fsl,imx8dxl-usb - fsl,imx8ulp-usb - const: fsl,imx7ulp-usb - const: fsl,imx6ul-usb - items: - enum: - fsl,imx8mm-usb - fsl,imx8mn-usb - const: fsl,imx7d-usb - const: fsl,imx27-usb - items: - enum: - fsl,imx6sll-usb - fsl,imx7ulp-usb - const: fsl,imx6ul-usb - const: fsl,imx27-usb - items: - const: xlnx,zynq-usb-2.20a - const: chipidea,usb2 reg: minItems: 1 maxItems: 2 interrupts: minItems: 1 maxItems: 2 clocks: minItems: 1 maxItems: 3 clock-names: minItems: 1 maxItems: 3 dr_mode: true power-domains: maxItems: 1 resets: maxItems: 1 reset-names: maxItems: 1 "#reset-cells": const: 1 phy_type: true itc-setting: description: interrupt threshold control register control, the setting should be aligned with ITC bits at register USBCMD. $ref: /schemas/types.yaml#/definitions/uint32 ahb-burst-config: description: it is vendor dependent, the required value should be aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is used to change AHB burst configuration, check the chipidea spec for meaning of each value. If this property is not existed, it will use the reset value. $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0x0 maximum: 0x7 tx-burst-size-dword: description: it is vendor dependent, the tx burst size in dword (4 bytes), This register represents the maximum length of a the burst in 32-bit words while moving data from system memory to the USB bus, the value of this property will only take effect if property "ahb-burst-config" is set to 0, if this property is missing the reset default of the hardware implementation will be used. $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0x0 maximum: 0x20 rx-burst-size-dword: description: it is vendor dependent, the rx burst size in dword (4 bytes), This register represents the maximum length of a the burst in 32-bit words while moving data from the USB bus to system memory, the value of this property will only take effect if property "ahb-burst-config" is set to 0, if this property is missing the reset default of the hardware implementation will be used. $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0x0 maximum: 0x20 extcon: description: Phandles to external connector devices. First phandle should point to external connector, which provide "USB" cable events, the second should point to external connector device, which provide "USB-HOST" cable events. If one of the external connector devices is not required, empty <0> phandle should be specified. $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 items: - description: vbus extcon - description: id extcon phy-clkgate-delay-us: description: The delay time (us) between putting the PHY into low power mode and gating the PHY clock. non-zero-ttctrl-ttha: description: After setting this property, the value of register ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default value. It needs to be very carefully for setting this property, it is recommended that consult with your IC engineer before setting this value. On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this property only affects siTD. If this property is not set, the max packet size is 1023 bytes, and if the total of packet size for previous transactions are more than 256 bytes, it can't accept any transactions within this frame. The use case is single transaction, but higher frame rate. If this property is set, the max packet size is 188 bytes, it can handle more transactions than above case, it can accept transactions until it considers the left room size within frame is less than 188 bytes, software needs to make sure it does not send more than 90% maximum_periodic_data_per_frame. The use case is multiple transactions, but less frame rate. type: boolean mux-controls: description: The mux control for toggling host/device output of this controller. It's expected that a mux state of 0 indicates device mode and a mux state of 1 indicates host mode. maxItems: 1 mux-control-names: const: usb_switch operating-points-v2: description: A phandle to the OPP table containing the performance states. $ref: /schemas/types.yaml#/definitions/phandle pinctrl-names: description: Names for optional pin modes in "default", "host", "device". In case of HSIC-mode, "idle" and "active" pin modes are mandatory. In this case, the "idle" state needs to pull down the data and strobe pin and the "active" state needs to pull up the strobe pin. oneOf: - items: - const: idle - const: active - items: - const: default - enum: - host - device - items: - const: default pinctrl-0: maxItems: 1 pinctrl-1: maxItems: 1 phys: maxItems: 1 phy-names: const: usb-phy phy-select: description: Phandler of TCSR node with two argument that indicate register offset, and phy index $ref: /schemas/types.yaml#/definitions/phandle-array items: - description: phandle to TCSR node - description: register offset - description: phy index vbus-supply: description: reference to the VBUS regulator. fsl,usbmisc: description: Phandler of non-core register device, with one argument that indicate usb controller index $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - description: phandle to usbmisc node - description: index of usb controller fsl,anatop: description: phandle for the anatop node. $ref: /schemas/types.yaml#/definitions/phandle disable-over-current: type: boolean description: disable over current detect over-current-active-low: type: boolean description: over current signal polarity is active low over-current-active-high: type: boolean description: Over current signal polarity is active high. It's recommended to specify the over current polarity. power-active-high: type: boolean description: power signal polarity is active high external-vbus-divider: type: boolean description: enables off-chip resistor divider for Vbus samsung,picophy-pre-emp-curr-control: description: HS Transmitter Pre-Emphasis Current Control. This signal controls the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN pins after a J-to-K or K-to-J transition. The range is from 0x0 to 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0 bits of USBNC_n_PHY_CFG1. $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0x0 maximum: 0x3 samsung,picophy-dc-vol-level-adjust: description: HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC level voltage. The range is from 0x0 to 0xf, the default value is 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1. $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0x0 maximum: 0xf fsl,picophy-rise-fall-time-adjust: description: HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times of the high-speed transmitter waveform. It has no unit. The rise/fall time will be increased or decreased by a certain percentage relative to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%) Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1. $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 3 default: 1 usb-phy: description: phandle for the PHY device. Use "phys" instead. $ref: /schemas/types.yaml#/definitions/phandle deprecated: true fsl,usbphy: description: phandle of usb phy that connects to the port. Use "phys" instead. $ref: /schemas/types.yaml#/definitions/phandle deprecated: true nvidia,phy: description: phandle of usb phy that connects to the port. Use "phys" instead. $ref: /schemas/types.yaml#/definitions/phandle deprecated: true nvidia,needs-double-reset: description: Indicates double reset or not. type: boolean deprecated: true port: description: Any connector to the data bus of this controller should be modelled using the OF graph bindings specified, if the "usb-role-switch" property is used. $ref: /schemas/graph.yaml#/properties/port reset-gpios: maxItems: 1 ulpi: type: object additionalProperties: false patternProperties: "^phy(-[0-9])?$": description: The phy child node for Qcom chips. type: object $ref: /schemas/phy/qcom,usb-hs-phy.yaml dependencies: port: [ usb-role-switch ] mux-controls: [ mux-control-names ] required: - compatible - reg - interrupts allOf: - $ref: usb-hcd.yaml# - $ref: usb-drd.yaml# - if: properties: phy_type: const: hsic required: - phy_type then: properties: pinctrl-names: items: - const: idle - const: active else: properties: pinctrl-names: minItems: 1 maxItems: 2 oneOf: - items: - const: default - enum: - host - device - items: - const: default - if: properties: compatible: contains: enum: - chipidea,usb2 - lsi,zevio-usb - nvidia,tegra20-udc - nvidia,tegra30-udc - nvidia,tegra114-udc - nvidia,tegra124-udc - qcom,ci-hdrc - xlnx,zynq-usb-2.20a then: properties: fsl,usbmisc: false disable-over-current: false over-current-active-low: false over-current-active-high: false power-active-high: false external-vbus-divider: false samsung,picophy-pre-emp-curr-control: false samsung,picophy-dc-vol-level-adjust: false unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/berlin2.h> usb@f7ed0000 { compatible = "chipidea,usb2"; reg = <0xf7ed0000 0x10000>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; clocks = <&chip CLKID_USB0>; phys = <&usb_phy0>; phy-names = "usb-phy"; vbus-supply = <®_usb0_vbus>; itc-setting = <0x4>; /* 4 micro-frames */ /* Incremental burst of unspecified length */ ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; /* 64 bytes */ rx-burst-size-dword = <0x10>; extcon = <0>, <&usb_id>; phy-clkgate-delay-us = <400>; mux-controls = <&usb_switch>; mux-control-names = "usb_switch"; }; # Example for HSIC: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/imx6qdl-clock.h> usb@2184400 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184400 0x200>; interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_USBOH3>; fsl,usbphy = <&usbphynop1>; fsl,usbmisc = <&usbmisc 2>; phy_type = "hsic"; dr_mode = "host"; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; pinctrl-names = "idle", "active"; pinctrl-0 = <&pinctrl_usbh2_idle>; pinctrl-1 = <&pinctrl_usbh2_active>; #address-cells = <1>; #size-cells = <0>; ethernet@1 { compatible = "usb424,9730"; reg = <1>; }; }; ... |