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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 | // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2016, NVIDIA Corporation */ #include <linux/clk.h> #include <linux/module.h> #include <linux/of_device.h> #include <linux/reset.h> #include <linux/usb/chipidea.h> #include "ci.h" struct tegra_udc { struct ci_hdrc_platform_data data; struct platform_device *dev; struct usb_phy *phy; struct clk *clk; }; struct tegra_udc_soc_info { unsigned long flags; }; static const struct tegra_udc_soc_info tegra_udc_soc_info = { .flags = CI_HDRC_REQUIRES_ALIGNED_DMA, }; static const struct of_device_id tegra_udc_of_match[] = { { .compatible = "nvidia,tegra20-udc", .data = &tegra_udc_soc_info, }, { .compatible = "nvidia,tegra30-udc", .data = &tegra_udc_soc_info, }, { .compatible = "nvidia,tegra114-udc", .data = &tegra_udc_soc_info, }, { .compatible = "nvidia,tegra124-udc", .data = &tegra_udc_soc_info, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, tegra_udc_of_match); static int tegra_udc_probe(struct platform_device *pdev) { const struct tegra_udc_soc_info *soc; struct tegra_udc *udc; int err; udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL); if (!udc) return -ENOMEM; soc = of_device_get_match_data(&pdev->dev); if (!soc) { dev_err(&pdev->dev, "failed to match OF data\n"); return -EINVAL; } udc->phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0); if (IS_ERR(udc->phy)) { err = PTR_ERR(udc->phy); dev_err(&pdev->dev, "failed to get PHY: %d\n", err); return err; } udc->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(udc->clk)) { err = PTR_ERR(udc->clk); dev_err(&pdev->dev, "failed to get clock: %d\n", err); return err; } err = clk_prepare_enable(udc->clk); if (err < 0) { dev_err(&pdev->dev, "failed to enable clock: %d\n", err); return err; } /* setup and register ChipIdea HDRC device */ udc->data.name = "tegra-udc"; udc->data.flags = soc->flags; udc->data.usb_phy = udc->phy; udc->data.capoffset = DEF_CAPOFFSET; udc->dev = ci_hdrc_add_device(&pdev->dev, pdev->resource, pdev->num_resources, &udc->data); if (IS_ERR(udc->dev)) { err = PTR_ERR(udc->dev); dev_err(&pdev->dev, "failed to add HDRC device: %d\n", err); goto fail_power_off; } platform_set_drvdata(pdev, udc); return 0; fail_power_off: clk_disable_unprepare(udc->clk); return err; } static int tegra_udc_remove(struct platform_device *pdev) { struct tegra_udc *udc = platform_get_drvdata(pdev); ci_hdrc_remove_device(udc->dev); clk_disable_unprepare(udc->clk); return 0; } static struct platform_driver tegra_udc_driver = { .driver = { .name = "tegra-udc", .of_match_table = tegra_udc_of_match, }, .probe = tegra_udc_probe, .remove = tegra_udc_remove, }; module_platform_driver(tegra_udc_driver); MODULE_DESCRIPTION("NVIDIA Tegra USB device mode driver"); MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); MODULE_ALIAS("platform:tegra-udc"); MODULE_LICENSE("GPL v2"); |