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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 | /* * DTS file for AMD Seattle SoC * * Copyright (C) 2014 Advanced Micro Devices, Inc. */ / { compatible = "amd,seattle"; interrupt-parent = <&gic0>; #address-cells = <2>; #size-cells = <2>; gic0: interrupt-controller@e1101000 { compatible = "arm,gic-400", "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <3>; #address-cells = <2>; #size-cells = <2>; reg = <0x0 0xe1110000 0 0x1000>, <0x0 0xe112f000 0 0x2000>, <0x0 0xe1140000 0 0x2000>, <0x0 0xe1160000 0 0x2000>; interrupts = <1 9 0xf04>; ranges = <0 0 0 0xe1100000 0 0x100000>; v2m0: v2m@e0080000 { compatible = "arm,gic-v2m-frame"; msi-controller; reg = <0x0 0x00080000 0 0x1000>; }; }; timer { compatible = "arm,armv8-timer"; interrupts = <1 13 0xff04>, <1 14 0xff04>, <1 11 0xff04>, <1 10 0xff04>; }; pmu { compatible = "arm,armv8-pmuv3"; interrupts = <0 7 4>, <0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>, <0 12 4>, <0 13 4>, <0 14 4>; }; smb0: smb { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; /* * dma-ranges is 40-bit address space containing: * - GICv2m MSI register is at 0xe0080000 * - DRAM range [0x8000000000 to 0xffffffffff] */ dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; /include/ "amd-seattle-clks.dtsi" sata0: sata@e0300000 { compatible = "snps,dwc-ahci"; reg = <0 0xe0300000 0 0xf0000>; interrupts = <0 355 4>; clocks = <&sataclk_333mhz>; dma-coherent; }; /* This is for Rev B only */ sata1: sata@e0d00000 { status = "disabled"; compatible = "snps,dwc-ahci"; reg = <0 0xe0d00000 0 0xf0000>; interrupts = <0 354 4>; clocks = <&sataclk_333mhz>; dma-coherent; }; i2c0: i2c@e1000000 { status = "disabled"; compatible = "snps,designware-i2c"; reg = <0 0xe1000000 0 0x1000>; interrupts = <0 357 4>; clocks = <&miscclk_250mhz>; }; i2c1: i2c@e0050000 { status = "disabled"; compatible = "snps,designware-i2c"; reg = <0 0xe0050000 0 0x1000>; interrupts = <0 340 4>; clocks = <&miscclk_250mhz>; }; serial0: serial@e1010000 { compatible = "arm,pl011", "arm,primecell"; reg = <0 0xe1010000 0 0x1000>; interrupts = <0 328 4>; clocks = <&uartspiclk_100mhz>, <&uartspiclk_100mhz>; clock-names = "uartclk", "apb_pclk"; }; spi0: ssp@e1020000 { status = "disabled"; compatible = "arm,pl022", "arm,primecell"; reg = <0 0xe1020000 0 0x1000>; spi-controller; interrupts = <0 330 4>; clocks = <&uartspiclk_100mhz>; clock-names = "apb_pclk"; }; spi1: ssp@e1030000 { status = "disabled"; compatible = "arm,pl022", "arm,primecell"; reg = <0 0xe1030000 0 0x1000>; spi-controller; interrupts = <0 329 4>; clocks = <&uartspiclk_100mhz>; clock-names = "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; }; gpio0: gpio@e1040000 { /* Not available to OS for B0 */ status = "disabled"; compatible = "arm,pl061", "arm,primecell"; #gpio-cells = <2>; reg = <0 0xe1040000 0 0x1000>; gpio-controller; interrupts = <0 359 4>; interrupt-controller; #interrupt-cells = <2>; clocks = <&miscclk_250mhz>; clock-names = "apb_pclk"; }; gpio1: gpio@e1050000 { /* [0:7] */ status = "disabled"; compatible = "arm,pl061", "arm,primecell"; #gpio-cells = <2>; reg = <0 0xe1050000 0 0x1000>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; interrupts = <0 358 4>; clocks = <&miscclk_250mhz>; clock-names = "apb_pclk"; }; gpio2: gpio@e0020000 { /* [8:15] */ status = "disabled"; compatible = "arm,pl061", "arm,primecell"; #gpio-cells = <2>; reg = <0 0xe0020000 0 0x1000>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; interrupts = <0 366 4>; clocks = <&miscclk_250mhz>; clock-names = "apb_pclk"; }; gpio3: gpio@e0030000 { /* [16:23] */ status = "disabled"; compatible = "arm,pl061", "arm,primecell"; #gpio-cells = <2>; reg = <0 0xe0030000 0 0x1000>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; interrupts = <0 365 4>; clocks = <&miscclk_250mhz>; clock-names = "apb_pclk"; }; gpio4: gpio@e0080000 { /* [24] */ status = "disabled"; compatible = "arm,pl061", "arm,primecell"; #gpio-cells = <2>; reg = <0 0xe0080000 0 0x1000>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; interrupts = <0 361 4>; clocks = <&miscclk_250mhz>; clock-names = "apb_pclk"; }; ccp0: ccp@e0100000 { status = "disabled"; compatible = "amd,ccp-seattle-v1a"; reg = <0 0xe0100000 0 0x10000>; interrupts = <0 3 4>; dma-coherent; }; pcie0: pcie@f0000000 { compatible = "pci-host-ecam-generic"; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; device_type = "pci"; bus-range = <0 0x7f>; msi-parent = <&v2m0>; reg = <0 0xf0000000 0 0x10000000>; interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = <0x1000 0x0 0x0 0x1 &gic0 0x0 0x0 0x0 0x120 0x1>, <0x1000 0x0 0x0 0x2 &gic0 0x0 0x0 0x0 0x121 0x1>, <0x1000 0x0 0x0 0x3 &gic0 0x0 0x0 0x0 0x122 0x1>, <0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>; dma-coherent; dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>; ranges = /* I/O Memory (size=64K) */ <0x01000000 0x00 0x00000000 0x00 0xefff0000 0x00 0x00010000>, /* 32-bit MMIO (size=2G) */ <0x02000000 0x00 0x40000000 0x00 0x40000000 0x00 0x80000000>, /* 64-bit MMIO (size= 124G) */ <0x03000000 0x01 0x00000000 0x01 0x00000000 0x7f 0x00000000>; }; /* Perf CCN504 PMU */ ccn: ccn@e8000000 { compatible = "arm,ccn-504"; reg = <0x0 0xe8000000 0 0x1000000>; interrupts = <0 380 4>; }; ipmi_kcs: kcs@e0010000 { status = "disabled"; compatible = "ipmi-kcs"; device_type = "ipmi"; reg = <0x0 0xe0010000 0 0x8>; interrupts = <0 389 4>; reg-size = <1>; reg-spacing = <4>; }; }; }; |