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ST-Ericsson Ux500 boards ------------------------ Required properties (in root node) one of these: compatible = "st-ericsson,mop500" (legacy) compatible = "st-ericsson,u8500" Required node (under root node): soc: represents the system-on-chip and contains the chip peripherals Required property of soc node, one of these: compatible = "stericsson,db8500" Required subnodes under soc node: backupram: (used for CPU spin tables and for storing data during retention, system won't boot without this): compatible = "ste,dbx500-backupram" scu: see binding for arm/arm,scu.yaml interrupt-controller: see binding for interrupt-controller/arm,gic.txt timer: see binding for timer/arm,twd-timer.yaml clocks: see binding for clocks/ux500.txt Example: /dts-v1/; / { model = "ST-Ericsson HREF (pre-v60) and ST UIB"; compatible = "st-ericsson,mop500", "st-ericsson,u8500"; soc { #address-cells = <1>; #size-cells = <1>; compatible = "stericsson,db8500"; interrupt-parent = <&intc>; ranges; backupram@80150000 { compatible = "ste,dbx500-backupram"; reg = <0x80150000 0x2000>; }; intc: interrupt-controller@a0411000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <1>; interrupt-controller; reg = <0xa0411000 0x1000>, <0xa0410100 0x100>; }; scu@a0410000 { compatible = "arm,cortex-a9-scu"; reg = <0xa0410000 0x100>; }; timer@a0410600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xa0410600 0x20>; interrupts = <1 13 0x304>; /* IRQ level high per-CPU */ clocks = <&smp_twd_clk>; }; clocks { compatible = "stericsson,u8500-clks"; smp_twd_clk: smp-twd-clock { #clock-cells = <0>; }; }; }; }; |