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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 | // SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) * 2002-2006 Thomas Gleixner (tglx@linutronix.de) * * Credits: * David Woodhouse for adding multichip support * * Aleph One Ltd. and Toby Churchill Ltd. for supporting the * rework for 2K page size chips * * This file contains all ONFI helpers. */ #include <linux/slab.h> #include "internals.h" #define ONFI_PARAM_PAGES 3 u16 onfi_crc16(u16 crc, u8 const *p, size_t len) { int i; while (len--) { crc ^= *p++ << 8; for (i = 0; i < 8; i++) crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0); } return crc; } /* Parse the Extended Parameter Page. */ static int nand_flash_detect_ext_param_page(struct nand_chip *chip, struct nand_onfi_params *p) { struct nand_device *base = &chip->base; struct nand_ecc_props requirements; struct onfi_ext_param_page *ep; struct onfi_ext_section *s; struct onfi_ext_ecc_info *ecc; uint8_t *cursor; int ret; int len; int i; len = le16_to_cpu(p->ext_param_page_length) * 16; ep = kmalloc(len, GFP_KERNEL); if (!ep) return -ENOMEM; /* * Use the Change Read Column command to skip the ONFI param pages and * ensure we read at the right location. */ ret = nand_change_read_column_op(chip, sizeof(*p) * p->num_of_param_pages, ep, len, true); if (ret) goto ext_out; ret = -EINVAL; if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2) != le16_to_cpu(ep->crc))) { pr_debug("fail in the CRC.\n"); goto ext_out; } /* * Check the signature. * Do not strictly follow the ONFI spec, maybe changed in future. */ if (strncmp(ep->sig, "EPPS", 4)) { pr_debug("The signature is invalid.\n"); goto ext_out; } /* find the ECC section. */ cursor = (uint8_t *)(ep + 1); for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) { s = ep->sections + i; if (s->type == ONFI_SECTION_TYPE_2) break; cursor += s->length * 16; } if (i == ONFI_EXT_SECTION_MAX) { pr_debug("We can not find the ECC section.\n"); goto ext_out; } /* get the info we want. */ ecc = (struct onfi_ext_ecc_info *)cursor; if (!ecc->codeword_size) { pr_debug("Invalid codeword size\n"); goto ext_out; } requirements.strength = ecc->ecc_bits; requirements.step_size = 1 << ecc->codeword_size; nanddev_set_ecc_requirements(base, &requirements); ret = 0; ext_out: kfree(ep); return ret; } /* * Recover data with bit-wise majority */ static void nand_bit_wise_majority(const void **srcbufs, unsigned int nsrcbufs, void *dstbuf, unsigned int bufsize) { int i, j, k; for (i = 0; i < bufsize; i++) { u8 val = 0; for (j = 0; j < 8; j++) { unsigned int cnt = 0; for (k = 0; k < nsrcbufs; k++) { const u8 *srcbuf = srcbufs[k]; if (srcbuf[i] & BIT(j)) cnt++; } if (cnt > nsrcbufs / 2) val |= BIT(j); } ((u8 *)dstbuf)[i] = val; } } /* * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise. */ int nand_onfi_detect(struct nand_chip *chip) { struct nand_device *base = &chip->base; struct mtd_info *mtd = nand_to_mtd(chip); struct nand_memory_organization *memorg; struct nand_onfi_params *p = NULL, *pbuf; struct onfi_params *onfi; bool use_datain = false; int onfi_version = 0; char id[4]; int i, ret, val; u16 crc; memorg = nanddev_get_memorg(&chip->base); /* Try ONFI for unknown chip or LP */ ret = nand_readid_op(chip, 0x20, id, sizeof(id)); if (ret || strncmp(id, "ONFI", 4)) return 0; /* ONFI chip: allocate a buffer to hold its parameter page */ pbuf = kzalloc((sizeof(*pbuf) * ONFI_PARAM_PAGES), GFP_KERNEL); if (!pbuf) return -ENOMEM; if (!nand_has_exec_op(chip) || chip->controller->supported_op.data_only_read) use_datain = true; for (i = 0; i < ONFI_PARAM_PAGES; i++) { if (!i) ret = nand_read_param_page_op(chip, 0, &pbuf[i], sizeof(*pbuf)); else if (use_datain) ret = nand_read_data_op(chip, &pbuf[i], sizeof(*pbuf), true, false); else ret = nand_change_read_column_op(chip, sizeof(*pbuf) * i, &pbuf[i], sizeof(*pbuf), true); if (ret) { ret = 0; goto free_onfi_param_page; } crc = onfi_crc16(ONFI_CRC_BASE, (u8 *)&pbuf[i], 254); if (crc == le16_to_cpu(pbuf[i].crc)) { p = &pbuf[i]; break; } } if (i == ONFI_PARAM_PAGES) { const void *srcbufs[ONFI_PARAM_PAGES]; unsigned int j; for (j = 0; j < ONFI_PARAM_PAGES; j++) srcbufs[j] = pbuf + j; pr_warn("Could not find a valid ONFI parameter page, trying bit-wise majority to recover it\n"); nand_bit_wise_majority(srcbufs, ONFI_PARAM_PAGES, pbuf, sizeof(*pbuf)); crc = onfi_crc16(ONFI_CRC_BASE, (u8 *)pbuf, 254); if (crc != le16_to_cpu(pbuf->crc)) { pr_err("ONFI parameter recovery failed, aborting\n"); goto free_onfi_param_page; } p = pbuf; } if (chip->manufacturer.desc && chip->manufacturer.desc->ops && chip->manufacturer.desc->ops->fixup_onfi_param_page) chip->manufacturer.desc->ops->fixup_onfi_param_page(chip, p); /* Check version */ val = le16_to_cpu(p->revision); if (val & ONFI_VERSION_2_3) onfi_version = 23; else if (val & ONFI_VERSION_2_2) onfi_version = 22; else if (val & ONFI_VERSION_2_1) onfi_version = 21; else if (val & ONFI_VERSION_2_0) onfi_version = 20; else if (val & ONFI_VERSION_1_0) onfi_version = 10; if (!onfi_version) { pr_info("unsupported ONFI version: %d\n", val); goto free_onfi_param_page; } sanitize_string(p->manufacturer, sizeof(p->manufacturer)); sanitize_string(p->model, sizeof(p->model)); chip->parameters.model = kstrdup(p->model, GFP_KERNEL); if (!chip->parameters.model) { ret = -ENOMEM; goto free_onfi_param_page; } memorg->pagesize = le32_to_cpu(p->byte_per_page); mtd->writesize = memorg->pagesize; /* * pages_per_block and blocks_per_lun may not be a power-of-2 size * (don't ask me who thought of this...). MTD assumes that these * dimensions will be power-of-2, so just truncate the remaining area. */ memorg->pages_per_eraseblock = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1); mtd->erasesize = memorg->pages_per_eraseblock * memorg->pagesize; memorg->oobsize = le16_to_cpu(p->spare_bytes_per_page); mtd->oobsize = memorg->oobsize; memorg->luns_per_target = p->lun_count; memorg->planes_per_lun = 1 << p->interleaved_bits; /* See erasesize comment */ memorg->eraseblocks_per_lun = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1); memorg->max_bad_eraseblocks_per_lun = le32_to_cpu(p->blocks_per_lun); memorg->bits_per_cell = p->bits_per_cell; if (le16_to_cpu(p->features) & ONFI_FEATURE_16_BIT_BUS) chip->options |= NAND_BUSWIDTH_16; if (p->ecc_bits != 0xff) { struct nand_ecc_props requirements = { .strength = p->ecc_bits, .step_size = 512, }; nanddev_set_ecc_requirements(base, &requirements); } else if (onfi_version >= 21 && (le16_to_cpu(p->features) & ONFI_FEATURE_EXT_PARAM_PAGE)) { /* * The nand_flash_detect_ext_param_page() uses the * Change Read Column command which maybe not supported * by the chip->legacy.cmdfunc. So try to update the * chip->legacy.cmdfunc now. We do not replace user supplied * command function. */ nand_legacy_adjust_cmdfunc(chip); /* The Extended Parameter Page is supported since ONFI 2.1. */ if (nand_flash_detect_ext_param_page(chip, p)) pr_warn("Failed to detect ONFI extended param page\n"); } else { pr_warn("Could not retrieve ONFI ECC requirements\n"); } /* Save some parameters from the parameter page for future use */ if (le16_to_cpu(p->opt_cmd) & ONFI_OPT_CMD_SET_GET_FEATURES) { chip->parameters.supports_set_get_features = true; bitmap_set(chip->parameters.get_feature_list, ONFI_FEATURE_ADDR_TIMING_MODE, 1); bitmap_set(chip->parameters.set_feature_list, ONFI_FEATURE_ADDR_TIMING_MODE, 1); } if (le16_to_cpu(p->opt_cmd) & ONFI_OPT_CMD_READ_CACHE) chip->parameters.supports_read_cache = true; onfi = kzalloc(sizeof(*onfi), GFP_KERNEL); if (!onfi) { ret = -ENOMEM; goto free_model; } onfi->version = onfi_version; onfi->tPROG = le16_to_cpu(p->t_prog); onfi->tBERS = le16_to_cpu(p->t_bers); onfi->tR = le16_to_cpu(p->t_r); onfi->tCCS = le16_to_cpu(p->t_ccs); onfi->fast_tCAD = le16_to_cpu(p->nvddr_nvddr2_features) & BIT(0); onfi->sdr_timing_modes = le16_to_cpu(p->sdr_timing_modes); if (le16_to_cpu(p->features) & ONFI_FEATURE_NV_DDR) onfi->nvddr_timing_modes = le16_to_cpu(p->nvddr_timing_modes); onfi->vendor_revision = le16_to_cpu(p->vendor_revision); memcpy(onfi->vendor, p->vendor, sizeof(p->vendor)); chip->parameters.onfi = onfi; /* Identification done, free the full ONFI parameter page and exit */ kfree(pbuf); return 1; free_model: kfree(chip->parameters.model); free_onfi_param_page: kfree(pbuf); return ret; } |