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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2019 BayLibre SAS. All rights reserved. * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com> */ /dts-v1/; #include "meson-sm1-ac2xx.dtsi" #include <dt-bindings/sound/meson-g12a-tohdmitx.h> / { compatible = "cyx,a95xf3-air-gbit", "amlogic,sm1"; model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR"; sound { compatible = "amlogic,axg-sound-card"; model = "A95XF3-AIR"; audio-aux-devs = <&tdmout_b>; audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", "TDMOUT_B IN 1", "FRDDR_B OUT 1", "TDMOUT_B IN 2", "FRDDR_C OUT 1", "TDM_B Playback", "TDMOUT_B OUT"; assigned-clocks = <&clkc CLKID_MPLL2>, <&clkc CLKID_MPLL0>, <&clkc CLKID_MPLL1>; assigned-clock-parents = <0>, <0>, <0>; assigned-clock-rates = <294912000>, <270950400>, <393216000>; dai-link-0 { sound-dai = <&frddr_a>; }; dai-link-1 { sound-dai = <&frddr_b>; }; dai-link-2 { sound-dai = <&frddr_c>; }; /* 8ch hdmi interface */ dai-link-3 { sound-dai = <&tdmif_b>; dai-format = "i2s"; dai-tdm-slot-tx-mask-0 = <1 1>; dai-tdm-slot-tx-mask-1 = <1 1>; dai-tdm-slot-tx-mask-2 = <1 1>; dai-tdm-slot-tx-mask-3 = <1 1>; mclk-fs = <256>; codec { sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; }; }; /* hdmi glue */ dai-link-4 { sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; codec { sound-dai = <&hdmi_tx>; }; }; }; }; &arb { status = "okay"; }; &clkc_audio { status = "okay"; }; ðmac { status = "okay"; pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; pinctrl-names = "default"; phy-mode = "rgmii-txid"; phy-handle = <&external_phy>; rx-internal-delay-ps = <800>; }; &ext_mdio { external_phy: ethernet-phy@0 { /* Realtek RTL8211F (0x001cc916) */ reg = <0>; max-speed = <1000>; reset-assert-us = <10000>; reset-deassert-us = <80000>; reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; interrupt-parent = <&gpio_intc>; /* MAC_INTR on GPIOZ_14 */ interrupts = <IRQID_GPIOZ_14 IRQ_TYPE_LEVEL_LOW>; }; }; &frddr_a { status = "okay"; }; &frddr_b { status = "okay"; }; &frddr_c { status = "okay"; }; &tdmif_b { status = "okay"; }; &tdmout_b { status = "okay"; }; &tohdmitx { status = "okay"; }; |