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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /dts-v1/; #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/linux-event-codes.h> #include <dt-bindings/pinctrl/rockchip.h> #include "rk3566-anbernic-rgxx3.dtsi" / { backlight: backlight { compatible = "pwm-backlight"; power-supply = <&vcc_sys>; pwms = <&pwm4 0 25000 0>; }; }; &cru { assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; assigned-clock-rates = <32768>, <1200000000>, <200000000>, <241500000>; }; &dsi_dphy0 { status = "okay"; }; &dsi0 { status = "okay"; #address-cells = <1>; #size-cells = <0>; ports { dsi0_in: port@0 { reg = <0>; dsi0_in_vp1: endpoint { remote-endpoint = <&vp1_out_dsi0>; }; }; dsi0_out: port@1 { reg = <1>; mipi_out_panel: endpoint { remote-endpoint = <&mipi_in_panel>; }; }; }; panel: panel@0 { compatible = "anbernic,rg353p-panel", "newvision,nv3051d"; reg = <0>; backlight = <&backlight>; pinctrl-names = "default"; pinctrl-0 = <&lcd_rst>; reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; vdd-supply = <&vcc3v3_lcd0_n>; port { mipi_in_panel: endpoint { remote-endpoint = <&mipi_out_panel>; }; }; }; }; &gpio_keys_control { button-a { gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; label = "EAST"; linux,code = <BTN_EAST>; }; button-left { gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; label = "DPAD-LEFT"; linux,code = <BTN_DPAD_LEFT>; }; button-right { gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; label = "DPAD-RIGHT"; linux,code = <BTN_DPAD_RIGHT>; }; button-y { gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; label = "WEST"; linux,code = <BTN_WEST>; }; }; &i2c0 { /* This hardware is physically present but unused. */ power-monitor@62 { compatible = "cellwise,cw2015"; reg = <0x62>; status = "disabled"; }; }; &pinctrl { gpio-lcd { lcd_rst: lcd-rst { rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; &pwm4 { status = "okay"; }; &vp1 { vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { reg = <ROCKCHIP_VOP2_EP_MIPI0>; remote-endpoint = <&dsi0_in_vp1>; }; }; |