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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 | // SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright (C) 2016 Robert Jarzmik <robert.jarzmik@free.fr> */ #include "pxa2xx.dtsi" #include "dt-bindings/clock/pxa-clock.h" / { model = "Marvell PXA25x family SoC"; compatible = "marvell,pxa250"; clocks { /* * The muxing of external clocks/internal dividers for osc* clock * sources has been hidden under the carpet by now. */ #address-cells = <1>; #size-cells = <1>; ranges; clks: pxa2xx_clks@41300004 { compatible = "marvell,pxa250-core-clocks"; #clock-cells = <1>; status = "okay"; }; /* timer oscillator */ clktimer: oscillator { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <3686400>; clock-output-names = "ostimer"; }; }; pxabus { pdma: dma-controller@40000000 { compatible = "marvell,pdma-1.0"; reg = <0x40000000 0x10000>; interrupts = <25>; #dma-cells = <2>; /* For backwards compatibility: */ #dma-channels = <16>; dma-channels = <16>; #dma-requests = <40>; dma-requests = <40>; status = "okay"; }; pxairq: interrupt-controller@40d00000 { marvell,intc-priority; marvell,intc-nr-irqs = <32>; }; pinctrl: pinctrl@40e00000 { reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4 0x40f00020 0x10>; compatible = "marvell,pxa25x-pinctrl"; }; gpio: gpio@40e00000 { compatible = "intel,pxa25x-gpio"; gpio-ranges = <&pinctrl 0 0 84>; clocks = <&clks CLK_NONE>; }; pwm0: pwm@40b00000 { compatible = "marvell,pxa250-pwm"; reg = <0x40b00000 0x10>; #pwm-cells = <1>; clocks = <&clks CLK_PWM0>; }; pwm1: pwm@40b00010 { compatible = "marvell,pxa250-pwm"; reg = <0x40b00010 0x10>; #pwm-cells = <1>; clocks = <&clks CLK_PWM1>; }; rtc@40900000 { clocks = <&clks CLK_OSC32k768>; }; }; timer@40a00000 { compatible = "marvell,pxa-timer"; reg = <0x40a00000 0x20>; interrupts = <26>; clocks = <&clktimer>; status = "okay"; }; pxa250_opp_table: opp_table0 { compatible = "operating-points-v2"; opp-99532800 { opp-hz = /bits/ 64 <99532800>; opp-microvolt = <1000000 950000 1650000>; clock-latency-ns = <20>; }; opp-199065600 { opp-hz = /bits/ 64 <199065600>; opp-microvolt = <1000000 950000 1650000>; clock-latency-ns = <20>; }; opp-298598400 { opp-hz = /bits/ 64 <298598400>; opp-microvolt = <1100000 1045000 1650000>; clock-latency-ns = <20>; }; opp-398131200 { opp-hz = /bits/ 64 <398131200>; opp-microvolt = <1300000 1235000 1650000>; clock-latency-ns = <20>; }; }; }; |