// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2023 MediaTek Inc.
*/
/dts-v1/;
#include "mt8188.dtsi"
#include "mt6359.dtsi"
/ {
model = "MediaTek MT8188 evaluation board";
compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
aliases {
serial0 = &uart0;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
mmc0 = &mmc0;
};
chosen: chosen {
stdout-path = "serial0:115200n8";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x80000000>;
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
scp_mem_reserved: memory@50000000 {
compatible = "shared-dma-pool";
reg = <0 0x50000000 0 0x2900000>;
no-map;
};
};
};
&auxadc {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <400000>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <400000>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
clock-frequency = <400000>;
status = "okay";
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
clock-frequency = <400000>;
status = "okay";
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins>;
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins>;
clock-frequency = <400000>;
status = "okay";
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&i2c6_pins>;
clock-frequency = <400000>;
status = "okay";
};
&mmc0 {
bus-width = <8>;
hs400-ds-delay = <0x1481b>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
supports-cqe;
cap-mmc-hw-reset;
no-sdio;
no-sd;
non-removable;
vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
vqmmc-supply = <&mt6359_vufs_ldo_reg>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_default_pins>;
pinctrl-1 = <&mmc0_uhs_pins>;
status = "okay";
};
&mt6359_vcore_buck_reg {
regulator-always-on;
};
&mt6359_vgpu11_buck_reg {
regulator-always-on;
};
&mt6359_vpu_buck_reg {
regulator-always-on;
};
&mt6359_vrf12_ldo_reg {
regulator-always-on;
};
&nor_flash {
pinctrl-names = "default";
pinctrl-0 = <&nor_pins_default>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <52000000>;
};
};
&pio {
adsp_uart_pins: adsp-uart-pins {
pins-tx-rx {
pinmux = <PINMUX_GPIO35__FUNC_O_ADSP_UTXD0>,
<PINMUX_GPIO36__FUNC_I1_ADSP_URXD0>;
};
};
i2c0_pins: i2c0-pins {
pins-bus {
pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>,
<PINMUX_GPIO55__FUNC_B1_SCL0>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
};
};
i2c1_pins: i2c1-pins {
pins-bus {
pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>,
<PINMUX_GPIO57__FUNC_B1_SCL1>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
};
};
i2c2_pins: i2c2-pins {
pins-bus {
pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>,
<PINMUX_GPIO59__FUNC_B1_SCL2>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
};
};
i2c3_pins: i2c3-pins {
pins-bus {
pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>,
<PINMUX_GPIO61__FUNC_B1_SCL3>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
};
};
i2c4_pins: i2c4-pins {
pins-bus {
pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>,
<PINMUX_GPIO63__FUNC_B1_SCL4>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
};
};
i2c5_pins: i2c5-pins {
pins-bus {
pinmux = <PINMUX_GPIO66__FUNC_B1_SDA5>,
<PINMUX_GPIO65__FUNC_B1_SCL5>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
};
};
i2c6_pins: i2c6-pins {
pins-bus {
pinmux = <PINMUX_GPIO68__FUNC_B1_SDA6>,
<PINMUX_GPIO67__FUNC_B1_SCL6>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
};
};
mmc0_default_pins: mmc0-default-pins {
pins-cmd-dat {
pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
<PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
<PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
<PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
<PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
<PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
<PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
<PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
<PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
input-enable;
drive-strength = <6>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins-clk {
pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
drive-strength = <6>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins-rst {
pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
drive-strength = <6>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
mmc0_uhs_pins: mmc0-uhs-pins {
pins-cmd-dat {
pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
<PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
<PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
<PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
<PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
<PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
<PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
<PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
<PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
input-enable;
drive-strength = <8>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins-clk-ds {
pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>,
<PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>;
drive-strength = <8>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins-rst {
pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
drive-strength = <8>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
nor_pins_default: nor-pins {
pins-io-ck {
pinmux = <PINMUX_GPIO127__FUNC_B0_SPINOR_IO0>,
<PINMUX_GPIO125__FUNC_O_SPINOR_CK>,
<PINMUX_GPIO128__FUNC_B0_SPINOR_IO1>;
bias-pull-down;
};
pins-io-cs {
pinmux = <PINMUX_GPIO126__FUNC_O_SPINOR_CS>,
<PINMUX_GPIO129__FUNC_B0_SPINOR_IO2>,
<PINMUX_GPIO130__FUNC_B0_SPINOR_IO3>;
bias-pull-up;
};
};
spi0_pins: spi0-pins {
pins-spi {
pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>,
<PINMUX_GPIO70__FUNC_O_SPIM0_CLK>,
<PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>,
<PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>;
bias-disable;
};
};
spi1_pins: spi1-pins {
pins-spi {
pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>,
<PINMUX_GPIO76__FUNC_O_SPIM1_CLK>,
<PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>,
<PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>;
bias-disable;
};
};
spi2_pins: spi2-pins {
pins-spi {
pinmux = <PINMUX_GPIO79__FUNC_O_SPIM2_CSB>,
<PINMUX_GPIO80__FUNC_O_SPIM2_CLK>,
<PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI>,
<PINMUX_GPIO82__FUNC_B0_SPIM2_MISO>;
bias-disable;
};
};
uart0_pins: uart0-pins {
pins-rx-tx {
pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>,
<PINMUX_GPIO32__FUNC_I1_URXD0>;
bias-pull-up;
};
};
};
&pmic {
interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
};
&scp {
memory-region = <&scp_mem_reserved>;
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
status = "okay";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins>;
status = "okay";
};
&u3phy0 {
status = "okay";
};
&u3phy1 {
status = "okay";
};
&u3phy2 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&xhci0 {
status = "okay";
};
&xhci1 {
status = "okay";
};
&xhci2 {
status = "okay";
};