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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A10 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> - Maxime Ripard <mripard@kernel.org> properties: "#phy-cells": const: 1 compatible: enum: - allwinner,sun4i-a10-usb-phy - allwinner,sun7i-a20-usb-phy reg: items: - description: PHY Control registers - description: PHY PMU1 registers - description: PHY PMU2 registers reg-names: items: - const: phy_ctrl - const: pmu1 - const: pmu2 clocks: maxItems: 1 description: USB PHY bus clock clock-names: const: usb_phy resets: items: - description: USB OTG reset - description: USB Host 1 Controller reset - description: USB Host 2 Controller reset reset-names: items: - const: usb0_reset - const: usb1_reset - const: usb2_reset usb0_id_det-gpios: maxItems: 1 description: GPIO to the USB OTG ID pin usb0_vbus_det-gpios: maxItems: 1 description: GPIO to the USB OTG VBUS detect pin usb0_vbus_power-supply: description: Power supply to detect the USB OTG VBUS usb0_vbus-supply: description: Regulator controlling USB OTG VBUS usb1_vbus-supply: description: Regulator controlling USB1 Host controller usb2_vbus-supply: description: Regulator controlling USB2 Host controller required: - "#phy-cells" - compatible - clocks - clock-names - reg - reg-names - resets - reset-names additionalProperties: false examples: - | #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/sun4i-a10-ccu.h> #include <dt-bindings/reset/sun4i-a10-ccu.h> usbphy: phy@1c13400 { #phy-cells = <1>; compatible = "allwinner,sun4i-a10-usb-phy"; reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>; reg-names = "phy_ctrl", "pmu1", "pmu2"; clocks = <&ccu CLK_USB_PHY>; clock-names = "usb_phy"; resets = <&ccu RST_USB_PHY0>, <&ccu RST_USB_PHY1>, <&ccu RST_USB_PHY2>; reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>; usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; }; |