Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918 2919 2920 2921 2922 2923 2924 2925 2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765 3766 3767 3768 3769 3770 3771 3772 3773 3774 3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 3895 3896 3897 3898 3899 3900 3901 3902 3903 3904 3905 3906 3907 3908 3909 3910 3911 3912 3913 3914 3915 3916 3917 3918 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079 4080 4081 4082 4083 4084 4085 4086 4087 4088 4089 4090 4091 4092 4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129 4130 4131 4132 4133 4134 4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209 4210 4211 4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646 4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 4721 4722 4723 4724 4725 4726 4727 4728 4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761 4762 4763 4764 4765 4766 4767 4768 4769 4770 4771 4772 4773 4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799 4800 4801 4802 4803 4804 4805 4806 4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817 4818 4819 4820 4821 4822 4823 4824 4825 4826 4827 4828 4829 4830 4831 4832 4833 4834 4835 4836 4837 4838 4839 4840 4841 4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853 4854 4855 4856 4857 4858 4859 4860 4861 4862 4863 4864 4865 4866 4867 4868 4869 4870 4871 4872 4873 4874 4875 4876 4877 4878 4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4898 4899 4900 4901 4902 4903 4904 4905 4906 4907 4908 4909 4910 4911 4912 4913 4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936 4937 4938 4939 4940 4941 4942 4943 4944 4945 4946 4947 4948 4949 4950 4951 4952 4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984 4985 4986 4987 4988 4989 4990 4991 4992 4993 4994 4995 4996 4997 4998 4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042 5043 5044 5045 5046 5047 5048 5049 5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064 5065 5066 5067 5068 5069 5070 5071 5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086 5087 5088 5089 5090 5091 5092 5093 5094 5095 5096 5097 5098 5099 5100 5101 5102 5103 5104 5105 5106 5107 5108 5109 5110 5111 5112 5113 5114 5115 5116 5117 5118 5119 5120 5121 5122 5123 5124 5125 5126 5127 5128 5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139 5140 5141 5142 5143 5144 5145 5146 5147 5148 5149 5150 5151 5152 5153 5154 5155 5156 5157 5158 5159 5160 5161 5162 5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183 5184 5185 5186 5187 5188 5189 5190 5191 5192 5193 5194 5195 5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259 5260 5261 5262 5263 5264 5265 5266 5267 5268 5269 5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305 5306 5307 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322 5323 5324 5325 5326 5327 5328 5329 5330 5331 5332 5333 5334 5335 5336 5337 5338 5339 5340 5341 5342 5343 5344 5345 5346 5347 5348 5349 5350 5351 5352 5353 5354 5355 5356 5357 5358 5359 5360 5361 5362 5363 5364 5365 5366 5367 5368 5369 5370 5371 5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390 5391 5392 5393 5394 5395 5396 5397 5398 5399 5400 5401 5402 5403 5404 5405 5406 5407 5408 5409 5410 5411 5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430 5431 5432 5433 5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444 5445 5446 5447 5448 5449 5450 5451 5452 5453 5454 5455 5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495 5496 5497 5498 5499 5500 5501 5502 5503 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516 5517 5518 5519 5520 5521 5522 5523 5524 5525 5526 5527 5528 5529 5530 5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541 5542 5543 5544 5545 5546 5547 5548 5549 5550 5551 5552 5553 5554 5555 5556 5557 5558 5559 5560 5561 5562 5563 5564 5565 5566 5567 5568 5569 5570 5571 5572 5573 5574 5575 5576 5577 5578 5579 5580 5581 5582 5583 5584 5585 5586 5587 5588 5589 5590 5591 5592 5593 5594 5595 5596 5597 5598 5599 5600 5601 5602 5603 5604 5605 5606 5607 5608 5609 5610 5611 5612 5613 5614 5615 5616 5617 5618 5619 5620 5621 5622 5623 5624 5625 5626 5627 5628 5629 5630 5631 5632 5633 5634 5635 5636 5637 5638 5639 5640 5641 5642 5643 5644 5645 5646 5647 5648 5649 5650 5651 5652 5653 5654 5655 5656 5657 5658 5659 5660 5661 5662 5663 5664 5665 5666 5667 5668 5669 5670 5671 5672 5673 5674 5675 5676 5677 5678 5679 5680 5681 5682 5683 5684 5685 5686 5687 5688 5689 5690 5691 5692 5693 5694 5695 5696 5697 5698 5699 5700 5701 5702 5703 5704 5705 5706 5707 5708 5709 5710 5711 5712 5713 5714 5715 5716 5717 5718 5719 5720 5721 5722 5723 5724 5725 5726 5727 5728 5729 5730 5731 5732 5733 5734 5735 5736 5737 5738 5739 5740 5741 5742 5743 5744 5745 5746 5747 5748 5749 5750 5751 5752 5753 5754 5755 5756 5757 5758 5759 5760 5761 5762 5763 5764 5765 5766 5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 5810 5811 5812 5813 5814 5815 5816 5817 5818 5819 5820 5821 5822 5823 5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834 5835 5836 5837 5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851 5852 5853 5854 5855 5856 5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883 5884 5885 5886 5887 5888 5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908 5909 5910 5911 5912 5913 5914 5915 5916 5917 5918 5919 5920 5921 5922 5923 5924 5925 5926 5927 5928 5929 5930 5931 5932 5933 5934 5935 5936 5937 5938 5939 5940 5941 5942 5943 5944 5945 5946 5947 5948 5949 5950 5951 5952 5953 5954 5955 5956 5957 5958 5959 5960 5961 5962 5963 5964 5965 5966 5967 5968 5969 5970 5971 5972 5973 5974 5975 5976 5977 5978 5979 5980 5981 5982 5983 5984 5985 5986 5987 5988 5989 5990 5991 5992 5993 5994 5995 5996 5997 5998 5999 6000 6001 6002 6003 6004 6005 6006 6007 6008 6009 6010 6011 6012 6013 6014 6015 6016 6017 6018 6019 6020 6021 6022 6023 6024 6025 6026 6027 6028 6029 6030 6031 6032 6033 6034 6035 6036 6037 6038 6039 6040 6041 6042 6043 6044 6045 6046 6047 6048 6049 6050 6051 6052 6053 6054 6055 6056 6057 6058 6059 6060 6061 6062 6063 6064 6065 6066 6067 6068 6069 6070 6071 6072 6073 6074 6075 6076 6077 6078 6079 6080 6081 6082 6083 6084 6085 6086 6087 6088 6089 6090 6091 6092 6093 6094 6095 6096 6097 6098 6099 6100 6101 6102 6103 6104 6105 6106 6107 6108 6109 6110 6111 6112 6113 6114 6115 6116 6117 6118 6119 6120 6121 6122 6123 6124 6125 6126 6127 6128 6129 6130 6131 6132 6133 6134 6135 6136 6137 6138 6139 6140 6141 6142 6143 6144 6145 6146 6147 6148 6149 6150 6151 6152 6153 6154 6155 6156 6157 6158 6159 6160 6161 6162 6163 6164 6165 6166 6167 6168 6169 6170 6171 6172 6173 6174 6175 6176 6177 6178 6179 6180 6181 6182 6183 6184 6185 6186 6187 6188 6189 6190 6191 6192 6193 6194 6195 6196 6197 6198 6199 6200 6201 6202 6203 6204 6205 6206 6207 6208 6209 6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220 6221 6222 6223 6224 6225 6226 6227 6228 6229 6230 6231 6232 6233 6234 6235 6236 6237 6238 6239 6240 6241 6242 6243 6244 6245 6246 6247 6248 6249 6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260 6261 6262 6263 6264 6265 6266 6267 6268 6269 6270 6271 6272 6273 6274 6275 6276 6277 6278 6279 6280 6281 6282 6283 6284 6285 6286 6287 6288 6289 6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301 6302 6303 6304 6305 6306 6307 6308 6309 6310 6311 6312 6313 6314 6315 6316 6317 6318 6319 6320 6321 6322 6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337 6338 6339 6340 6341 6342 6343 6344 6345 6346 6347 6348 6349 6350 6351 6352 6353 6354 6355 6356 6357 6358 6359 6360 6361 6362 6363 6364 6365 6366 6367 6368 6369 6370 6371 6372 6373 6374 6375 6376 6377 6378 6379 6380 6381 6382 6383 6384 6385 6386 6387 6388 6389 6390 6391 6392 6393 6394 6395 6396 6397 6398 6399 6400 6401 6402 6403 6404 6405 6406 6407 6408 6409 6410 6411 6412 6413 6414 6415 6416 6417 6418 6419 6420 6421 6422 6423 6424 6425 6426 6427 6428 6429 6430 6431 6432 6433 6434 6435 6436 6437 6438 6439 6440 6441 6442 6443 6444 6445 6446 6447 6448 6449 6450 6451 6452 6453 6454 6455 6456 6457 6458 6459 6460 6461 6462 6463 6464 6465 6466 6467 6468 6469 6470 6471 6472 6473 6474 6475 6476 6477 6478 6479 6480 6481 6482 6483 6484 6485 6486 6487 6488 6489 6490 6491 6492 6493 6494 6495 6496 6497 6498 6499 6500 6501 6502 6503 6504 6505 6506 6507 6508 6509 6510 6511 6512 6513 6514 6515 6516 6517 6518 6519 6520 6521 6522 6523 6524 6525 6526 6527 6528 6529 6530 6531 6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551 6552 6553 6554 6555 6556 6557 6558 6559 6560 6561 6562 6563 6564 6565 6566 6567 6568 6569 6570 6571 6572 6573 6574 6575 6576 6577 6578 6579 6580 6581 6582 6583 6584 6585 6586 6587 6588 6589 6590 6591 6592 6593 6594 6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609 6610 6611 6612 6613 6614 6615 6616 6617 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653 6654 6655 6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666 6667 6668 6669 6670 6671 6672 6673 6674 6675 6676 6677 6678 6679 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690 6691 6692 6693 6694 6695 6696 6697 6698 6699 6700 6701 6702 6703 6704 6705 6706 6707 6708 6709 6710 6711 6712 6713 6714 6715 6716 6717 6718 6719 6720 6721 6722 6723 6724 6725 6726 6727 6728 6729 6730 6731 6732 6733 6734 6735 6736 6737 6738 6739 6740 6741 6742 6743 6744 6745 6746 6747 6748 6749 6750 6751 6752 6753 6754 6755 6756 6757 6758 6759 6760 6761 6762 6763 6764 6765 6766 6767 6768 6769 6770 6771 6772 6773 6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784 6785 6786 6787 6788 6789 6790 6791 6792 6793 6794 6795 6796 6797 6798 6799 6800 6801 6802 6803 6804 6805 6806 6807 6808 6809 6810 6811 6812 6813 6814 6815 6816 6817 6818 6819 6820 6821 6822 6823 6824 6825 6826 6827 6828 6829 6830 6831 6832 6833 6834 6835 6836 6837 6838 6839 6840 6841 6842 6843 6844 6845 6846 6847 6848 6849 6850 6851 6852 6853 6854 6855 6856 6857 6858 6859 6860 6861 6862 6863 6864 6865 6866 6867 6868 6869 6870 6871 6872 6873 6874 6875 6876 6877 6878 6879 6880 6881 6882 6883 6884 6885 6886 6887 6888 6889 6890 6891 6892 6893 6894 6895 6896 6897 6898 6899 6900 6901 6902 6903 6904 6905 6906 6907 6908 6909 6910 6911 6912 6913 6914 6915 6916 6917 6918 6919 6920 6921 6922 6923 6924 6925 6926 6927 6928 6929 6930 6931 6932 6933 6934 6935 6936 6937 6938 6939 6940 6941 6942 6943 6944 6945 6946 6947 6948 6949 6950 6951 6952 6953 6954 6955 6956 6957 6958 6959 6960 6961 6962 6963 6964 6965 6966 6967 6968 6969 6970 6971 6972 6973 6974 6975 6976 6977 6978 6979 6980 6981 6982 6983 6984 6985 6986 6987 6988 6989 6990 6991 6992 6993 6994 6995 6996 6997 6998 6999 7000 7001 7002 7003 7004 7005 7006 7007 7008 7009 7010 7011 7012 7013 7014 7015 7016 7017 7018 7019 7020 7021 7022 7023 7024 7025 7026 7027 7028 7029 7030 7031 7032 7033 7034 7035 7036 7037 7038 7039 7040 7041 7042 7043 7044 7045 7046 7047 7048 7049 7050 7051 7052 7053 7054 7055 7056 7057 7058 7059 7060 7061 7062 7063 7064 7065 7066 7067 7068 7069 7070 7071 7072 7073 7074 7075 7076 7077 7078 7079 7080 7081 7082 7083 7084 7085 7086 7087 7088 7089 7090 7091 7092 7093 7094 7095 7096 7097 7098 7099 7100 7101 7102 7103 7104 7105 7106 7107 7108 7109 7110 7111 7112 7113 7114 7115 7116 7117 7118 7119 7120 7121 7122 7123 7124 7125 7126 7127 7128 7129 7130 7131 7132 7133 7134 7135 7136 7137 7138 7139 7140 7141 7142 7143 7144 7145 7146 7147 7148 7149 7150 7151 7152 7153 7154 7155 7156 7157 7158 7159 7160 7161 7162 7163 7164 7165 7166 7167 7168 7169 7170 7171 7172 7173 7174 7175 7176 7177 7178 7179 7180 7181 7182 7183 7184 7185 7186 7187 7188 7189 7190 7191 7192 7193 7194 7195 7196 7197 7198 7199 7200 7201 7202 7203 7204 7205 7206 7207 7208 7209 7210 7211 7212 7213 7214 7215 7216 7217 7218 7219 7220 7221 7222 7223 7224 7225 7226 7227 7228 7229 7230 7231 7232 7233 7234 7235 7236 7237 7238 7239 7240 7241 7242 7243 7244 7245 7246 7247 7248 7249 7250 7251 7252 7253 7254 7255 7256 7257 7258 7259 7260 7261 7262 7263 7264 7265 7266 7267 7268 7269 7270 7271 7272 7273 7274 7275 7276 7277 7278 7279 7280 7281 7282 7283 7284 7285 7286 7287 7288 7289 7290 7291 7292 7293 7294 7295 7296 7297 7298 7299 7300 7301 7302 7303 7304 7305 7306 7307 7308 7309 7310 7311 7312 7313 7314 7315 7316 7317 7318 7319 7320 7321 7322 7323 7324 7325 7326 7327 7328 7329 7330 7331 7332 7333 7334 7335 7336 7337 7338 7339 7340 7341 7342 7343 7344 7345 7346 7347 7348 7349 7350 7351 7352 7353 7354 7355 7356 7357 7358 7359 7360 7361 7362 7363 7364 7365 7366 7367 7368 7369 7370 7371 7372 7373 7374 7375 7376 7377 7378 7379 7380 7381 7382 7383 7384 7385 7386 7387 7388 7389 7390 7391 7392 7393 7394 7395 7396 7397 7398 7399 7400 7401 7402 7403 7404 7405 7406 7407 7408 7409 7410 7411 7412 7413 7414 7415 7416 7417 7418 7419 7420 7421 7422 7423 7424 7425 7426 7427 7428 7429 7430 7431 7432 7433 7434 7435 7436 7437 7438 7439 7440 7441 7442 7443 7444 7445 7446 7447 7448 7449 7450 7451 7452 7453 7454 7455 7456 7457 7458 7459 7460 7461 7462 7463 7464 7465 7466 7467 7468 7469 7470 7471 7472 7473 7474 7475 7476 7477 7478 7479 7480 7481 7482 7483 7484 7485 7486 7487 7488 7489 7490 7491 7492 7493 7494 7495 7496 7497 7498 7499 7500 7501 7502 7503 7504 7505 7506 7507 7508 7509 7510 7511 7512 7513 7514 7515 7516 7517 7518 7519 7520 7521 7522 7523 7524 7525 7526 7527 7528 7529 7530 7531 7532 7533 7534 7535 7536 7537 7538 7539 7540 7541 7542 7543 7544 7545 7546 7547 7548 7549 7550 7551 7552 7553 7554 7555 7556 7557 7558 7559 7560 7561 7562 7563 7564 7565 7566 7567 7568 7569 7570 7571 7572 7573 7574 7575 7576 7577 7578 7579 7580 7581 7582 7583 7584 7585 7586 7587 7588 7589 7590 7591 7592 7593 7594 7595 7596 7597 7598 7599 7600 7601 7602 7603 7604 7605 7606 7607 7608 7609 7610 7611 7612 7613 7614 7615 7616 7617 7618 7619 7620 7621 7622 7623 7624 7625 7626 7627 7628 7629 7630 7631 7632 7633 7634 7635 7636 7637 7638 7639 7640 7641 7642 7643 7644 7645 7646 7647 7648 7649 7650 7651 7652 7653 7654 7655 7656 7657 7658 7659 7660 7661 7662 7663 7664 7665 7666 7667 7668 7669 7670 7671 7672 7673 7674 7675 7676 7677 7678 7679 7680 7681 7682 7683 7684 7685 7686 7687 7688 7689 7690 7691 7692 7693 7694 7695 7696 7697 7698 7699 7700 7701 7702 7703 7704 7705 7706 7707 7708 7709 7710 7711 7712 7713 7714 7715 7716 7717 7718 7719 7720 7721 7722 7723 7724 7725 7726 7727 7728 7729 7730 7731 7732 7733 7734 7735 7736 7737 7738 7739 7740 7741 7742 7743 7744 7745 7746 7747 7748 7749 7750 7751 7752 7753 7754 7755 7756 7757 7758 7759 7760 7761 7762 7763 7764 7765 7766 7767 7768 7769 7770 7771 7772 7773 7774 7775 7776 7777 7778 7779 7780 7781 7782 7783 7784 7785 7786 7787 7788 7789 7790 7791 7792 7793 7794 7795 7796 7797 7798 7799 7800 7801 7802 7803 7804 7805 7806 7807 7808 7809 7810 7811 7812 7813 7814 7815 7816 7817 7818 7819 7820 7821 7822 7823 7824 7825 7826 7827 7828 7829 7830 7831 7832 7833 7834 7835 7836 7837 7838 7839 7840 7841 7842 7843 7844 7845 7846 7847 7848 7849 7850 7851 7852 7853 7854 7855 7856 7857 7858 7859 7860 7861 7862 7863 7864 7865 7866 7867 7868 7869 7870 7871 7872 7873 7874 7875 7876 7877 7878 7879 7880 7881 7882 7883 7884 7885 7886 7887 7888 7889 7890 7891 7892 7893 7894 7895 7896 7897 7898 7899 7900 7901 7902 7903 7904 7905 7906 7907 7908 7909 7910 7911 7912 7913 7914 7915 7916 7917 7918 7919 7920 7921 7922 7923 7924 7925 7926 7927 7928 7929 7930 7931 7932 7933 7934 7935 7936 7937 7938 7939 7940 7941 7942 7943 7944 7945 7946 7947 7948 7949 7950 7951 7952 7953 7954 7955 7956 7957 7958 7959 7960 7961 7962 7963 7964 7965 7966 7967 7968 7969 7970 7971 7972 7973 7974 7975 7976 7977 7978 7979 7980 7981 7982 7983 7984 7985 7986 7987 7988 7989 7990 7991 7992 7993 7994 7995 7996 7997 7998 7999 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 8020 8021 8022 8023 8024 8025 8026 8027 8028 8029 8030 8031 8032 8033 8034 8035 8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046 8047 8048 8049 8050 8051 8052 8053 8054 8055 8056 8057 8058 8059 8060 8061 8062 8063 8064 8065 8066 8067 8068 8069 8070 8071 8072 8073 8074 8075 8076 8077 8078 8079 8080 8081 8082 8083 8084 8085 8086 8087 8088 8089 8090 8091 8092 8093 8094 8095 8096 8097 8098 8099 8100 8101 8102 8103 8104 8105 8106 8107 8108 8109 8110 8111 8112 8113 8114 8115 8116 8117 8118 8119 8120 8121 8122 8123 8124 8125 8126 8127 8128 8129 8130 8131 8132 8133 8134 8135 8136 8137 8138 8139 8140 8141 8142 8143 8144 8145 8146 8147 8148 8149 8150 8151 8152 8153 8154 8155 8156 8157 8158 8159 8160 8161 8162 8163 8164 8165 8166 8167 8168 8169 8170 8171 8172 8173 8174 8175 8176 8177 8178 8179 8180 8181 8182 8183 8184 8185 8186 8187 8188 8189 8190 8191 8192 8193 8194 8195 8196 8197 8198 8199 8200 8201 8202 8203 8204 8205 8206 8207 8208 8209 8210 8211 8212 8213 8214 8215 8216 8217 8218 8219 8220 8221 8222 8223 8224 8225 8226 8227 8228 8229 8230 8231 8232 8233 8234 8235 8236 8237 8238 8239 8240 8241 8242 8243 8244 8245 8246 8247 8248 8249 8250 8251 8252 8253 8254 8255 8256 8257 8258 8259 8260 8261 8262 8263 8264 8265 8266 8267 8268 8269 8270 8271 8272 8273 8274 8275 8276 8277 8278 8279 8280 8281 8282 8283 8284 8285 8286 8287 8288 8289 8290 8291 8292 8293 8294 8295 8296 8297 8298 8299 8300 8301 8302 8303 8304 8305 8306 8307 8308 8309 8310 8311 8312 8313 8314 8315 8316 8317 8318 8319 8320 8321 8322 8323 8324 8325 8326 8327 8328 8329 8330 8331 8332 8333 8334 8335 8336 8337 8338 8339 8340 8341 8342 8343 8344 8345 8346 8347 8348 8349 8350 8351 8352 8353 8354 8355 8356 8357 8358 8359 8360 8361 8362 8363 8364 8365 8366 8367 8368 8369 8370 8371 8372 8373 8374 8375 8376 8377 8378 8379 8380 8381 8382 8383 8384 8385 8386 8387 8388 8389 8390 8391 8392 8393 8394 8395 8396 8397 8398 8399 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 8420 8421 8422 8423 8424 8425 8426 8427 8428 8429 8430 8431 8432 8433 8434 8435 8436 8437 8438 8439 8440 8441 8442 8443 8444 8445 8446 8447 8448 8449 8450 8451 8452 8453 8454 8455 8456 8457 8458 8459 8460 8461 8462 8463 8464 8465 8466 8467 8468 8469 8470 8471 8472 8473 8474 8475 8476 8477 8478 8479 8480 8481 8482 8483 8484 8485 8486 8487 8488 8489 8490 8491 8492 8493 8494 8495 8496 8497 8498 8499 8500 8501 8502 8503 8504 8505 8506 8507 8508 8509 8510 8511 8512 8513 8514 8515 8516 8517 8518 8519 8520 8521 8522 8523 8524 8525 8526 8527 8528 8529 8530 8531 8532 8533 8534 8535 8536 8537 8538 8539 8540 8541 8542 8543 8544 8545 8546 8547 8548 8549 8550 8551 8552 8553 8554 8555 8556 8557 8558 8559 8560 8561 8562 8563 8564 8565 8566 8567 8568 8569 8570 8571 8572 8573 8574 8575 8576 8577 8578 8579 8580 8581 8582 8583 8584 8585 8586 8587 8588 8589 8590 8591 8592 8593 8594 8595 8596 8597 8598 8599 8600 8601 8602 8603 8604 8605 8606 8607 8608 8609 8610 8611 8612 8613 8614 8615 8616 8617 8618 8619 8620 8621 8622 8623 8624 8625 8626 8627 8628 8629 8630 8631 8632 8633 8634 8635 8636 8637 8638 8639 8640 8641 8642 8643 8644 8645 8646 8647 8648 8649 8650 8651 8652 8653 8654 8655 8656 8657 8658 8659 8660 8661 8662 8663 8664 8665 8666 8667 8668 8669 8670 8671 8672 8673 8674 8675 8676 8677 8678 8679 8680 8681 8682 8683 8684 8685 8686 8687 8688 8689 8690 8691 8692 8693 8694 8695 8696 8697 8698 8699 8700 8701 8702 8703 8704 8705 8706 8707 8708 8709 8710 8711 8712 8713 8714 8715 8716 8717 8718 8719 8720 8721 8722 8723 8724 8725 8726 8727 8728 8729 8730 8731 8732 8733 8734 8735 8736 8737 8738 8739 8740 8741 8742 8743 8744 8745 8746 8747 8748 8749 8750 8751 8752 8753 8754 8755 8756 8757 8758 8759 8760 8761 8762 8763 8764 8765 8766 8767 8768 8769 8770 8771 8772 8773 8774 8775 8776 8777 8778 8779 8780 8781 8782 8783 8784 8785 8786 8787 8788 8789 8790 8791 8792 8793 8794 8795 8796 8797 8798 8799 8800 8801 8802 8803 8804 8805 8806 8807 8808 8809 8810 8811 8812 8813 8814 8815 8816 8817 8818 8819 8820 8821 8822 8823 8824 8825 8826 8827 8828 8829 8830 8831 8832 8833 8834 8835 8836 8837 8838 8839 8840 8841 8842 8843 8844 8845 8846 8847 8848 8849 8850 8851 8852 8853 8854 8855 8856 8857 8858 8859 8860 8861 8862 8863 8864 8865 8866 8867 8868 8869 8870 8871 8872 8873 8874 8875 8876 8877 8878 8879 8880 8881 8882 8883 8884 8885 8886 8887 8888 8889 8890 8891 8892 8893 8894 8895 8896 8897 8898 8899 8900 8901 8902 8903 8904 8905 8906 8907 8908 8909 8910 8911 8912 8913 8914 8915 8916 8917 8918 8919 8920 8921 8922 8923 8924 8925 8926 8927 8928 8929 8930 8931 8932 8933 8934 8935 8936 8937 8938 8939 8940 8941 8942 8943 8944 8945 8946 8947 8948 8949 8950 8951 8952 8953 8954 8955 8956 8957 8958 8959 8960 8961 8962 8963 8964 8965 8966 8967 8968 8969 8970 8971 8972 8973 8974 8975 8976 8977 8978 8979 8980 8981 8982 8983 8984 8985 8986 8987 8988 8989 8990 8991 8992 8993 8994 8995 8996 8997 8998 8999 9000 9001 9002 9003 9004 9005 9006 9007 9008 9009 9010 9011 9012 9013 9014 9015 9016 9017 9018 9019 9020 9021 9022 9023 9024 9025 9026 9027 9028 9029 9030 9031 9032 9033 9034 9035 9036 9037 9038 9039 9040 9041 9042 9043 9044 9045 9046 9047 9048 9049 9050 9051 9052 9053 9054 9055 9056 9057 9058 9059 9060 9061 9062 9063 9064 9065 9066 9067 9068 9069 9070 9071 9072 9073 9074 9075 9076 9077 9078 9079 9080 9081 9082 9083 9084 9085 9086 9087 9088 9089 9090 9091 9092 9093 9094 9095 9096 9097 9098 9099 9100 9101 9102 9103 9104 9105 9106 9107 9108 9109 9110 9111 9112 9113 9114 9115 9116 9117 9118 9119 9120 9121 9122 9123 9124 9125 9126 9127 9128 9129 9130 9131 9132 9133 9134 9135 9136 9137 9138 9139 9140 9141 9142 9143 9144 9145 9146 9147 9148 9149 9150 9151 9152 9153 9154 9155 9156 9157 9158 9159 9160 9161 9162 9163 9164 9165 9166 9167 9168 9169 9170 9171 9172 9173 9174 9175 9176 9177 9178 9179 9180 9181 9182 9183 9184 9185 9186 9187 9188 9189 9190 9191 9192 9193 9194 9195 9196 9197 9198 9199 9200 9201 9202 9203 9204 9205 9206 9207 9208 9209 9210 9211 9212 9213 9214 9215 9216 9217 9218 9219 9220 9221 9222 9223 9224 9225 9226 9227 9228 9229 9230 9231 9232 9233 9234 9235 9236 9237 9238 9239 9240 9241 9242 9243 9244 9245 9246 9247 9248 9249 9250 9251 9252 9253 9254 9255 9256 9257 9258 9259 9260 9261 9262 9263 9264 9265 9266 9267 9268 9269 9270 9271 9272 9273 9274 9275 9276 9277 9278 9279 9280 9281 9282 9283 9284 9285 9286 9287 9288 9289 9290 9291 9292 9293 9294 9295 9296 9297 9298 9299 9300 9301 9302 9303 9304 9305 9306 9307 9308 9309 9310 9311 9312 9313 9314 9315 9316 9317 9318 9319 9320 9321 9322 9323 9324 9325 9326 9327 9328 9329 9330 9331 9332 9333 9334 9335 9336 9337 9338 9339 9340 9341 9342 9343 9344 9345 9346 9347 9348 9349 9350 9351 9352 9353 9354 9355 9356 9357 9358 9359 9360 9361 9362 9363 9364 9365 9366 9367 9368 9369 9370 9371 9372 9373 9374 9375 9376 9377 9378 9379 9380 9381 9382 9383 9384 9385 9386 9387 9388 9389 9390 9391 9392 9393 9394 9395 9396 9397 9398 9399 9400 9401 9402 9403 9404 9405 9406 9407 9408 9409 9410 9411 9412 9413 9414 9415 9416 9417 9418 9419 9420 9421 9422 9423 9424 9425 9426 9427 9428 9429 9430 9431 9432 9433 9434 9435 9436 9437 9438 9439 9440 9441 9442 9443 9444 9445 9446 9447 9448 9449 9450 9451 9452 9453 9454 9455 9456 9457 9458 9459 9460 9461 9462 9463 9464 9465 9466 9467 9468 9469 9470 9471 9472 9473 9474 9475 9476 9477 9478 9479 9480 9481 9482 9483 9484 9485 9486 9487 9488 9489 9490 9491 9492 9493 9494 9495 9496 9497 9498 9499 9500 9501 9502 9503 9504 9505 9506 9507 9508 9509 9510 9511 9512 9513 9514 9515 9516 9517 9518 9519 9520 9521 9522 9523 9524 9525 9526 9527 9528 9529 9530 9531 9532 9533 9534 9535 9536 9537 9538 9539 9540 9541 9542 9543 9544 9545 9546 9547 9548 9549 9550 9551 9552 9553 9554 9555 9556 9557 9558 9559 9560 9561 9562 9563 9564 9565 9566 9567 9568 9569 9570 9571 9572 9573 9574 9575 9576 9577 9578 9579 9580 9581 9582 9583 9584 9585 9586 9587 9588 9589 9590 9591 9592 9593 9594 9595 9596 9597 9598 9599 9600 9601 9602 9603 9604 9605 9606 9607 9608 9609 9610 9611 9612 9613 9614 9615 9616 9617 9618 9619 9620 9621 9622 9623 9624 9625 9626 9627 9628 9629 9630 9631 9632 9633 9634 9635 9636 9637 9638 9639 9640 9641 9642 9643 9644 9645 9646 9647 9648 9649 9650 9651 9652 9653 9654 9655 9656 9657 9658 9659 9660 9661 9662 9663 9664 9665 9666 9667 9668 9669 9670 9671 9672 9673 9674 9675 9676 9677 9678 9679 9680 9681 9682 9683 9684 9685 9686 9687 9688 9689 9690 9691 9692 9693 9694 9695 9696 9697 9698 9699 9700 9701 9702 9703 9704 9705 9706 9707 9708 9709 9710 9711 9712 9713 9714 9715 9716 9717 9718 9719 9720 9721 9722 9723 9724 9725 9726 9727 9728 9729 9730 9731 9732 9733 9734 9735 9736 9737 9738 9739 9740 9741 9742 9743 9744 9745 9746 9747 9748 9749 9750 9751 9752 9753 9754 9755 9756 9757 9758 9759 9760 9761 9762 9763 9764 9765 9766 9767 9768 9769 9770 9771 9772 9773 9774 9775 9776 9777 9778 9779 9780 9781 9782 9783 9784 9785 9786 9787 9788 9789 9790 9791 9792 9793 9794 9795 9796 9797 9798 9799 9800 9801 9802 9803 9804 9805 9806 9807 9808 9809 9810 9811 9812 9813 9814 9815 9816 9817 9818 9819 9820 9821 9822 9823 9824 9825 9826 9827 9828 9829 9830 9831 9832 9833 9834 9835 9836 9837 9838 9839 9840 9841 9842 9843 9844 9845 9846 9847 9848 9849 9850 9851 9852 9853 9854 9855 9856 9857 9858 9859 9860 9861 9862 9863 9864 9865 9866 9867 9868 9869 9870 9871 9872 9873 9874 9875 9876 9877 9878 9879 9880 9881 9882 9883 9884 9885 9886 9887 9888 9889 9890 9891 9892 9893 9894 9895 9896 9897 9898 9899 9900 9901 9902 9903 9904 9905 9906 9907 9908 9909 9910 9911 9912 9913 9914 9915 9916 9917 9918 9919 9920 9921 9922 9923 9924 9925 9926 9927 9928 9929 9930 9931 9932 9933 9934 9935 9936 9937 9938 9939 9940 9941 9942 9943 9944 9945 9946 9947 9948 9949 9950 9951 9952 9953 9954 9955 9956 9957 9958 9959 9960 9961 9962 9963 9964 9965 9966 9967 9968 9969 9970 9971 9972 9973 9974 9975 9976 9977 9978 9979 9980 9981 9982 9983 9984 9985 9986 9987 9988 9989 9990 9991 9992 9993 9994 9995 9996 9997 9998 9999 10000 10001 10002 10003 10004 10005 10006 10007 10008 10009 10010 10011 10012 10013 10014 10015 10016 10017 10018 10019 10020 10021 10022 10023 10024 10025 10026 10027 10028 10029 10030 10031 10032 10033 10034 10035 10036 10037 10038 10039 10040 10041 10042 10043 10044 10045 10046 10047 10048 10049 10050 10051 10052 10053 10054 10055 10056 10057 10058 10059 10060 10061 10062 10063 10064 10065 10066 10067 10068 10069 10070 10071 10072 10073 10074 10075 10076 10077 10078 10079 10080 10081 10082 10083 10084 10085 10086 10087 10088 10089 10090 10091 10092 10093 10094 10095 10096 10097 10098 10099 10100 10101 10102 10103 10104 10105 10106 10107 10108 10109 10110 10111 10112 10113 10114 10115 10116 10117 10118 10119 10120 10121 10122 10123 10124 10125 10126 10127 10128 10129 10130 10131 10132 10133 10134 10135 10136 10137 10138 10139 10140 10141 10142 10143 10144 10145 10146 10147 10148 10149 10150 10151 10152 10153 10154 10155 10156 10157 10158 10159 10160 10161 10162 10163 10164 10165 10166 10167 10168 10169 10170 10171 10172 10173 10174 10175 10176 10177 10178 10179 10180 10181 10182 10183 10184 10185 10186 10187 10188 10189 10190 10191 10192 10193 10194 10195 10196 10197 10198 10199 10200 10201 10202 10203 10204 10205 10206 10207 10208 10209 10210 10211 10212 10213 10214 10215 10216 10217 10218 10219 10220 10221 10222 10223 10224 10225 10226 10227 10228 10229 10230 10231 10232 10233 10234 10235 10236 10237 10238 10239 10240 10241 10242 10243 10244 10245 10246 10247 10248 10249 10250 10251 10252 10253 10254 10255 10256 10257 10258 10259 10260 10261 10262 10263 10264 10265 10266 10267 10268 10269 10270 10271 10272 10273 10274 10275 10276 10277 10278 10279 10280 10281 10282 10283 10284 10285 10286 10287 10288 10289 10290 10291 10292 10293 10294 10295 10296 10297 10298 10299 10300 10301 10302 10303 10304 10305 10306 10307 10308 10309 10310 10311 10312 10313 10314 10315 10316 10317 10318 10319 10320 10321 10322 10323 10324 10325 10326 10327 10328 10329 10330 10331 10332 10333 10334 10335 10336 10337 10338 10339 10340 10341 10342 10343 10344 10345 10346 10347 10348 10349 10350 10351 10352 10353 10354 10355 10356 10357 10358 10359 10360 10361 10362 10363 10364 10365 10366 10367 10368 10369 10370 10371 10372 10373 10374 10375 10376 10377 10378 10379 10380 10381 10382 10383 10384 10385 10386 10387 10388 10389 10390 10391 10392 10393 10394 10395 10396 10397 10398 10399 10400 10401 10402 10403 10404 10405 10406 10407 10408 10409 10410 10411 10412 10413 10414 10415 10416 10417 10418 10419 10420 10421 10422 10423 10424 10425 10426 10427 10428 10429 10430 10431 10432 10433 10434 10435 10436 10437 10438 10439 10440 10441 10442 10443 10444 10445 10446 10447 10448 10449 10450 10451 10452 10453 10454 10455 10456 10457 10458 10459 10460 10461 10462 10463 10464 10465 10466 10467 10468 10469 10470 10471 10472 10473 10474 10475 10476 10477 10478 10479 10480 10481 10482 10483 10484 10485 10486 10487 10488 10489 10490 10491 10492 10493 10494 10495 10496 10497 10498 10499 10500 10501 10502 10503 10504 10505 10506 10507 10508 10509 10510 10511 10512 10513 10514 10515 10516 10517 10518 10519 10520 10521 10522 10523 10524 10525 10526 10527 10528 10529 10530 10531 10532 10533 10534 10535 10536 10537 10538 10539 10540 10541 10542 10543 10544 10545 10546 10547 10548 10549 10550 10551 10552 10553 10554 10555 10556 10557 10558 10559 10560 10561 10562 10563 10564 10565 10566 10567 10568 10569 10570 10571 10572 10573 10574 10575 10576 10577 10578 10579 10580 10581 10582 10583 10584 10585 10586 10587 10588 10589 10590 10591 10592 10593 10594 10595 10596 10597 10598 10599 10600 10601 10602 10603 10604 10605 10606 10607 10608 10609 10610 10611 10612 10613 10614 10615 10616 10617 10618 10619 10620 10621 10622 10623 10624 10625 10626 10627 10628 10629 10630 10631 10632 10633 10634 10635 10636 10637 10638 10639 10640 10641 10642 10643 10644 10645 10646 10647 10648 10649 10650 10651 10652 10653 10654 10655 10656 10657 10658 10659 10660 10661 10662 10663 10664 10665 10666 10667 10668 10669 10670 10671 10672 10673 10674 10675 10676 10677 10678 10679 10680 10681 10682 10683 10684 10685 10686 10687 10688 10689 10690 10691 10692 10693 10694 10695 10696 10697 10698 10699 10700 10701 10702 10703 10704 10705 10706 10707 10708 10709 10710 10711 10712 10713 10714 10715 10716 10717 10718 10719 10720 10721 10722 10723 10724 10725 10726 10727 10728 10729 10730 10731 10732 10733 10734 10735 10736 10737 10738 10739 10740 10741 10742 10743 10744 10745 10746 10747 10748 10749 10750 10751 10752 10753 10754 10755 10756 10757 10758 10759 10760 10761 10762 10763 10764 10765 10766 10767 10768 10769 10770 10771 10772 10773 10774 10775 10776 10777 10778 10779 10780 10781 10782 10783 10784 10785 10786 10787 10788 10789 10790 10791 10792 10793 10794 10795 10796 10797 10798 10799 10800 10801 10802 10803 10804 10805 10806 10807 10808 10809 10810 10811 10812 10813 10814 10815 10816 10817 10818 10819 10820 10821 10822 10823 10824 10825 10826 10827 10828 10829 10830 10831 10832 10833 10834 10835 10836 10837 10838 10839 10840 10841 10842 10843 10844 10845 10846 10847 10848 10849 10850 10851 10852 10853 10854 10855 10856 10857 10858 10859 10860 10861 10862 10863 10864 10865 10866 10867 10868 10869 10870 10871 10872 10873 10874 10875 10876 10877 10878 10879 10880 10881 10882 10883 10884 10885 10886 10887 10888 10889 10890 10891 10892 10893 10894 10895 10896 10897 10898 10899 10900 10901 10902 10903 10904 10905 10906 10907 10908 10909 10910 10911 10912 10913 10914 10915 10916 10917 10918 10919 10920 10921 10922 10923 10924 10925 10926 10927 10928 10929 10930 10931 10932 10933 10934 10935 10936 10937 10938 10939 10940 10941 10942 10943 10944 10945 10946 10947 10948 10949 10950 10951 10952 10953 10954 10955 10956 10957 10958 10959 10960 10961 10962 10963 10964 10965 10966 10967 10968 10969 10970 10971 10972 10973 10974 10975 10976 10977 10978 10979 10980 10981 10982 10983 10984 10985 10986 10987 10988 10989 10990 10991 10992 10993 10994 10995 10996 10997 10998 10999 11000 11001 11002 11003 11004 11005 11006 11007 11008 11009 11010 11011 11012 11013 11014 11015 11016 11017 11018 11019 11020 11021 11022 11023 11024 11025 11026 11027 11028 11029 11030 11031 11032 11033 11034 11035 11036 11037 11038 11039 11040 11041 11042 11043 11044 11045 11046 11047 11048 11049 11050 11051 11052 11053 11054 11055 11056 11057 11058 11059 11060 11061 11062 11063 11064 11065 11066 11067 11068 11069 11070 11071 11072 11073 11074 11075 11076 11077 11078 11079 11080 11081 11082 11083 11084 11085 11086 11087 11088 11089 11090 11091 11092 11093 11094 11095 11096 11097 11098 11099 11100 11101 11102 11103 11104 11105 11106 11107 11108 11109 11110 11111 11112 11113 11114 11115 11116 11117 11118 11119 11120 11121 11122 11123 11124 11125 11126 11127 11128 11129 11130 11131 11132 11133 11134 11135 11136 11137 11138 11139 11140 11141 11142 11143 11144 11145 11146 11147 11148 11149 11150 11151 11152 11153 11154 11155 11156 11157 11158 11159 11160 11161 11162 11163 11164 11165 11166 11167 11168 11169 11170 11171 11172 11173 11174 11175 11176 11177 11178 11179 11180 11181 11182 11183 11184 11185 11186 11187 11188 11189 11190 11191 11192 11193 11194 11195 11196 11197 11198 11199 11200 11201 11202 11203 11204 11205 11206 11207 11208 11209 11210 11211 11212 11213 11214 11215 11216 11217 11218 11219 11220 11221 11222 11223 11224 11225 11226 11227 11228 11229 11230 11231 11232 11233 11234 11235 11236 11237 11238 11239 11240 11241 11242 11243 11244 11245 11246 11247 11248 11249 11250 11251 11252 11253 11254 11255 11256 11257 11258 11259 11260 11261 11262 11263 11264 11265 11266 11267 11268 11269 11270 11271 11272 11273 11274 11275 11276 11277 11278 11279 11280 11281 11282 11283 11284 11285 11286 11287 11288 11289 11290 11291 11292 11293 11294 11295 11296 11297 11298 11299 11300 11301 11302 11303 11304 11305 11306 11307 11308 11309 11310 11311 11312 11313 11314 11315 11316 11317 11318 11319 11320 11321 11322 11323 11324 11325 11326 11327 11328 11329 11330 11331 11332 11333 11334 11335 11336 11337 11338 11339 11340 11341 11342 11343 11344 11345 11346 11347 11348 11349 11350 11351 11352 11353 11354 11355 11356 11357 11358 11359 11360 11361 11362 11363 11364 11365 11366 11367 11368 11369 11370 11371 11372 11373 11374 11375 11376 11377 11378 11379 11380 11381 11382 11383 11384 11385 11386 11387 11388 11389 11390 11391 11392 11393 11394 11395 11396 11397 11398 11399 11400 11401 11402 11403 11404 11405 11406 11407 11408 11409 11410 11411 11412 11413 11414 11415 11416 11417 11418 11419 11420 11421 11422 11423 11424 11425 11426 11427 11428 11429 11430 11431 11432 11433 11434 11435 11436 11437 11438 11439 11440 11441 11442 11443 11444 11445 11446 11447 11448 11449 11450 11451 11452 11453 11454 11455 11456 11457 11458 11459 11460 11461 11462 11463 11464 11465 11466 11467 11468 11469 11470 11471 11472 11473 11474 11475 11476 11477 11478 11479 11480 11481 11482 11483 11484 11485 11486 11487 11488 11489 11490 11491 11492 11493 11494 11495 11496 11497 11498 11499 11500 11501 11502 11503 11504 11505 11506 11507 11508 11509 11510 11511 11512 11513 11514 11515 11516 11517 11518 11519 11520 11521 11522 11523 11524 11525 11526 11527 11528 11529 11530 11531 11532 11533 11534 11535 11536 11537 11538 11539 11540 11541 11542 11543 11544 11545 11546 11547 11548 11549 11550 11551 11552 11553 11554 11555 11556 11557 11558 11559 11560 11561 11562 11563 11564 11565 11566 11567 11568 11569 11570 11571 11572 11573 11574 11575 11576 11577 11578 11579 11580 11581 11582 11583 11584 11585 11586 11587 11588 11589 11590 11591 11592 11593 11594 11595 11596 11597 11598 11599 11600 11601 11602 11603 11604 11605 11606 11607 11608 11609 11610 11611 11612 11613 11614 11615 11616 11617 11618 11619 11620 11621 11622 11623 11624 11625 11626 11627 11628 11629 11630 11631 11632 11633 11634 11635 11636 11637 11638 11639 11640 11641 11642 11643 11644 11645 11646 11647 11648 11649 11650 11651 11652 11653 11654 11655 11656 11657 11658 11659 11660 11661 11662 11663 11664 11665 11666 11667 11668 11669 11670 11671 11672 11673 11674 11675 11676 11677 11678 11679 11680 11681 11682 11683 11684 11685 11686 11687 11688 11689 11690 11691 11692 11693 11694 11695 11696 11697 11698 11699 11700 11701 11702 11703 11704 11705 11706 11707 11708 11709 11710 11711 11712 11713 11714 11715 11716 11717 11718 11719 11720 11721 11722 11723 11724 11725 11726 11727 11728 11729 11730 11731 11732 11733 11734 11735 11736 11737 11738 11739 11740 11741 11742 11743 11744 11745 11746 11747 11748 11749 11750 11751 11752 11753 11754 11755 11756 11757 11758 11759 11760 11761 11762 11763 11764 11765 11766 11767 11768 11769 11770 11771 11772 11773 11774 11775 11776 11777 11778 11779 11780 11781 11782 11783 11784 11785 11786 11787 11788 11789 11790 11791 11792 11793 11794 11795 11796 11797 11798 11799 11800 11801 11802 11803 11804 11805 11806 11807 11808 11809 11810 11811 11812 11813 11814 11815 11816 11817 11818 11819 11820 11821 11822 11823 11824 11825 11826 11827 11828 11829 11830 11831 11832 11833 11834 11835 11836 11837 11838 11839 11840 11841 11842 11843 11844 11845 11846 11847 11848 11849 11850 11851 11852 11853 11854 11855 11856 11857 11858 11859 11860 11861 11862 11863 11864 11865 11866 11867 11868 11869 11870 11871 11872 11873 11874 11875 11876 11877 11878 11879 11880 11881 11882 11883 11884 11885 11886 11887 11888 11889 11890 11891 11892 11893 11894 11895 11896 11897 11898 11899 11900 11901 11902 11903 11904 11905 11906 11907 11908 11909 11910 11911 11912 11913 11914 11915 11916 11917 11918 11919 11920 11921 11922 11923 11924 11925 11926 11927 11928 11929 11930 11931 11932 11933 11934 11935 11936 11937 11938 11939 11940 11941 11942 11943 11944 11945 11946 11947 11948 11949 11950 11951 11952 11953 11954 11955 11956 11957 11958 11959 11960 11961 11962 11963 11964 11965 11966 11967 11968 11969 11970 11971 11972 11973 11974 11975 11976 11977 11978 11979 11980 11981 11982 11983 11984 11985 11986 11987 11988 11989 11990 11991 11992 11993 11994 11995 11996 11997 11998 11999 12000 12001 12002 12003 12004 12005 12006 12007 12008 12009 12010 12011 12012 12013 12014 12015 12016 12017 12018 12019 12020 12021 12022 12023 12024 12025 12026 12027 12028 12029 12030 12031 12032 12033 12034 12035 12036 12037 12038 12039 12040 12041 12042 12043 12044 12045 12046 12047 12048 12049 12050 12051 12052 12053 12054 12055 12056 12057 12058 12059 12060 12061 12062 12063 12064 12065 12066 12067 12068 12069 12070 12071 12072 12073 12074 12075 12076 12077 12078 12079 12080 12081 12082 12083 12084 12085 12086 12087 12088 12089 12090 12091 12092 12093 12094 12095 12096 12097 12098 12099 12100 12101 12102 12103 12104 12105 12106 12107 12108 12109 12110 12111 12112 12113 12114 12115 12116 12117 12118 12119 12120 12121 12122 12123 12124 12125 12126 12127 12128 12129 12130 12131 12132 12133 12134 12135 12136 12137 12138 12139 12140 12141 12142 12143 12144 12145 12146 12147 12148 12149 12150 12151 12152 12153 12154 12155 12156 12157 12158 12159 12160 12161 12162 12163 12164 12165 12166 12167 12168 12169 12170 12171 12172 12173 12174 12175 12176 12177 12178 12179 12180 12181 12182 12183 12184 12185 12186 12187 12188 12189 12190 12191 12192 12193 12194 12195 12196 12197 12198 12199 12200 12201 12202 12203 12204 12205 12206 12207 12208 12209 12210 12211 12212 12213 12214 12215 12216 12217 12218 12219 12220 12221 12222 12223 12224 12225 12226 12227 12228 12229 12230 12231 12232 12233 12234 12235 12236 12237 12238 12239 12240 12241 12242 12243 12244 12245 12246 12247 12248 12249 12250 12251 12252 12253 12254 12255 12256 12257 12258 12259 12260 12261 12262 12263 12264 12265 12266 12267 12268 12269 12270 12271 12272 12273 12274 12275 12276 12277 12278 12279 12280 12281 12282 12283 12284 12285 12286 12287 12288 12289 12290 12291 12292 12293 12294 12295 12296 12297 12298 12299 12300 12301 12302 12303 12304 12305 12306 12307 12308 12309 12310 12311 12312 12313 12314 12315 12316 12317 12318 12319 12320 12321 12322 12323 12324 12325 12326 12327 12328 12329 12330 12331 12332 12333 12334 12335 12336 12337 12338 12339 12340 12341 12342 12343 12344 12345 12346 12347 12348 12349 12350 12351 12352 12353 12354 12355 12356 12357 12358 12359 12360 12361 12362 12363 12364 12365 12366 12367 12368 12369 12370 12371 12372 12373 12374 12375 12376 12377 12378 12379 12380 12381 12382 12383 12384 12385 12386 12387 12388 12389 12390 12391 12392 12393 12394 12395 12396 12397 12398 12399 12400 12401 12402 12403 12404 12405 12406 12407 12408 12409 12410 12411 12412 12413 12414 12415 12416 12417 12418 12419 12420 12421 12422 12423 12424 12425 12426 12427 12428 12429 12430 12431 12432 12433 12434 12435 12436 12437 12438 12439 12440 12441 12442 12443 12444 12445 12446 12447 12448 12449 12450 12451 12452 12453 12454 12455 12456 12457 12458 12459 12460 12461 12462 12463 12464 12465 12466 12467 12468 12469 12470 12471 12472 12473 12474 12475 12476 12477 12478 12479 12480 12481 12482 12483 12484 12485 12486 12487 12488 12489 12490 12491 12492 12493 12494 12495 12496 12497 12498 12499 12500 12501 12502 12503 12504 12505 12506 12507 12508 12509 12510 12511 12512 12513 12514 12515 12516 12517 12518 12519 12520 12521 12522 12523 12524 12525 12526 12527 12528 12529 12530 12531 12532 12533 12534 12535 12536 12537 12538 12539 12540 12541 12542 12543 12544 12545 12546 12547 12548 12549 12550 12551 12552 12553 12554 12555 12556 12557 12558 12559 12560 12561 12562 12563 12564 12565 12566 12567 12568 12569 12570 12571 12572 12573 12574 12575 12576 12577 12578 12579 12580 12581 12582 12583 12584 12585 12586 12587 12588 12589 12590 12591 12592 12593 12594 12595 12596 12597 12598 12599 12600 12601 12602 12603 12604 12605 12606 12607 12608 12609 12610 12611 12612 12613 12614 12615 12616 12617 12618 12619 12620 12621 12622 12623 12624 12625 12626 12627 12628 12629 12630 12631 12632 12633 12634 12635 12636 12637 12638 12639 12640 12641 12642 12643 12644 12645 12646 12647 12648 12649 12650 12651 12652 12653 12654 12655 12656 12657 12658 12659 12660 12661 12662 12663 12664 12665 12666 12667 12668 12669 12670 12671 12672 12673 12674 12675 12676 12677 12678 12679 12680 12681 12682 12683 12684 12685 12686 12687 12688 12689 12690 12691 12692 12693 12694 12695 12696 12697 12698 12699 12700 12701 12702 12703 12704 12705 12706 12707 12708 12709 12710 12711 12712 12713 12714 12715 12716 12717 12718 12719 12720 12721 12722 12723 12724 12725 12726 12727 12728 12729 12730 12731 12732 12733 12734 12735 12736 12737 12738 12739 12740 12741 12742 12743 12744 12745 12746 12747 12748 12749 12750 12751 12752 12753 12754 12755 12756 12757 12758 12759 12760 12761 12762 12763 12764 12765 12766 12767 12768 12769 12770 12771 12772 12773 12774 12775 12776 12777 12778 12779 12780 12781 12782 12783 12784 12785 12786 12787 12788 12789 12790 12791 12792 12793 12794 12795 12796 12797 12798 12799 12800 12801 12802 12803 12804 12805 12806 12807 12808 12809 12810 12811 12812 12813 12814 12815 12816 12817 12818 12819 12820 12821 12822 12823 12824 12825 12826 12827 12828 12829 12830 12831 12832 12833 12834 12835 12836 12837 12838 12839 12840 12841 12842 12843 12844 12845 12846 12847 12848 12849 12850 12851 12852 12853 12854 12855 12856 12857 12858 12859 12860 12861 12862 12863 12864 12865 12866 12867 12868 12869 12870 12871 12872 12873 12874 12875 12876 12877 12878 12879 12880 12881 12882 12883 12884 12885 12886 12887 12888 12889 12890 12891 12892 12893 12894 12895 12896 12897 12898 12899 12900 12901 12902 12903 12904 12905 12906 12907 12908 12909 12910 12911 12912 12913 12914 12915 12916 12917 12918 12919 12920 12921 12922 12923 12924 12925 12926 12927 12928 12929 12930 12931 12932 12933 12934 12935 12936 12937 12938 12939 12940 12941 12942 12943 12944 12945 12946 12947 12948 12949 12950 12951 12952 12953 12954 12955 12956 12957 12958 12959 12960 12961 12962 12963 12964 12965 12966 12967 12968 12969 12970 12971 12972 12973 12974 12975 12976 12977 12978 12979 12980 12981 12982 12983 12984 12985 12986 12987 12988 12989 12990 12991 12992 12993 12994 12995 12996 12997 12998 12999 13000 13001 13002 13003 13004 13005 13006 13007 13008 13009 13010 13011 13012 13013 13014 13015 13016 13017 13018 13019 13020 13021 13022 13023 13024 13025 13026 13027 13028 13029 13030 13031 13032 13033 13034 13035 13036 13037 13038 13039 13040 13041 13042 13043 13044 13045 13046 13047 13048 13049 13050 13051 13052 13053 13054 13055 13056 13057 13058 13059 13060 13061 13062 13063 13064 13065 13066 13067 13068 13069 13070 13071 13072 13073 13074 13075 13076 13077 13078 13079 13080 13081 13082 13083 13084 13085 13086 13087 13088 13089 13090 13091 13092 13093 13094 13095 13096 13097 13098 13099 13100 13101 13102 13103 13104 13105 13106 13107 13108 13109 13110 13111 13112 13113 13114 13115 13116 13117 13118 13119 13120 13121 13122 13123 13124 13125 13126 13127 13128 13129 13130 13131 13132 13133 13134 13135 13136 13137 13138 13139 13140 13141 13142 13143 13144 13145 13146 13147 13148 13149 13150 13151 13152 13153 13154 13155 13156 13157 13158 13159 13160 13161 13162 13163 13164 13165 13166 13167 13168 13169 13170 13171 13172 13173 13174 13175 13176 13177 13178 13179 13180 13181 13182 13183 13184 13185 13186 13187 13188 13189 13190 13191 13192 13193 13194 13195 13196 13197 13198 13199 13200 13201 13202 13203 13204 13205 13206 13207 13208 13209 13210 13211 13212 13213 13214 13215 13216 13217 13218 13219 13220 13221 13222 13223 13224 13225 13226 13227 13228 13229 13230 13231 13232 13233 13234 13235 13236 13237 13238 13239 13240 13241 13242 13243 13244 13245 13246 13247 13248 13249 13250 13251 13252 13253 13254 13255 13256 13257 13258 13259 13260 13261 13262 13263 13264 13265 13266 13267 13268 13269 13270 13271 13272 13273 13274 13275 13276 13277 13278 13279 13280 13281 13282 13283 13284 13285 13286 13287 13288 13289 13290 13291 13292 13293 13294 13295 13296 13297 13298 13299 13300 13301 13302 13303 13304 13305 13306 13307 13308 13309 13310 13311 13312 13313 13314 13315 13316 13317 13318 13319 13320 13321 13322 13323 13324 13325 13326 13327 13328 13329 13330 13331 13332 13333 13334 13335 13336 13337 13338 13339 13340 13341 13342 13343 13344 13345 13346 13347 13348 13349 13350 13351 13352 13353 13354 13355 13356 13357 13358 13359 13360 13361 13362 13363 13364 13365 13366 13367 13368 13369 13370 13371 13372 13373 13374 13375 13376 13377 13378 13379 13380 13381 13382 13383 13384 13385 13386 13387 13388 13389 13390 13391 13392 13393 13394 13395 13396 13397 13398 13399 13400 13401 13402 13403 13404 13405 13406 13407 13408 13409 13410 13411 13412 13413 13414 13415 13416 13417 13418 13419 13420 13421 13422 13423 13424 13425 13426 13427 13428 13429 13430 13431 13432 13433 13434 13435 13436 13437 13438 13439 13440 13441 13442 13443 13444 13445 13446 13447 13448 13449 13450 13451 13452 13453 13454 13455 13456 13457 13458 13459 13460 13461 13462 13463 13464 13465 13466 13467 13468 13469 13470 13471 13472 13473 13474 13475 13476 13477 13478 13479 13480 13481 13482 13483 13484 13485 13486 13487 13488 13489 13490 13491 13492 13493 13494 13495 13496 13497 13498 13499 13500 13501 13502 13503 13504 13505 13506 13507 13508 13509 13510 13511 13512 13513 13514 13515 13516 13517 13518 13519 13520 13521 13522 13523 13524 13525 13526 13527 13528 13529 13530 13531 13532 13533 13534 13535 13536 13537 13538 13539 13540 13541 13542 13543 13544 13545 13546 13547 13548 13549 13550 13551 13552 13553 13554 13555 13556 13557 13558 13559 13560 13561 13562 13563 13564 13565 13566 13567 13568 13569 13570 13571 13572 13573 13574 13575 13576 13577 13578 13579 13580 13581 13582 13583 13584 13585 13586 13587 13588 13589 13590 13591 13592 13593 13594 13595 13596 13597 13598 13599 13600 13601 13602 13603 13604 13605 13606 13607 13608 13609 13610 13611 13612 13613 13614 13615 13616 13617 13618 13619 13620 13621 13622 13623 13624 13625 13626 13627 13628 13629 13630 13631 13632 13633 13634 13635 13636 13637 13638 13639 13640 13641 13642 13643 13644 13645 13646 13647 13648 13649 13650 13651 13652 13653 13654 13655 13656 13657 13658 13659 13660 13661 13662 13663 13664 13665 13666 13667 13668 13669 13670 13671 13672 13673 13674 13675 13676 13677 13678 13679 13680 13681 13682 13683 13684 13685 13686 13687 13688 13689 13690 13691 13692 13693 13694 13695 13696 13697 13698 13699 13700 13701 13702 13703 13704 13705 13706 13707 13708 13709 13710 13711 13712 13713 13714 13715 13716 13717 13718 13719 13720 13721 13722 13723 13724 13725 13726 13727 13728 13729 13730 13731 13732 13733 13734 13735 13736 13737 13738 13739 13740 13741 13742 13743 13744 13745 13746 13747 13748 13749 13750 13751 13752 13753 13754 13755 13756 13757 13758 13759 13760 13761 13762 13763 13764 13765 13766 13767 13768 13769 13770 13771 13772 13773 13774 13775 13776 13777 13778 13779 13780 13781 13782 13783 13784 13785 13786 13787 13788 13789 13790 13791 13792 13793 13794 13795 13796 13797 13798 13799 13800 13801 13802 13803 13804 13805 13806 13807 13808 13809 13810 13811 13812 13813 13814 13815 13816 13817 13818 13819 13820 13821 13822 13823 13824 13825 13826 13827 13828 13829 13830 13831 13832 13833 13834 13835 13836 13837 13838 13839 13840 13841 13842 13843 13844 13845 13846 13847 13848 13849 13850 13851 13852 13853 13854 13855 13856 13857 13858 13859 13860 13861 13862 13863 13864 13865 13866 13867 13868 13869 13870 13871 13872 13873 13874 13875 13876 13877 13878 13879 13880 13881 13882 13883 13884 13885 13886 13887 13888 13889 13890 13891 13892 13893 13894 13895 13896 13897 13898 13899 13900 13901 13902 13903 13904 13905 13906 13907 13908 13909 13910 13911 13912 13913 13914 13915 13916 13917 13918 13919 13920 13921 13922 13923 13924 13925 13926 13927 13928 13929 13930 13931 13932 13933 13934 13935 13936 13937 13938 13939 13940 13941 13942 13943 13944 13945 13946 13947 13948 13949 13950 13951 13952 13953 13954 13955 13956 13957 13958 13959 13960 13961 13962 13963 13964 13965 13966 13967 13968 13969 13970 13971 13972 13973 13974 13975 13976 13977 13978 13979 13980 13981 13982 13983 13984 13985 13986 13987 13988 13989 13990 13991 13992 13993 13994 13995 13996 13997 13998 13999 14000 14001 14002 14003 14004 14005 14006 14007 14008 14009 14010 14011 14012 14013 14014 14015 14016 14017 14018 14019 14020 14021 14022 14023 14024 14025 14026 14027 14028 14029 14030 14031 14032 14033 14034 14035 14036 14037 14038 14039 14040 14041 14042 14043 14044 14045 14046 14047 14048 14049 14050 14051 14052 14053 14054 14055 14056 14057 14058 14059 14060 14061 14062 14063 14064 14065 14066 14067 14068 14069 14070 14071 14072 14073 14074 14075 14076 14077 14078 14079 14080 14081 14082 14083 14084 14085 14086 14087 14088 14089 14090 14091 14092 14093 14094 14095 14096 14097 14098 14099 14100 14101 14102 14103 14104 14105 14106 14107 14108 14109 14110 14111 14112 14113 14114 14115 14116 14117 14118 14119 14120 14121 14122 14123 14124 14125 14126 14127 14128 14129 14130 14131 14132 14133 14134 14135 14136 14137 14138 14139 14140 14141 14142 14143 14144 14145 14146 14147 14148 14149 14150 14151 14152 14153 14154 14155 14156 14157 14158 14159 14160 14161 14162 14163 14164 14165 14166 14167 14168 14169 14170 14171 14172 14173 14174 14175 14176 14177 14178 14179 14180 14181 14182 14183 14184 14185 14186 14187 14188 14189 14190 14191 14192 14193 14194 14195 14196 14197 14198 14199 14200 14201 14202 14203 14204 14205 14206 14207 14208 14209 14210 14211 14212 14213 14214 14215 14216 14217 14218 14219 14220 14221 14222 14223 14224 14225 14226 14227 14228 14229 14230 14231 14232 14233 14234 14235 14236 14237 14238 14239 14240 14241 14242 14243 14244 14245 14246 14247 14248 14249 14250 14251 14252 14253 14254 14255 14256 14257 14258 14259 14260 14261 14262 14263 14264 14265 14266 14267 14268 14269 14270 14271 14272 14273 14274 14275 14276 14277 14278 14279 14280 14281 14282 14283 14284 14285 14286 14287 14288 14289 14290 14291 14292 14293 14294 14295 14296 14297 14298 14299 14300 14301 14302 14303 14304 14305 14306 14307 14308 14309 14310 14311 14312 14313 14314 14315 14316 14317 14318 14319 14320 14321 14322 14323 14324 14325 14326 14327 14328 14329 14330 14331 14332 14333 14334 14335 14336 14337 14338 14339 14340 14341 14342 14343 14344 14345 14346 14347 14348 14349 14350 14351 14352 14353 14354 14355 14356 14357 14358 14359 14360 14361 14362 14363 14364 14365 14366 14367 14368 14369 14370 14371 14372 14373 14374 14375 14376 14377 14378 14379 14380 14381 14382 14383 14384 14385 14386 14387 14388 14389 14390 14391 14392 14393 14394 14395 14396 14397 14398 14399 14400 14401 14402 14403 14404 14405 14406 14407 14408 14409 14410 14411 14412 14413 14414 14415 14416 14417 14418 14419 14420 14421 14422 14423 14424 14425 14426 14427 14428 14429 14430 14431 14432 14433 14434 14435 14436 14437 14438 14439 14440 14441 14442 14443 14444 14445 14446 14447 14448 14449 14450 14451 14452 14453 14454 14455 14456 14457 14458 14459 14460 14461 14462 14463 14464 14465 14466 14467 14468 14469 14470 14471 14472 14473 14474 14475 14476 14477 14478 14479 14480 14481 14482 14483 14484 14485 14486 14487 14488 14489 14490 14491 14492 14493 14494 14495 14496 14497 14498 14499 14500 14501 14502 14503 14504 14505 14506 14507 14508 14509 14510 14511 14512 14513 14514 14515 14516 14517 14518 14519 14520 14521 14522 14523 14524 14525 14526 14527 14528 14529 14530 14531 14532 14533 14534 14535 14536 14537 14538 14539 14540 14541 14542 14543 14544 14545 14546 14547 14548 14549 14550 14551 14552 14553 14554 14555 14556 14557 14558 14559 14560 14561 14562 14563 14564 14565 14566 14567 14568 14569 14570 14571 14572 14573 14574 14575 14576 14577 14578 14579 14580 14581 14582 14583 14584 14585 14586 14587 14588 14589 14590 14591 14592 14593 14594 14595 14596 14597 14598 14599 14600 14601 14602 14603 14604 14605 14606 14607 14608 14609 14610 14611 14612 14613 14614 14615 14616 14617 14618 14619 14620 14621 14622 14623 14624 14625 14626 14627 14628 14629 14630 14631 14632 14633 14634 14635 14636 14637 14638 14639 14640 14641 14642 14643 14644 14645 14646 14647 14648 14649 14650 14651 14652 14653 14654 14655 14656 14657 14658 14659 14660 14661 14662 14663 14664 14665 14666 14667 14668 14669 14670 14671 14672 14673 14674 14675 14676 14677 14678 14679 14680 14681 14682 14683 14684 14685 14686 14687 14688 14689 14690 14691 14692 14693 14694 14695 14696 14697 14698 14699 14700 14701 14702 14703 14704 14705 14706 14707 14708 14709 14710 14711 14712 14713 14714 14715 14716 14717 14718 14719 14720 14721 14722 14723 14724 14725 14726 14727 14728 14729 14730 14731 14732 14733 14734 14735 14736 14737 14738 14739 14740 14741 14742 14743 14744 14745 14746 14747 14748 14749 14750 14751 14752 14753 14754 14755 14756 14757 14758 14759 14760 14761 14762 14763 14764 14765 14766 14767 14768 14769 14770 14771 14772 14773 14774 14775 14776 14777 14778 14779 14780 14781 14782 14783 14784 14785 14786 14787 14788 14789 14790 14791 14792 14793 14794 14795 14796 14797 14798 14799 14800 14801 14802 14803 14804 14805 14806 14807 14808 14809 14810 14811 14812 14813 14814 14815 14816 14817 14818 14819 14820 14821 14822 14823 14824 14825 14826 14827 14828 14829 14830 14831 14832 14833 14834 14835 14836 14837 14838 14839 14840 14841 14842 14843 14844 14845 14846 14847 14848 14849 14850 14851 14852 14853 14854 14855 14856 14857 14858 14859 14860 14861 14862 14863 14864 14865 14866 14867 14868 14869 14870 14871 14872 14873 14874 14875 14876 14877 14878 14879 14880 14881 14882 14883 14884 14885 14886 14887 14888 14889 14890 14891 14892 14893 14894 14895 14896 14897 14898 14899 14900 14901 14902 14903 14904 14905 14906 14907 14908 14909 14910 14911 14912 14913 14914 14915 14916 14917 14918 14919 14920 14921 14922 14923 14924 14925 14926 14927 14928 14929 14930 14931 14932 14933 14934 14935 14936 14937 14938 14939 14940 14941 14942 14943 14944 14945 14946 14947 14948 14949 14950 14951 14952 14953 14954 14955 14956 14957 14958 14959 14960 14961 14962 14963 14964 14965 14966 14967 14968 14969 14970 14971 14972 14973 14974 14975 14976 14977 14978 14979 14980 14981 14982 14983 14984 14985 14986 14987 14988 14989 14990 14991 14992 14993 14994 14995 14996 14997 14998 14999 15000 15001 15002 15003 15004 15005 15006 15007 15008 15009 15010 15011 15012 15013 15014 15015 15016 15017 15018 15019 15020 15021 15022 15023 15024 15025 15026 15027 15028 15029 15030 15031 15032 15033 15034 15035 15036 15037 15038 15039 15040 15041 15042 15043 15044 15045 15046 15047 15048 15049 15050 15051 15052 15053 15054 15055 15056 15057 15058 15059 15060 15061 15062 15063 15064 15065 15066 15067 15068 15069 15070 15071 15072 15073 15074 15075 15076 15077 15078 15079 15080 15081 15082 15083 15084 15085 15086 15087 15088 15089 15090 15091 15092 15093 15094 15095 15096 15097 15098 15099 15100 15101 15102 15103 15104 15105 15106 15107 15108 15109 15110 15111 15112 15113 15114 15115 15116 15117 15118 15119 15120 15121 15122 15123 15124 15125 15126 15127 15128 15129 15130 15131 15132 15133 15134 15135 15136 15137 15138 15139 15140 15141 15142 15143 15144 15145 15146 15147 15148 15149 15150 15151 15152 15153 15154 15155 15156 15157 15158 15159 15160 15161 15162 15163 15164 15165 15166 15167 15168 15169 15170 15171 15172 15173 15174 15175 15176 15177 15178 15179 15180 15181 15182 15183 15184 15185 15186 15187 15188 15189 15190 15191 15192 15193 15194 15195 15196 15197 15198 15199 15200 15201 15202 15203 15204 15205 15206 15207 15208 15209 15210 15211 15212 15213 15214 15215 15216 15217 15218 15219 15220 15221 15222 15223 15224 15225 15226 15227 15228 15229 15230 15231 15232 15233 15234 15235 15236 15237 15238 15239 15240 15241 15242 15243 15244 15245 15246 15247 15248 15249 15250 15251 15252 15253 15254 15255 15256 15257 15258 15259 15260 15261 15262 15263 15264 15265 15266 15267 15268 15269 15270 15271 15272 15273 15274 15275 15276 15277 15278 15279 15280 15281 15282 15283 15284 15285 15286 15287 15288 15289 15290 15291 15292 15293 15294 15295 15296 15297 15298 15299 15300 15301 15302 15303 15304 15305 15306 15307 15308 15309 15310 15311 15312 15313 15314 15315 15316 15317 15318 15319 15320 15321 15322 15323 15324 15325 15326 15327 15328 15329 15330 15331 15332 15333 15334 15335 15336 15337 15338 15339 15340 15341 15342 15343 15344 15345 15346 15347 15348 15349 15350 15351 15352 15353 15354 15355 15356 15357 15358 15359 15360 15361 15362 15363 15364 15365 15366 15367 15368 15369 15370 15371 15372 15373 15374 15375 15376 15377 15378 15379 15380 15381 15382 15383 15384 15385 15386 15387 15388 15389 15390 15391 15392 15393 15394 15395 15396 15397 15398 15399 15400 15401 15402 15403 15404 15405 15406 15407 15408 15409 15410 15411 15412 15413 15414 15415 15416 15417 15418 15419 15420 15421 15422 15423 15424 15425 15426 15427 15428 15429 15430 15431 15432 15433 15434 15435 15436 15437 15438 15439 15440 15441 15442 15443 15444 15445 15446 15447 15448 15449 15450 15451 15452 15453 15454 15455 15456 15457 15458 15459 15460 15461 15462 15463 15464 15465 15466 15467 15468 15469 15470 15471 15472 15473 15474 15475 15476 15477 15478 15479 15480 15481 15482 15483 15484 15485 15486 15487 15488 15489 15490 15491 15492 15493 15494 15495 15496 15497 15498 15499 15500 15501 15502 15503 15504 15505 15506 15507 15508 15509 15510 15511 15512 15513 15514 15515 15516 15517 15518 15519 15520 15521 15522 15523 15524 15525 15526 15527 15528 15529 15530 15531 15532 15533 15534 15535 15536 15537 15538 15539 15540 15541 15542 15543 15544 15545 15546 15547 15548 15549 15550 15551 15552 15553 15554 15555 15556 15557 15558 15559 15560 15561 15562 15563 15564 15565 15566 15567 15568 15569 15570 15571 15572 15573 15574 15575 15576 15577 15578 15579 15580 15581 15582 15583 15584 15585 15586 15587 15588 15589 15590 15591 15592 15593 15594 15595 15596 15597 15598 15599 15600 15601 15602 15603 15604 15605 15606 15607 15608 15609 15610 15611 15612 15613 15614 15615 15616 15617 15618 15619 15620 15621 15622 15623 15624 15625 15626 15627 15628 15629 15630 15631 15632 15633 15634 15635 15636 15637 15638 15639 15640 15641 15642 15643 15644 15645 15646 15647 15648 15649 15650 15651 15652 15653 15654 15655 15656 15657 15658 15659 15660 15661 15662 15663 15664 15665 15666 15667 15668 15669 15670 15671 15672 15673 15674 15675 15676 15677 15678 15679 15680 15681 15682 15683 15684 15685 15686 15687 15688 15689 15690 15691 15692 15693 15694 15695 15696 15697 15698 15699 15700 15701 15702 15703 15704 15705 15706 15707 15708 15709 15710 15711 15712 15713 15714 15715 15716 15717 15718 15719 15720 15721 15722 15723 15724 15725 15726 15727 15728 15729 15730 15731 15732 15733 15734 15735 15736 15737 15738 15739 15740 15741 15742 15743 15744 15745 15746 15747 15748 15749 15750 15751 15752 15753 15754 15755 15756 15757 15758 15759 15760 15761 15762 15763 15764 15765 15766 15767 15768 15769 15770 15771 15772 15773 15774 15775 15776 15777 15778 15779 15780 15781 15782 15783 15784 15785 15786 15787 15788 15789 15790 15791 15792 15793 15794 15795 15796 15797 15798 15799 15800 15801 15802 15803 15804 15805 15806 15807 15808 15809 15810 15811 15812 15813 15814 15815 15816 15817 15818 15819 15820 15821 15822 15823 15824 15825 15826 15827 15828 15829 15830 15831 15832 15833 15834 15835 15836 15837 15838 15839 15840 15841 15842 15843 15844 15845 15846 15847 15848 15849 15850 15851 15852 15853 15854 15855 15856 15857 15858 15859 15860 15861 15862 15863 15864 15865 15866 15867 15868 15869 15870 15871 15872 15873 15874 15875 15876 | /******************************************************************* * This file is part of the Emulex Linux Device Driver for * * Fibre Channel Host Bus Adapters. * * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * * Copyright (C) 2004-2016 Emulex. All rights reserved. * * EMULEX and SLI are trademarks of Emulex. * * www.broadcom.com * * Portions Copyright (C) 2004-2005 Christoph Hellwig * * * * This program is free software; you can redistribute it and/or * * modify it under the terms of version 2 of the GNU General * * Public License as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful. * * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * * TO BE LEGALLY INVALID. See the GNU General Public License for * * more details, a copy of which can be found in the file COPYING * * included with this package. * *******************************************************************/ #include <linux/blkdev.h> #include <linux/delay.h> #include <linux/dma-mapping.h> #include <linux/idr.h> #include <linux/interrupt.h> #include <linux/module.h> #include <linux/kthread.h> #include <linux/pci.h> #include <linux/spinlock.h> #include <linux/sched/clock.h> #include <linux/ctype.h> #include <linux/slab.h> #include <linux/firmware.h> #include <linux/miscdevice.h> #include <linux/percpu.h> #include <linux/irq.h> #include <linux/bitops.h> #include <linux/crash_dump.h> #include <linux/cpu.h> #include <linux/cpuhotplug.h> #include <scsi/scsi.h> #include <scsi/scsi_device.h> #include <scsi/scsi_host.h> #include <scsi/scsi_transport_fc.h> #include <scsi/scsi_tcq.h> #include <scsi/fc/fc_fs.h> #include "lpfc_hw4.h" #include "lpfc_hw.h" #include "lpfc_sli.h" #include "lpfc_sli4.h" #include "lpfc_nl.h" #include "lpfc_disc.h" #include "lpfc.h" #include "lpfc_scsi.h" #include "lpfc_nvme.h" #include "lpfc_logmsg.h" #include "lpfc_crtn.h" #include "lpfc_vport.h" #include "lpfc_version.h" #include "lpfc_ids.h" static enum cpuhp_state lpfc_cpuhp_state; /* Used when mapping IRQ vectors in a driver centric manner */ static uint32_t lpfc_present_cpu; static bool lpfc_pldv_detect; static void __lpfc_cpuhp_remove(struct lpfc_hba *phba); static void lpfc_cpuhp_remove(struct lpfc_hba *phba); static void lpfc_cpuhp_add(struct lpfc_hba *phba); static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); static int lpfc_post_rcv_buf(struct lpfc_hba *); static int lpfc_sli4_queue_verify(struct lpfc_hba *); static int lpfc_create_bootstrap_mbox(struct lpfc_hba *); static int lpfc_setup_endian_order(struct lpfc_hba *); static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *); static void lpfc_free_els_sgl_list(struct lpfc_hba *); static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *); static void lpfc_init_sgl_list(struct lpfc_hba *); static int lpfc_init_active_sgl_array(struct lpfc_hba *); static void lpfc_free_active_sgl(struct lpfc_hba *); static int lpfc_hba_down_post_s3(struct lpfc_hba *phba); static int lpfc_hba_down_post_s4(struct lpfc_hba *phba); static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *); static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *); static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *); static void lpfc_sli4_disable_intr(struct lpfc_hba *); static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t); static void lpfc_sli4_oas_verify(struct lpfc_hba *phba); static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int); static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *); static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *); static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba); static struct scsi_transport_template *lpfc_transport_template = NULL; static struct scsi_transport_template *lpfc_vport_transport_template = NULL; static DEFINE_IDR(lpfc_hba_index); #define LPFC_NVMET_BUF_POST 254 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport); static void lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts); /** * lpfc_config_port_prep - Perform lpfc initialization prior to config port * @phba: pointer to lpfc hba data structure. * * This routine will do LPFC initialization prior to issuing the CONFIG_PORT * mailbox command. It retrieves the revision information from the HBA and * collects the Vital Product Data (VPD) about the HBA for preparing the * configuration of the HBA. * * Return codes: * 0 - success. * -ERESTART - requests the SLI layer to reset the HBA and try again. * Any other value - indicates an error. **/ int lpfc_config_port_prep(struct lpfc_hba *phba) { lpfc_vpd_t *vp = &phba->vpd; int i = 0, rc; LPFC_MBOXQ_t *pmb; MAILBOX_t *mb; char *lpfc_vpd_data = NULL; uint16_t offset = 0; static char licensed[56] = "key unlock for use with gnu public licensed code only\0"; static int init_key = 1; pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { phba->link_state = LPFC_HBA_ERROR; return -ENOMEM; } mb = &pmb->u.mb; phba->link_state = LPFC_INIT_MBX_CMDS; if (lpfc_is_LC_HBA(phba->pcidev->device)) { if (init_key) { uint32_t *ptext = (uint32_t *) licensed; for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) *ptext = cpu_to_be32(*ptext); init_key = 0; } lpfc_read_nv(phba, pmb); memset((char*)mb->un.varRDnvp.rsvd3, 0, sizeof (mb->un.varRDnvp.rsvd3)); memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, sizeof (licensed)); rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); if (rc != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0324 Config Port initialization " "error, mbxCmd x%x READ_NVPARM, " "mbxStatus x%x\n", mb->mbxCommand, mb->mbxStatus); mempool_free(pmb, phba->mbox_mem_pool); return -ERESTART; } memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, sizeof(phba->wwnn)); memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname, sizeof(phba->wwpn)); } /* * Clear all option bits except LPFC_SLI3_BG_ENABLED, * which was already set in lpfc_get_cfgparam() */ phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED; /* Setup and issue mailbox READ REV command */ lpfc_read_rev(phba, pmb); rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); if (rc != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0439 Adapter failed to init, mbxCmd x%x " "READ_REV, mbxStatus x%x\n", mb->mbxCommand, mb->mbxStatus); mempool_free( pmb, phba->mbox_mem_pool); return -ERESTART; } /* * The value of rr must be 1 since the driver set the cv field to 1. * This setting requires the FW to set all revision fields. */ if (mb->un.varRdRev.rr == 0) { vp->rev.rBit = 0; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0440 Adapter failed to init, READ_REV has " "missing revision information.\n"); mempool_free(pmb, phba->mbox_mem_pool); return -ERESTART; } if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) { mempool_free(pmb, phba->mbox_mem_pool); return -EINVAL; } /* Save information as VPD data */ vp->rev.rBit = 1; memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t)); vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); vp->rev.biuRev = mb->un.varRdRev.biuRev; vp->rev.smRev = mb->un.varRdRev.smRev; vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; vp->rev.endecRev = mb->un.varRdRev.endecRev; vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; vp->rev.fcphLow = mb->un.varRdRev.fcphLow; vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; vp->rev.postKernRev = mb->un.varRdRev.postKernRev; vp->rev.opFwRev = mb->un.varRdRev.opFwRev; /* If the sli feature level is less then 9, we must * tear down all RPIs and VPIs on link down if NPIV * is enabled. */ if (vp->rev.feaLevelHigh < 9) phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN; if (lpfc_is_LC_HBA(phba->pcidev->device)) memcpy(phba->RandomData, (char *)&mb->un.varWords[24], sizeof (phba->RandomData)); /* Get adapter VPD information */ lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); if (!lpfc_vpd_data) goto out_free_mbox; do { lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD); rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); if (rc != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0441 VPD not present on adapter, " "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", mb->mbxCommand, mb->mbxStatus); mb->un.varDmp.word_cnt = 0; } /* dump mem may return a zero when finished or we got a * mailbox error, either way we are done. */ if (mb->un.varDmp.word_cnt == 0) break; if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset) mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset; lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET, lpfc_vpd_data + offset, mb->un.varDmp.word_cnt); offset += mb->un.varDmp.word_cnt; } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE); lpfc_parse_vpd(phba, lpfc_vpd_data, offset); kfree(lpfc_vpd_data); out_free_mbox: mempool_free(pmb, phba->mbox_mem_pool); return 0; } /** * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd * @phba: pointer to lpfc hba data structure. * @pmboxq: pointer to the driver internal queue element for mailbox command. * * This is the completion handler for driver's configuring asynchronous event * mailbox command to the device. If the mailbox command returns successfully, * it will set internal async event support flag to 1; otherwise, it will * set internal async event support flag to 0. **/ static void lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) { if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS) phba->temp_sensor_support = 1; else phba->temp_sensor_support = 0; mempool_free(pmboxq, phba->mbox_mem_pool); return; } /** * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler * @phba: pointer to lpfc hba data structure. * @pmboxq: pointer to the driver internal queue element for mailbox command. * * This is the completion handler for dump mailbox command for getting * wake up parameters. When this command complete, the response contain * Option rom version of the HBA. This function translate the version number * into a human readable string and store it in OptionROMVersion. **/ static void lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq) { struct prog_id *prg; uint32_t prog_id_word; char dist = ' '; /* character array used for decoding dist type. */ char dist_char[] = "nabx"; if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) { mempool_free(pmboxq, phba->mbox_mem_pool); return; } prg = (struct prog_id *) &prog_id_word; /* word 7 contain option rom version */ prog_id_word = pmboxq->u.mb.un.varWords[7]; /* Decode the Option rom version word to a readable string */ dist = dist_char[prg->dist]; if ((prg->dist == 3) && (prg->num == 0)) snprintf(phba->OptionROMVersion, 32, "%d.%d%d", prg->ver, prg->rev, prg->lev); else snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d", prg->ver, prg->rev, prg->lev, dist, prg->num); mempool_free(pmboxq, phba->mbox_mem_pool); return; } /** * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname, * @vport: pointer to lpfc vport data structure. * * * Return codes * None. **/ void lpfc_update_vport_wwn(struct lpfc_vport *vport) { struct lpfc_hba *phba = vport->phba; /* * If the name is empty or there exists a soft name * then copy the service params name, otherwise use the fc name */ if (vport->fc_nodename.u.wwn[0] == 0) memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName, sizeof(struct lpfc_name)); else memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename, sizeof(struct lpfc_name)); /* * If the port name has changed, then set the Param changes flag * to unreg the login */ if (vport->fc_portname.u.wwn[0] != 0 && memcmp(&vport->fc_portname, &vport->fc_sparam.portName, sizeof(struct lpfc_name))) { vport->vport_flag |= FAWWPN_PARAM_CHG; if (phba->sli_rev == LPFC_SLI_REV4 && vport->port_type == LPFC_PHYSICAL_PORT && phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) { if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG)) phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC; lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_DISCOVERY | LOG_ELS, "2701 FA-PWWN change WWPN from %llx to " "%llx: vflag x%x fawwpn_flag x%x\n", wwn_to_u64(vport->fc_portname.u.wwn), wwn_to_u64 (vport->fc_sparam.portName.u.wwn), vport->vport_flag, phba->sli4_hba.fawwpn_flag); memcpy(&vport->fc_portname, &vport->fc_sparam.portName, sizeof(struct lpfc_name)); } } if (vport->fc_portname.u.wwn[0] == 0) memcpy(&vport->fc_portname, &vport->fc_sparam.portName, sizeof(struct lpfc_name)); else memcpy(&vport->fc_sparam.portName, &vport->fc_portname, sizeof(struct lpfc_name)); } /** * lpfc_config_port_post - Perform lpfc initialization after config port * @phba: pointer to lpfc hba data structure. * * This routine will do LPFC initialization after the CONFIG_PORT mailbox * command call. It performs all internal resource and state setups on the * port: post IOCB buffers, enable appropriate host interrupt attentions, * ELS ring timers, etc. * * Return codes * 0 - success. * Any other value - error. **/ int lpfc_config_port_post(struct lpfc_hba *phba) { struct lpfc_vport *vport = phba->pport; struct Scsi_Host *shost = lpfc_shost_from_vport(vport); LPFC_MBOXQ_t *pmb; MAILBOX_t *mb; struct lpfc_dmabuf *mp; struct lpfc_sli *psli = &phba->sli; uint32_t status, timeout; int i, j; int rc; spin_lock_irq(&phba->hbalock); /* * If the Config port completed correctly the HBA is not * over heated any more. */ if (phba->over_temp_state == HBA_OVER_TEMP) phba->over_temp_state = HBA_NORMAL_TEMP; spin_unlock_irq(&phba->hbalock); pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { phba->link_state = LPFC_HBA_ERROR; return -ENOMEM; } mb = &pmb->u.mb; /* Get login parameters for NID. */ rc = lpfc_read_sparam(phba, pmb, 0); if (rc) { mempool_free(pmb, phba->mbox_mem_pool); return -ENOMEM; } pmb->vport = vport; if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0448 Adapter failed init, mbxCmd x%x " "READ_SPARM mbxStatus x%x\n", mb->mbxCommand, mb->mbxStatus); phba->link_state = LPFC_HBA_ERROR; lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); return -EIO; } mp = (struct lpfc_dmabuf *)pmb->ctx_buf; /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no * longer needed. Prevent unintended ctx_buf access as the mbox is * reused. */ memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm)); lpfc_mbuf_free(phba, mp->virt, mp->phys); kfree(mp); pmb->ctx_buf = NULL; lpfc_update_vport_wwn(vport); /* Update the fc_host data structures with new wwn. */ fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); fc_host_max_npiv_vports(shost) = phba->max_vpi; /* If no serial number in VPD data, use low 6 bytes of WWNN */ /* This should be consolidated into parse_vpd ? - mr */ if (phba->SerialNumber[0] == 0) { uint8_t *outptr; outptr = &vport->fc_nodename.u.s.IEEE[0]; for (i = 0; i < 12; i++) { status = *outptr++; j = ((status & 0xf0) >> 4); if (j <= 9) phba->SerialNumber[i] = (char)((uint8_t) 0x30 + (uint8_t) j); else phba->SerialNumber[i] = (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); i++; j = (status & 0xf); if (j <= 9) phba->SerialNumber[i] = (char)((uint8_t) 0x30 + (uint8_t) j); else phba->SerialNumber[i] = (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); } } lpfc_read_config(phba, pmb); pmb->vport = vport; if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0453 Adapter failed to init, mbxCmd x%x " "READ_CONFIG, mbxStatus x%x\n", mb->mbxCommand, mb->mbxStatus); phba->link_state = LPFC_HBA_ERROR; mempool_free( pmb, phba->mbox_mem_pool); return -EIO; } /* Check if the port is disabled */ lpfc_sli_read_link_ste(phba); /* Reset the DFT_HBA_Q_DEPTH to the max xri */ if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "3359 HBA queue depth changed from %d to %d\n", phba->cfg_hba_queue_depth, mb->un.varRdConfig.max_xri); phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri; } phba->lmt = mb->un.varRdConfig.lmt; /* Get the default values for Model Name and Description */ lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); phba->link_state = LPFC_LINK_DOWN; /* Only process IOCBs on ELS ring till hba_state is READY */ if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr) psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT; if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr) psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT; /* Post receive buffers for desired rings */ if (phba->sli_rev != 3) lpfc_post_rcv_buf(phba); /* * Configure HBA MSI-X attention conditions to messages if MSI-X mode */ if (phba->intr_type == MSIX) { rc = lpfc_config_msi(phba, pmb); if (rc) { mempool_free(pmb, phba->mbox_mem_pool); return -EIO; } rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); if (rc != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0352 Config MSI mailbox command " "failed, mbxCmd x%x, mbxStatus x%x\n", pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); mempool_free(pmb, phba->mbox_mem_pool); return -EIO; } } spin_lock_irq(&phba->hbalock); /* Initialize ERATT handling flag */ phba->hba_flag &= ~HBA_ERATT_HANDLED; /* Enable appropriate host interrupts */ if (lpfc_readl(phba->HCregaddr, &status)) { spin_unlock_irq(&phba->hbalock); return -EIO; } status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; if (psli->num_rings > 0) status |= HC_R0INT_ENA; if (psli->num_rings > 1) status |= HC_R1INT_ENA; if (psli->num_rings > 2) status |= HC_R2INT_ENA; if (psli->num_rings > 3) status |= HC_R3INT_ENA; if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && (phba->cfg_poll & DISABLE_FCP_RING_INT)) status &= ~(HC_R0INT_ENA); writel(status, phba->HCregaddr); readl(phba->HCregaddr); /* flush */ spin_unlock_irq(&phba->hbalock); /* Set up ring-0 (ELS) timer */ timeout = phba->fc_ratov * 2; mod_timer(&vport->els_tmofunc, jiffies + msecs_to_jiffies(1000 * timeout)); /* Set up heart beat (HB) timer */ mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); phba->last_completion_time = jiffies; /* Set up error attention (ERATT) polling timer */ mod_timer(&phba->eratt_poll, jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval)); if (phba->hba_flag & LINK_DISABLED) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2598 Adapter Link is disabled.\n"); lpfc_down_link(phba, pmb); pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2599 Adapter failed to issue DOWN_LINK" " mbox command rc 0x%x\n", rc); mempool_free(pmb, phba->mbox_mem_pool); return -EIO; } } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) { mempool_free(pmb, phba->mbox_mem_pool); rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT); if (rc) return rc; } /* MBOX buffer will be freed in mbox compl */ pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { phba->link_state = LPFC_HBA_ERROR; return -ENOMEM; } lpfc_config_async(phba, pmb, LPFC_ELS_RING); pmb->mbox_cmpl = lpfc_config_async_cmpl; pmb->vport = phba->pport; rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0456 Adapter failed to issue " "ASYNCEVT_ENABLE mbox status x%x\n", rc); mempool_free(pmb, phba->mbox_mem_pool); } /* Get Option rom version */ pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { phba->link_state = LPFC_HBA_ERROR; return -ENOMEM; } lpfc_dump_wakeup_param(phba, pmb); pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl; pmb->vport = phba->pport; rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0435 Adapter failed " "to get Option ROM version status x%x\n", rc); mempool_free(pmb, phba->mbox_mem_pool); } return 0; } /** * lpfc_sli4_refresh_params - update driver copy of params. * @phba: Pointer to HBA context object. * * This is called to refresh driver copy of dynamic fields from the * common_get_sli4_parameters descriptor. **/ int lpfc_sli4_refresh_params(struct lpfc_hba *phba) { LPFC_MBOXQ_t *mboxq; struct lpfc_mqe *mqe; struct lpfc_sli4_parameters *mbx_sli4_parameters; int length, rc; mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!mboxq) return -ENOMEM; mqe = &mboxq->u.mqe; /* Read the port's SLI4 Config Parameters */ length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - sizeof(struct lpfc_sli4_cfg_mhdr)); lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, length, LPFC_SLI4_MBX_EMBED); rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); if (unlikely(rc)) { mempool_free(mboxq, phba->mbox_mem_pool); return rc; } mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; phba->sli4_hba.pc_sli4_params.mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters); /* Are we forcing MI off via module parameter? */ if (phba->cfg_enable_mi) phba->sli4_hba.pc_sli4_params.mi_ver = bf_get(cfg_mi_ver, mbx_sli4_parameters); else phba->sli4_hba.pc_sli4_params.mi_ver = 0; phba->sli4_hba.pc_sli4_params.cmf = bf_get(cfg_cmf, mbx_sli4_parameters); phba->sli4_hba.pc_sli4_params.pls = bf_get(cfg_pvl, mbx_sli4_parameters); mempool_free(mboxq, phba->mbox_mem_pool); return rc; } /** * lpfc_hba_init_link - Initialize the FC link * @phba: pointer to lpfc hba data structure. * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT * * This routine will issue the INIT_LINK mailbox command call. * It is available to other drivers through the lpfc_hba data * structure for use as a delayed link up mechanism with the * module parameter lpfc_suppress_link_up. * * Return code * 0 - success * Any other value - error **/ static int lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag) { return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag); } /** * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology * @phba: pointer to lpfc hba data structure. * @fc_topology: desired fc topology. * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT * * This routine will issue the INIT_LINK mailbox command call. * It is available to other drivers through the lpfc_hba data * structure for use as a delayed link up mechanism with the * module parameter lpfc_suppress_link_up. * * Return code * 0 - success * Any other value - error **/ int lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology, uint32_t flag) { struct lpfc_vport *vport = phba->pport; LPFC_MBOXQ_t *pmb; MAILBOX_t *mb; int rc; pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { phba->link_state = LPFC_HBA_ERROR; return -ENOMEM; } mb = &pmb->u.mb; pmb->vport = vport; if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) && !(phba->lmt & LMT_1Gb)) || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) && !(phba->lmt & LMT_2Gb)) || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) && !(phba->lmt & LMT_4Gb)) || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) && !(phba->lmt & LMT_8Gb)) || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) && !(phba->lmt & LMT_10Gb)) || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) && !(phba->lmt & LMT_16Gb)) || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) && !(phba->lmt & LMT_32Gb)) || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) && !(phba->lmt & LMT_64Gb))) { /* Reset link speed to auto */ lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1302 Invalid speed for this board:%d " "Reset link speed to auto.\n", phba->cfg_link_speed); phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; } lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed); pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; if (phba->sli_rev < LPFC_SLI_REV4) lpfc_set_loopback_flag(phba); rc = lpfc_sli_issue_mbox(phba, pmb, flag); if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0498 Adapter failed to init, mbxCmd x%x " "INIT_LINK, mbxStatus x%x\n", mb->mbxCommand, mb->mbxStatus); if (phba->sli_rev <= LPFC_SLI_REV3) { /* Clear all interrupt enable conditions */ writel(0, phba->HCregaddr); readl(phba->HCregaddr); /* flush */ /* Clear all pending interrupts */ writel(0xffffffff, phba->HAregaddr); readl(phba->HAregaddr); /* flush */ } phba->link_state = LPFC_HBA_ERROR; if (rc != MBX_BUSY || flag == MBX_POLL) mempool_free(pmb, phba->mbox_mem_pool); return -EIO; } phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK; if (flag == MBX_POLL) mempool_free(pmb, phba->mbox_mem_pool); return 0; } /** * lpfc_hba_down_link - this routine downs the FC link * @phba: pointer to lpfc hba data structure. * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT * * This routine will issue the DOWN_LINK mailbox command call. * It is available to other drivers through the lpfc_hba data * structure for use to stop the link. * * Return code * 0 - success * Any other value - error **/ static int lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag) { LPFC_MBOXQ_t *pmb; int rc; pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { phba->link_state = LPFC_HBA_ERROR; return -ENOMEM; } lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0491 Adapter Link is disabled.\n"); lpfc_down_link(phba, pmb); pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; rc = lpfc_sli_issue_mbox(phba, pmb, flag); if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2522 Adapter failed to issue DOWN_LINK" " mbox command rc 0x%x\n", rc); mempool_free(pmb, phba->mbox_mem_pool); return -EIO; } if (flag == MBX_POLL) mempool_free(pmb, phba->mbox_mem_pool); return 0; } /** * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset * @phba: pointer to lpfc HBA data structure. * * This routine will do LPFC uninitialization before the HBA is reset when * bringing down the SLI Layer. * * Return codes * 0 - success. * Any other value - error. **/ int lpfc_hba_down_prep(struct lpfc_hba *phba) { struct lpfc_vport **vports; int i; if (phba->sli_rev <= LPFC_SLI_REV3) { /* Disable interrupts */ writel(0, phba->HCregaddr); readl(phba->HCregaddr); /* flush */ } if (phba->pport->load_flag & FC_UNLOADING) lpfc_cleanup_discovery_resources(phba->pport); else { vports = lpfc_create_vport_work_array(phba); if (vports != NULL) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) lpfc_cleanup_discovery_resources(vports[i]); lpfc_destroy_vport_work_array(phba, vports); } return 0; } /** * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free * rspiocb which got deferred * * @phba: pointer to lpfc HBA data structure. * * This routine will cleanup completed slow path events after HBA is reset * when bringing down the SLI Layer. * * * Return codes * void. **/ static void lpfc_sli4_free_sp_events(struct lpfc_hba *phba) { struct lpfc_iocbq *rspiocbq; struct hbq_dmabuf *dmabuf; struct lpfc_cq_event *cq_event; spin_lock_irq(&phba->hbalock); phba->hba_flag &= ~HBA_SP_QUEUE_EVT; spin_unlock_irq(&phba->hbalock); while (!list_empty(&phba->sli4_hba.sp_queue_event)) { /* Get the response iocb from the head of work queue */ spin_lock_irq(&phba->hbalock); list_remove_head(&phba->sli4_hba.sp_queue_event, cq_event, struct lpfc_cq_event, list); spin_unlock_irq(&phba->hbalock); switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) { case CQE_CODE_COMPL_WQE: rspiocbq = container_of(cq_event, struct lpfc_iocbq, cq_event); lpfc_sli_release_iocbq(phba, rspiocbq); break; case CQE_CODE_RECEIVE: case CQE_CODE_RECEIVE_V1: dmabuf = container_of(cq_event, struct hbq_dmabuf, cq_event); lpfc_in_buf_free(phba, &dmabuf->dbuf); } } } /** * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset * @phba: pointer to lpfc HBA data structure. * * This routine will cleanup posted ELS buffers after the HBA is reset * when bringing down the SLI Layer. * * * Return codes * void. **/ static void lpfc_hba_free_post_buf(struct lpfc_hba *phba) { struct lpfc_sli *psli = &phba->sli; struct lpfc_sli_ring *pring; struct lpfc_dmabuf *mp, *next_mp; LIST_HEAD(buflist); int count; if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) lpfc_sli_hbqbuf_free_all(phba); else { /* Cleanup preposted buffers on the ELS ring */ pring = &psli->sli3_ring[LPFC_ELS_RING]; spin_lock_irq(&phba->hbalock); list_splice_init(&pring->postbufq, &buflist); spin_unlock_irq(&phba->hbalock); count = 0; list_for_each_entry_safe(mp, next_mp, &buflist, list) { list_del(&mp->list); count++; lpfc_mbuf_free(phba, mp->virt, mp->phys); kfree(mp); } spin_lock_irq(&phba->hbalock); pring->postbufq_cnt -= count; spin_unlock_irq(&phba->hbalock); } } /** * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset * @phba: pointer to lpfc HBA data structure. * * This routine will cleanup the txcmplq after the HBA is reset when bringing * down the SLI Layer. * * Return codes * void **/ static void lpfc_hba_clean_txcmplq(struct lpfc_hba *phba) { struct lpfc_sli *psli = &phba->sli; struct lpfc_queue *qp = NULL; struct lpfc_sli_ring *pring; LIST_HEAD(completions); int i; struct lpfc_iocbq *piocb, *next_iocb; if (phba->sli_rev != LPFC_SLI_REV4) { for (i = 0; i < psli->num_rings; i++) { pring = &psli->sli3_ring[i]; spin_lock_irq(&phba->hbalock); /* At this point in time the HBA is either reset or DOA * Nothing should be on txcmplq as it will * NEVER complete. */ list_splice_init(&pring->txcmplq, &completions); pring->txcmplq_cnt = 0; spin_unlock_irq(&phba->hbalock); lpfc_sli_abort_iocb_ring(phba, pring); } /* Cancel all the IOCBs from the completions list */ lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); return; } list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) { pring = qp->pring; if (!pring) continue; spin_lock_irq(&pring->ring_lock); list_for_each_entry_safe(piocb, next_iocb, &pring->txcmplq, list) piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ; list_splice_init(&pring->txcmplq, &completions); pring->txcmplq_cnt = 0; spin_unlock_irq(&pring->ring_lock); lpfc_sli_abort_iocb_ring(phba, pring); } /* Cancel all the IOCBs from the completions list */ lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); } /** * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset * @phba: pointer to lpfc HBA data structure. * * This routine will do uninitialization after the HBA is reset when bring * down the SLI Layer. * * Return codes * 0 - success. * Any other value - error. **/ static int lpfc_hba_down_post_s3(struct lpfc_hba *phba) { lpfc_hba_free_post_buf(phba); lpfc_hba_clean_txcmplq(phba); return 0; } /** * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset * @phba: pointer to lpfc HBA data structure. * * This routine will do uninitialization after the HBA is reset when bring * down the SLI Layer. * * Return codes * 0 - success. * Any other value - error. **/ static int lpfc_hba_down_post_s4(struct lpfc_hba *phba) { struct lpfc_io_buf *psb, *psb_next; struct lpfc_async_xchg_ctx *ctxp, *ctxp_next; struct lpfc_sli4_hdw_queue *qp; LIST_HEAD(aborts); LIST_HEAD(nvme_aborts); LIST_HEAD(nvmet_aborts); struct lpfc_sglq *sglq_entry = NULL; int cnt, idx; lpfc_sli_hbqbuf_free_all(phba); lpfc_hba_clean_txcmplq(phba); /* At this point in time the HBA is either reset or DOA. Either * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be * on the lpfc_els_sgl_list so that it can either be freed if the * driver is unloading or reposted if the driver is restarting * the port. */ /* sgl_list_lock required because worker thread uses this * list. */ spin_lock_irq(&phba->sli4_hba.sgl_list_lock); list_for_each_entry(sglq_entry, &phba->sli4_hba.lpfc_abts_els_sgl_list, list) sglq_entry->state = SGL_FREED; list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list, &phba->sli4_hba.lpfc_els_sgl_list); spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); /* abts_xxxx_buf_list_lock required because worker thread uses this * list. */ spin_lock_irq(&phba->hbalock); cnt = 0; for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { qp = &phba->sli4_hba.hdwq[idx]; spin_lock(&qp->abts_io_buf_list_lock); list_splice_init(&qp->lpfc_abts_io_buf_list, &aborts); list_for_each_entry_safe(psb, psb_next, &aborts, list) { psb->pCmd = NULL; psb->status = IOSTAT_SUCCESS; cnt++; } spin_lock(&qp->io_buf_list_put_lock); list_splice_init(&aborts, &qp->lpfc_io_buf_list_put); qp->put_io_bufs += qp->abts_scsi_io_bufs; qp->put_io_bufs += qp->abts_nvme_io_bufs; qp->abts_scsi_io_bufs = 0; qp->abts_nvme_io_bufs = 0; spin_unlock(&qp->io_buf_list_put_lock); spin_unlock(&qp->abts_io_buf_list_lock); } spin_unlock_irq(&phba->hbalock); if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list, &nvmet_aborts); spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) { ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP); lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf); } } lpfc_sli4_free_sp_events(phba); return cnt; } /** * lpfc_hba_down_post - Wrapper func for hba down post routine * @phba: pointer to lpfc HBA data structure. * * This routine wraps the actual SLI3 or SLI4 routine for performing * uninitialization after the HBA is reset when bring down the SLI Layer. * * Return codes * 0 - success. * Any other value - error. **/ int lpfc_hba_down_post(struct lpfc_hba *phba) { return (*phba->lpfc_hba_down_post)(phba); } /** * lpfc_hb_timeout - The HBA-timer timeout handler * @t: timer context used to obtain the pointer to lpfc hba data structure. * * This is the HBA-timer timeout handler registered to the lpfc driver. When * this timer fires, a HBA timeout event shall be posted to the lpfc driver * work-port-events bitmap and the worker thread is notified. This timeout * event will be used by the worker thread to invoke the actual timeout * handler routine, lpfc_hb_timeout_handler. Any periodical operations will * be performed in the timeout handler and the HBA timeout event bit shall * be cleared by the worker thread after it has taken the event bitmap out. **/ static void lpfc_hb_timeout(struct timer_list *t) { struct lpfc_hba *phba; uint32_t tmo_posted; unsigned long iflag; phba = from_timer(phba, t, hb_tmofunc); /* Check for heart beat timeout conditions */ spin_lock_irqsave(&phba->pport->work_port_lock, iflag); tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO; if (!tmo_posted) phba->pport->work_port_events |= WORKER_HB_TMO; spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); /* Tell the worker thread there is work to do */ if (!tmo_posted) lpfc_worker_wake_up(phba); return; } /** * lpfc_rrq_timeout - The RRQ-timer timeout handler * @t: timer context used to obtain the pointer to lpfc hba data structure. * * This is the RRQ-timer timeout handler registered to the lpfc driver. When * this timer fires, a RRQ timeout event shall be posted to the lpfc driver * work-port-events bitmap and the worker thread is notified. This timeout * event will be used by the worker thread to invoke the actual timeout * handler routine, lpfc_rrq_handler. Any periodical operations will * be performed in the timeout handler and the RRQ timeout event bit shall * be cleared by the worker thread after it has taken the event bitmap out. **/ static void lpfc_rrq_timeout(struct timer_list *t) { struct lpfc_hba *phba; unsigned long iflag; phba = from_timer(phba, t, rrq_tmr); spin_lock_irqsave(&phba->pport->work_port_lock, iflag); if (!(phba->pport->load_flag & FC_UNLOADING)) phba->hba_flag |= HBA_RRQ_ACTIVE; else phba->hba_flag &= ~HBA_RRQ_ACTIVE; spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); if (!(phba->pport->load_flag & FC_UNLOADING)) lpfc_worker_wake_up(phba); } /** * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function * @phba: pointer to lpfc hba data structure. * @pmboxq: pointer to the driver internal queue element for mailbox command. * * This is the callback function to the lpfc heart-beat mailbox command. * If configured, the lpfc driver issues the heart-beat mailbox command to * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the * heart-beat mailbox command is issued, the driver shall set up heart-beat * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks * heart-beat outstanding state. Once the mailbox command comes back and * no error conditions detected, the heart-beat mailbox command timer is * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding * state is cleared for the next heart-beat. If the timer expired with the * heart-beat outstanding state set, the driver will put the HBA offline. **/ static void lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) { unsigned long drvr_flag; spin_lock_irqsave(&phba->hbalock, drvr_flag); phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); spin_unlock_irqrestore(&phba->hbalock, drvr_flag); /* Check and reset heart-beat timer if necessary */ mempool_free(pmboxq, phba->mbox_mem_pool); if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) && !(phba->link_state == LPFC_HBA_ERROR) && !(phba->pport->load_flag & FC_UNLOADING)) mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); return; } /* * lpfc_idle_stat_delay_work - idle_stat tracking * * This routine tracks per-eq idle_stat and determines polling decisions. * * Return codes: * None **/ static void lpfc_idle_stat_delay_work(struct work_struct *work) { struct lpfc_hba *phba = container_of(to_delayed_work(work), struct lpfc_hba, idle_stat_delay_work); struct lpfc_queue *eq; struct lpfc_sli4_hdw_queue *hdwq; struct lpfc_idle_stat *idle_stat; u32 i, idle_percent; u64 wall, wall_idle, diff_wall, diff_idle, busy_time; if (phba->pport->load_flag & FC_UNLOADING) return; if (phba->link_state == LPFC_HBA_ERROR || phba->pport->fc_flag & FC_OFFLINE_MODE || phba->cmf_active_mode != LPFC_CFG_OFF) goto requeue; for_each_present_cpu(i) { hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq]; eq = hdwq->hba_eq; /* Skip if we've already handled this eq's primary CPU */ if (eq->chann != i) continue; idle_stat = &phba->sli4_hba.idle_stat[i]; /* get_cpu_idle_time returns values as running counters. Thus, * to know the amount for this period, the prior counter values * need to be subtracted from the current counter values. * From there, the idle time stat can be calculated as a * percentage of 100 - the sum of the other consumption times. */ wall_idle = get_cpu_idle_time(i, &wall, 1); diff_idle = wall_idle - idle_stat->prev_idle; diff_wall = wall - idle_stat->prev_wall; if (diff_wall <= diff_idle) busy_time = 0; else busy_time = diff_wall - diff_idle; idle_percent = div64_u64(100 * busy_time, diff_wall); idle_percent = 100 - idle_percent; if (idle_percent < 15) eq->poll_mode = LPFC_QUEUE_WORK; else eq->poll_mode = LPFC_THREADED_IRQ; idle_stat->prev_idle = wall_idle; idle_stat->prev_wall = wall; } requeue: schedule_delayed_work(&phba->idle_stat_delay_work, msecs_to_jiffies(LPFC_IDLE_STAT_DELAY)); } static void lpfc_hb_eq_delay_work(struct work_struct *work) { struct lpfc_hba *phba = container_of(to_delayed_work(work), struct lpfc_hba, eq_delay_work); struct lpfc_eq_intr_info *eqi, *eqi_new; struct lpfc_queue *eq, *eq_next; unsigned char *ena_delay = NULL; uint32_t usdelay; int i; if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING) return; if (phba->link_state == LPFC_HBA_ERROR || phba->pport->fc_flag & FC_OFFLINE_MODE) goto requeue; ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay), GFP_KERNEL); if (!ena_delay) goto requeue; for (i = 0; i < phba->cfg_irq_chann; i++) { /* Get the EQ corresponding to the IRQ vector */ eq = phba->sli4_hba.hba_eq_hdl[i].eq; if (!eq) continue; if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) { eq->q_flag &= ~HBA_EQ_DELAY_CHK; ena_delay[eq->last_cpu] = 1; } } for_each_present_cpu(i) { eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i); if (ena_delay[i]) { usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP; if (usdelay > LPFC_MAX_AUTO_EQ_DELAY) usdelay = LPFC_MAX_AUTO_EQ_DELAY; } else { usdelay = 0; } eqi->icnt = 0; list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) { if (unlikely(eq->last_cpu != i)) { eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info, eq->last_cpu); list_move_tail(&eq->cpu_list, &eqi_new->list); continue; } if (usdelay != eq->q_mode) lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1, usdelay); } } kfree(ena_delay); requeue: queue_delayed_work(phba->wq, &phba->eq_delay_work, msecs_to_jiffies(LPFC_EQ_DELAY_MSECS)); } /** * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution * @phba: pointer to lpfc hba data structure. * * For each heartbeat, this routine does some heuristic methods to adjust * XRI distribution. The goal is to fully utilize free XRIs. **/ static void lpfc_hb_mxp_handler(struct lpfc_hba *phba) { u32 i; u32 hwq_count; hwq_count = phba->cfg_hdw_queue; for (i = 0; i < hwq_count; i++) { /* Adjust XRIs in private pool */ lpfc_adjust_pvt_pool_count(phba, i); /* Adjust high watermark */ lpfc_adjust_high_watermark(phba, i); #ifdef LPFC_MXP_STAT /* Snapshot pbl, pvt and busy count */ lpfc_snapshot_mxp(phba, i); #endif } } /** * lpfc_issue_hb_mbox - Issues heart-beat mailbox command * @phba: pointer to lpfc hba data structure. * * If a HB mbox is not already in progrees, this routine will allocate * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command, * and issue it. The HBA_HBEAT_INP flag means the command is in progress. **/ int lpfc_issue_hb_mbox(struct lpfc_hba *phba) { LPFC_MBOXQ_t *pmboxq; int retval; /* Is a Heartbeat mbox already in progress */ if (phba->hba_flag & HBA_HBEAT_INP) return 0; pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmboxq) return -ENOMEM; lpfc_heart_beat(phba, pmboxq); pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl; pmboxq->vport = phba->pport; retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT); if (retval != MBX_BUSY && retval != MBX_SUCCESS) { mempool_free(pmboxq, phba->mbox_mem_pool); return -ENXIO; } phba->hba_flag |= HBA_HBEAT_INP; return 0; } /** * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command * @phba: pointer to lpfc hba data structure. * * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless * of the value of lpfc_enable_hba_heartbeat. * If lpfc_enable_hba_heartbeat is set, the timeout routine will always * try to issue a MBX_HEARTBEAT mbox command. **/ void lpfc_issue_hb_tmo(struct lpfc_hba *phba) { if (phba->cfg_enable_hba_heartbeat) return; phba->hba_flag |= HBA_HBEAT_TMO; } /** * lpfc_hb_timeout_handler - The HBA-timer timeout handler * @phba: pointer to lpfc hba data structure. * * This is the actual HBA-timer timeout handler to be invoked by the worker * thread whenever the HBA timer fired and HBA-timeout event posted. This * handler performs any periodic operations needed for the device. If such * periodic event has already been attended to either in the interrupt handler * or by processing slow-ring or fast-ring events within the HBA-timer * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets * the timer for the next timeout period. If lpfc heart-beat mailbox command * is configured and there is no heart-beat mailbox command outstanding, a * heart-beat mailbox is issued and timer set properly. Otherwise, if there * has been a heart-beat mailbox command outstanding, the HBA shall be put * to offline. **/ void lpfc_hb_timeout_handler(struct lpfc_hba *phba) { struct lpfc_vport **vports; struct lpfc_dmabuf *buf_ptr; int retval = 0; int i, tmo; struct lpfc_sli *psli = &phba->sli; LIST_HEAD(completions); if (phba->cfg_xri_rebalancing) { /* Multi-XRI pools handler */ lpfc_hb_mxp_handler(phba); } vports = lpfc_create_vport_work_array(phba); if (vports != NULL) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { lpfc_rcv_seq_check_edtov(vports[i]); lpfc_fdmi_change_check(vports[i]); } lpfc_destroy_vport_work_array(phba, vports); if ((phba->link_state == LPFC_HBA_ERROR) || (phba->pport->load_flag & FC_UNLOADING) || (phba->pport->fc_flag & FC_OFFLINE_MODE)) return; if (phba->elsbuf_cnt && (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) { spin_lock_irq(&phba->hbalock); list_splice_init(&phba->elsbuf, &completions); phba->elsbuf_cnt = 0; phba->elsbuf_prev_cnt = 0; spin_unlock_irq(&phba->hbalock); while (!list_empty(&completions)) { list_remove_head(&completions, buf_ptr, struct lpfc_dmabuf, list); lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); kfree(buf_ptr); } } phba->elsbuf_prev_cnt = phba->elsbuf_cnt; /* If there is no heart beat outstanding, issue a heartbeat command */ if (phba->cfg_enable_hba_heartbeat) { /* If IOs are completing, no need to issue a MBX_HEARTBEAT */ spin_lock_irq(&phba->pport->work_port_lock); if (time_after(phba->last_completion_time + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL), jiffies)) { spin_unlock_irq(&phba->pport->work_port_lock); if (phba->hba_flag & HBA_HBEAT_INP) tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); else tmo = (1000 * LPFC_HB_MBOX_INTERVAL); goto out; } spin_unlock_irq(&phba->pport->work_port_lock); /* Check if a MBX_HEARTBEAT is already in progress */ if (phba->hba_flag & HBA_HBEAT_INP) { /* * If heart beat timeout called with HBA_HBEAT_INP set * we need to give the hb mailbox cmd a chance to * complete or TMO. */ lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0459 Adapter heartbeat still outstanding: " "last compl time was %d ms.\n", jiffies_to_msecs(jiffies - phba->last_completion_time)); tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); } else { if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) && (list_empty(&psli->mboxq))) { retval = lpfc_issue_hb_mbox(phba); if (retval) { tmo = (1000 * LPFC_HB_MBOX_INTERVAL); goto out; } phba->skipped_hb = 0; } else if (time_before_eq(phba->last_completion_time, phba->skipped_hb)) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "2857 Last completion time not " " updated in %d ms\n", jiffies_to_msecs(jiffies - phba->last_completion_time)); } else phba->skipped_hb = jiffies; tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); goto out; } } else { /* Check to see if we want to force a MBX_HEARTBEAT */ if (phba->hba_flag & HBA_HBEAT_TMO) { retval = lpfc_issue_hb_mbox(phba); if (retval) tmo = (1000 * LPFC_HB_MBOX_INTERVAL); else tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); goto out; } tmo = (1000 * LPFC_HB_MBOX_INTERVAL); } out: mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo)); } /** * lpfc_offline_eratt - Bring lpfc offline on hardware error attention * @phba: pointer to lpfc hba data structure. * * This routine is called to bring the HBA offline when HBA hardware error * other than Port Error 6 has been detected. **/ static void lpfc_offline_eratt(struct lpfc_hba *phba) { struct lpfc_sli *psli = &phba->sli; spin_lock_irq(&phba->hbalock); psli->sli_flag &= ~LPFC_SLI_ACTIVE; spin_unlock_irq(&phba->hbalock); lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); lpfc_offline(phba); lpfc_reset_barrier(phba); spin_lock_irq(&phba->hbalock); lpfc_sli_brdreset(phba); spin_unlock_irq(&phba->hbalock); lpfc_hba_down_post(phba); lpfc_sli_brdready(phba, HS_MBRDY); lpfc_unblock_mgmt_io(phba); phba->link_state = LPFC_HBA_ERROR; return; } /** * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention * @phba: pointer to lpfc hba data structure. * * This routine is called to bring a SLI4 HBA offline when HBA hardware error * other than Port Error 6 has been detected. **/ void lpfc_sli4_offline_eratt(struct lpfc_hba *phba) { spin_lock_irq(&phba->hbalock); if (phba->link_state == LPFC_HBA_ERROR && test_bit(HBA_PCI_ERR, &phba->bit_flags)) { spin_unlock_irq(&phba->hbalock); return; } phba->link_state = LPFC_HBA_ERROR; spin_unlock_irq(&phba->hbalock); lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); lpfc_sli_flush_io_rings(phba); lpfc_offline(phba); lpfc_hba_down_post(phba); lpfc_unblock_mgmt_io(phba); } /** * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler * @phba: pointer to lpfc hba data structure. * * This routine is invoked to handle the deferred HBA hardware error * conditions. This type of error is indicated by HBA by setting ER1 * and another ER bit in the host status register. The driver will * wait until the ER1 bit clears before handling the error condition. **/ static void lpfc_handle_deferred_eratt(struct lpfc_hba *phba) { uint32_t old_host_status = phba->work_hs; struct lpfc_sli *psli = &phba->sli; /* If the pci channel is offline, ignore possible errors, * since we cannot communicate with the pci card anyway. */ if (pci_channel_offline(phba->pcidev)) { spin_lock_irq(&phba->hbalock); phba->hba_flag &= ~DEFER_ERATT; spin_unlock_irq(&phba->hbalock); return; } lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0479 Deferred Adapter Hardware Error " "Data: x%x x%x x%x\n", phba->work_hs, phba->work_status[0], phba->work_status[1]); spin_lock_irq(&phba->hbalock); psli->sli_flag &= ~LPFC_SLI_ACTIVE; spin_unlock_irq(&phba->hbalock); /* * Firmware stops when it triggred erratt. That could cause the I/Os * dropped by the firmware. Error iocb (I/O) on txcmplq and let the * SCSI layer retry it after re-establishing link. */ lpfc_sli_abort_fcp_rings(phba); /* * There was a firmware error. Take the hba offline and then * attempt to restart it. */ lpfc_offline_prep(phba, LPFC_MBX_WAIT); lpfc_offline(phba); /* Wait for the ER1 bit to clear.*/ while (phba->work_hs & HS_FFER1) { msleep(100); if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) { phba->work_hs = UNPLUG_ERR ; break; } /* If driver is unloading let the worker thread continue */ if (phba->pport->load_flag & FC_UNLOADING) { phba->work_hs = 0; break; } } /* * This is to ptrotect against a race condition in which * first write to the host attention register clear the * host status register. */ if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING))) phba->work_hs = old_host_status & ~HS_FFER1; spin_lock_irq(&phba->hbalock); phba->hba_flag &= ~DEFER_ERATT; spin_unlock_irq(&phba->hbalock); phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); phba->work_status[1] = readl(phba->MBslimaddr + 0xac); } static void lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba) { struct lpfc_board_event_header board_event; struct Scsi_Host *shost; board_event.event_type = FC_REG_BOARD_EVENT; board_event.subcategory = LPFC_EVENT_PORTINTERR; shost = lpfc_shost_from_vport(phba->pport); fc_host_post_vendor_event(shost, fc_get_event_number(), sizeof(board_event), (char *) &board_event, LPFC_NL_VENDOR_ID); } /** * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler * @phba: pointer to lpfc hba data structure. * * This routine is invoked to handle the following HBA hardware error * conditions: * 1 - HBA error attention interrupt * 2 - DMA ring index out of range * 3 - Mailbox command came back as unknown **/ static void lpfc_handle_eratt_s3(struct lpfc_hba *phba) { struct lpfc_vport *vport = phba->pport; struct lpfc_sli *psli = &phba->sli; uint32_t event_data; unsigned long temperature; struct temp_event temp_event_data; struct Scsi_Host *shost; /* If the pci channel is offline, ignore possible errors, * since we cannot communicate with the pci card anyway. */ if (pci_channel_offline(phba->pcidev)) { spin_lock_irq(&phba->hbalock); phba->hba_flag &= ~DEFER_ERATT; spin_unlock_irq(&phba->hbalock); return; } /* If resets are disabled then leave the HBA alone and return */ if (!phba->cfg_enable_hba_reset) return; /* Send an internal error event to mgmt application */ lpfc_board_errevt_to_mgmt(phba); if (phba->hba_flag & DEFER_ERATT) lpfc_handle_deferred_eratt(phba); if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) { if (phba->work_hs & HS_FFER6) /* Re-establishing Link */ lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, "1301 Re-establishing Link " "Data: x%x x%x x%x\n", phba->work_hs, phba->work_status[0], phba->work_status[1]); if (phba->work_hs & HS_FFER8) /* Device Zeroization */ lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, "2861 Host Authentication device " "zeroization Data:x%x x%x x%x\n", phba->work_hs, phba->work_status[0], phba->work_status[1]); spin_lock_irq(&phba->hbalock); psli->sli_flag &= ~LPFC_SLI_ACTIVE; spin_unlock_irq(&phba->hbalock); /* * Firmware stops when it triggled erratt with HS_FFER6. * That could cause the I/Os dropped by the firmware. * Error iocb (I/O) on txcmplq and let the SCSI layer * retry it after re-establishing link. */ lpfc_sli_abort_fcp_rings(phba); /* * There was a firmware error. Take the hba offline and then * attempt to restart it. */ lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); lpfc_offline(phba); lpfc_sli_brdrestart(phba); if (lpfc_online(phba) == 0) { /* Initialize the HBA */ lpfc_unblock_mgmt_io(phba); return; } lpfc_unblock_mgmt_io(phba); } else if (phba->work_hs & HS_CRIT_TEMP) { temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET); temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; temp_event_data.event_code = LPFC_CRIT_TEMP; temp_event_data.data = (uint32_t)temperature; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0406 Adapter maximum temperature exceeded " "(%ld), taking this port offline " "Data: x%x x%x x%x\n", temperature, phba->work_hs, phba->work_status[0], phba->work_status[1]); shost = lpfc_shost_from_vport(phba->pport); fc_host_post_vendor_event(shost, fc_get_event_number(), sizeof(temp_event_data), (char *) &temp_event_data, SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); spin_lock_irq(&phba->hbalock); phba->over_temp_state = HBA_OVER_TEMP; spin_unlock_irq(&phba->hbalock); lpfc_offline_eratt(phba); } else { /* The if clause above forces this code path when the status * failure is a value other than FFER6. Do not call the offline * twice. This is the adapter hardware error path. */ lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0457 Adapter Hardware Error " "Data: x%x x%x x%x\n", phba->work_hs, phba->work_status[0], phba->work_status[1]); event_data = FC_REG_DUMP_EVENT; shost = lpfc_shost_from_vport(vport); fc_host_post_vendor_event(shost, fc_get_event_number(), sizeof(event_data), (char *) &event_data, SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); lpfc_offline_eratt(phba); } return; } /** * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg * @phba: pointer to lpfc hba data structure. * @mbx_action: flag for mailbox shutdown action. * @en_rn_msg: send reset/port recovery message. * This routine is invoked to perform an SLI4 port PCI function reset in * response to port status register polling attention. It waits for port * status register (ERR, RDY, RN) bits before proceeding with function reset. * During this process, interrupt vectors are freed and later requested * for handling possible port resource change. **/ static int lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action, bool en_rn_msg) { int rc; uint32_t intr_mode; LPFC_MBOXQ_t *mboxq; if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= LPFC_SLI_INTF_IF_TYPE_2) { /* * On error status condition, driver need to wait for port * ready before performing reset. */ rc = lpfc_sli4_pdev_status_reg_wait(phba); if (rc) return rc; } /* need reset: attempt for port recovery */ if (en_rn_msg) lpfc_printf_log(phba, KERN_ERR, LOG_SLI, "2887 Reset Needed: Attempting Port " "Recovery...\n"); /* If we are no wait, the HBA has been reset and is not * functional, thus we should clear * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags. */ if (mbx_action == LPFC_MBX_NO_WAIT) { spin_lock_irq(&phba->hbalock); phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE; if (phba->sli.mbox_active) { mboxq = phba->sli.mbox_active; mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; __lpfc_mbox_cmpl_put(phba, mboxq); phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; phba->sli.mbox_active = NULL; } spin_unlock_irq(&phba->hbalock); } lpfc_offline_prep(phba, mbx_action); lpfc_sli_flush_io_rings(phba); lpfc_offline(phba); /* release interrupt for possible resource change */ lpfc_sli4_disable_intr(phba); rc = lpfc_sli_brdrestart(phba); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6309 Failed to restart board\n"); return rc; } /* request and enable interrupt */ intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); if (intr_mode == LPFC_INTR_ERROR) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3175 Failed to enable interrupt\n"); return -EIO; } phba->intr_mode = intr_mode; rc = lpfc_online(phba); if (rc == 0) lpfc_unblock_mgmt_io(phba); return rc; } /** * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler * @phba: pointer to lpfc hba data structure. * * This routine is invoked to handle the SLI4 HBA hardware error attention * conditions. **/ static void lpfc_handle_eratt_s4(struct lpfc_hba *phba) { struct lpfc_vport *vport = phba->pport; uint32_t event_data; struct Scsi_Host *shost; uint32_t if_type; struct lpfc_register portstat_reg = {0}; uint32_t reg_err1, reg_err2; uint32_t uerrlo_reg, uemasklo_reg; uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2; bool en_rn_msg = true; struct temp_event temp_event_data; struct lpfc_register portsmphr_reg; int rc, i; /* If the pci channel is offline, ignore possible errors, since * we cannot communicate with the pci card anyway. */ if (pci_channel_offline(phba->pcidev)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3166 pci channel is offline\n"); lpfc_sli_flush_io_rings(phba); return; } memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); switch (if_type) { case LPFC_SLI_INTF_IF_TYPE_0: pci_rd_rc1 = lpfc_readl( phba->sli4_hba.u.if_type0.UERRLOregaddr, &uerrlo_reg); pci_rd_rc2 = lpfc_readl( phba->sli4_hba.u.if_type0.UEMASKLOregaddr, &uemasklo_reg); /* consider PCI bus read error as pci_channel_offline */ if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO) return; if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) { lpfc_sli4_offline_eratt(phba); return; } lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "7623 Checking UE recoverable"); for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) { if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, &portsmphr_reg.word0)) continue; smphr_port_status = bf_get(lpfc_port_smphr_port_status, &portsmphr_reg); if ((smphr_port_status & LPFC_PORT_SEM_MASK) == LPFC_PORT_SEM_UE_RECOVERABLE) break; /*Sleep for 1Sec, before checking SEMAPHORE */ msleep(1000); } lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "4827 smphr_port_status x%x : Waited %dSec", smphr_port_status, i); /* Recoverable UE, reset the HBA device */ if ((smphr_port_status & LPFC_PORT_SEM_MASK) == LPFC_PORT_SEM_UE_RECOVERABLE) { for (i = 0; i < 20; i++) { msleep(1000); if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr, &portsmphr_reg.word0) && (LPFC_POST_STAGE_PORT_READY == bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))) { rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, en_rn_msg); if (rc == 0) return; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "4215 Failed to recover UE"); break; } } } lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "7624 Firmware not ready: Failing UE recovery," " waited %dSec", i); phba->link_state = LPFC_HBA_ERROR; break; case LPFC_SLI_INTF_IF_TYPE_2: case LPFC_SLI_INTF_IF_TYPE_6: pci_rd_rc1 = lpfc_readl( phba->sli4_hba.u.if_type2.STATUSregaddr, &portstat_reg.word0); /* consider PCI bus read error as pci_channel_offline */ if (pci_rd_rc1 == -EIO) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3151 PCI bus read access failure: x%x\n", readl(phba->sli4_hba.u.if_type2.STATUSregaddr)); lpfc_sli4_offline_eratt(phba); return; } reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2889 Port Overtemperature event, " "taking port offline Data: x%x x%x\n", reg_err1, reg_err2); phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; temp_event_data.event_code = LPFC_CRIT_TEMP; temp_event_data.data = 0xFFFFFFFF; shost = lpfc_shost_from_vport(phba->pport); fc_host_post_vendor_event(shost, fc_get_event_number(), sizeof(temp_event_data), (char *)&temp_event_data, SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); spin_lock_irq(&phba->hbalock); phba->over_temp_state = HBA_OVER_TEMP; spin_unlock_irq(&phba->hbalock); lpfc_sli4_offline_eratt(phba); return; } if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { lpfc_printf_log(phba, KERN_ERR, LOG_SLI, "3143 Port Down: Firmware Update " "Detected\n"); en_rn_msg = false; } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) lpfc_printf_log(phba, KERN_ERR, LOG_SLI, "3144 Port Down: Debug Dump\n"); else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3145 Port Down: Provisioning\n"); /* If resets are disabled then leave the HBA alone and return */ if (!phba->cfg_enable_hba_reset) return; /* Check port status register for function reset */ rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, en_rn_msg); if (rc == 0) { /* don't report event on forced debug dump */ if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) return; else break; } /* fall through for not able to recover */ lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3152 Unrecoverable error\n"); lpfc_sli4_offline_eratt(phba); break; case LPFC_SLI_INTF_IF_TYPE_1: default: break; } lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "3123 Report dump event to upper layer\n"); /* Send an internal error event to mgmt application */ lpfc_board_errevt_to_mgmt(phba); event_data = FC_REG_DUMP_EVENT; shost = lpfc_shost_from_vport(vport); fc_host_post_vendor_event(shost, fc_get_event_number(), sizeof(event_data), (char *) &event_data, SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); } /** * lpfc_handle_eratt - Wrapper func for handling hba error attention * @phba: pointer to lpfc HBA data structure. * * This routine wraps the actual SLI3 or SLI4 hba error attention handling * routine from the API jump table function pointer from the lpfc_hba struct. * * Return codes * 0 - success. * Any other value - error. **/ void lpfc_handle_eratt(struct lpfc_hba *phba) { (*phba->lpfc_handle_eratt)(phba); } /** * lpfc_handle_latt - The HBA link event handler * @phba: pointer to lpfc hba data structure. * * This routine is invoked from the worker thread to handle a HBA host * attention link event. SLI3 only. **/ void lpfc_handle_latt(struct lpfc_hba *phba) { struct lpfc_vport *vport = phba->pport; struct lpfc_sli *psli = &phba->sli; LPFC_MBOXQ_t *pmb; volatile uint32_t control; int rc = 0; pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { rc = 1; goto lpfc_handle_latt_err_exit; } rc = lpfc_mbox_rsrc_prep(phba, pmb); if (rc) { rc = 2; mempool_free(pmb, phba->mbox_mem_pool); goto lpfc_handle_latt_err_exit; } /* Cleanup any outstanding ELS commands */ lpfc_els_flush_all_cmd(phba); psli->slistat.link_event++; lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; pmb->vport = vport; /* Block ELS IOCBs until we have processed this mbox command */ phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT); if (rc == MBX_NOT_FINISHED) { rc = 4; goto lpfc_handle_latt_free_mbuf; } /* Clear Link Attention in HA REG */ spin_lock_irq(&phba->hbalock); writel(HA_LATT, phba->HAregaddr); readl(phba->HAregaddr); /* flush */ spin_unlock_irq(&phba->hbalock); return; lpfc_handle_latt_free_mbuf: phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT; lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); lpfc_handle_latt_err_exit: /* Enable Link attention interrupts */ spin_lock_irq(&phba->hbalock); psli->sli_flag |= LPFC_PROCESS_LA; control = readl(phba->HCregaddr); control |= HC_LAINT_ENA; writel(control, phba->HCregaddr); readl(phba->HCregaddr); /* flush */ /* Clear Link Attention in HA REG */ writel(HA_LATT, phba->HAregaddr); readl(phba->HAregaddr); /* flush */ spin_unlock_irq(&phba->hbalock); lpfc_linkdown(phba); phba->link_state = LPFC_HBA_ERROR; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc); return; } static void lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex) { int i, j; while (length > 0) { /* Look for Serial Number */ if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) { *pindex += 2; i = vpd[*pindex]; *pindex += 1; j = 0; length -= (3+i); while (i--) { phba->SerialNumber[j++] = vpd[(*pindex)++]; if (j == 31) break; } phba->SerialNumber[j] = 0; continue; } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) { phba->vpd_flag |= VPD_MODEL_DESC; *pindex += 2; i = vpd[*pindex]; *pindex += 1; j = 0; length -= (3+i); while (i--) { phba->ModelDesc[j++] = vpd[(*pindex)++]; if (j == 255) break; } phba->ModelDesc[j] = 0; continue; } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) { phba->vpd_flag |= VPD_MODEL_NAME; *pindex += 2; i = vpd[*pindex]; *pindex += 1; j = 0; length -= (3+i); while (i--) { phba->ModelName[j++] = vpd[(*pindex)++]; if (j == 79) break; } phba->ModelName[j] = 0; continue; } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) { phba->vpd_flag |= VPD_PROGRAM_TYPE; *pindex += 2; i = vpd[*pindex]; *pindex += 1; j = 0; length -= (3+i); while (i--) { phba->ProgramType[j++] = vpd[(*pindex)++]; if (j == 255) break; } phba->ProgramType[j] = 0; continue; } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) { phba->vpd_flag |= VPD_PORT; *pindex += 2; i = vpd[*pindex]; *pindex += 1; j = 0; length -= (3 + i); while (i--) { if ((phba->sli_rev == LPFC_SLI_REV4) && (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET)) { j++; (*pindex)++; } else phba->Port[j++] = vpd[(*pindex)++]; if (j == 19) break; } if ((phba->sli_rev != LPFC_SLI_REV4) || (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_NON)) phba->Port[j] = 0; continue; } else { *pindex += 2; i = vpd[*pindex]; *pindex += 1; *pindex += i; length -= (3 + i); } } } /** * lpfc_parse_vpd - Parse VPD (Vital Product Data) * @phba: pointer to lpfc hba data structure. * @vpd: pointer to the vital product data. * @len: length of the vital product data in bytes. * * This routine parses the Vital Product Data (VPD). The VPD is treated as * an array of characters. In this routine, the ModelName, ProgramType, and * ModelDesc, etc. fields of the phba data structure will be populated. * * Return codes * 0 - pointer to the VPD passed in is NULL * 1 - success **/ int lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len) { uint8_t lenlo, lenhi; int Length; int i; int finished = 0; int index = 0; if (!vpd) return 0; /* Vital Product */ lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0455 Vital Product Data: x%x x%x x%x x%x\n", (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], (uint32_t) vpd[3]); while (!finished && (index < (len - 4))) { switch (vpd[index]) { case 0x82: case 0x91: index += 1; lenlo = vpd[index]; index += 1; lenhi = vpd[index]; index += 1; i = ((((unsigned short)lenhi) << 8) + lenlo); index += i; break; case 0x90: index += 1; lenlo = vpd[index]; index += 1; lenhi = vpd[index]; index += 1; Length = ((((unsigned short)lenhi) << 8) + lenlo); if (Length > len - index) Length = len - index; lpfc_fill_vpd(phba, vpd, Length, &index); finished = 0; break; case 0x78: finished = 1; break; default: index ++; break; } } return(1); } /** * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description * @phba: pointer to lpfc hba data structure. * @mdp: pointer to the data structure to hold the derived model name. * @descp: pointer to the data structure to hold the derived description. * * This routine retrieves HBA's description based on its registered PCI device * ID. The @descp passed into this function points to an array of 256 chars. It * shall be returned with the model name, maximum speed, and the host bus type. * The @mdp passed into this function points to an array of 80 chars. When the * function returns, the @mdp will be filled with the model name. **/ static void lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) { uint16_t sub_dev_id = phba->pcidev->subsystem_device; char *model = "<Unknown>"; int tbolt = 0; switch (sub_dev_id) { case PCI_DEVICE_ID_CLRY_161E: model = "161E"; break; case PCI_DEVICE_ID_CLRY_162E: model = "162E"; break; case PCI_DEVICE_ID_CLRY_164E: model = "164E"; break; case PCI_DEVICE_ID_CLRY_161P: model = "161P"; break; case PCI_DEVICE_ID_CLRY_162P: model = "162P"; break; case PCI_DEVICE_ID_CLRY_164P: model = "164P"; break; case PCI_DEVICE_ID_CLRY_321E: model = "321E"; break; case PCI_DEVICE_ID_CLRY_322E: model = "322E"; break; case PCI_DEVICE_ID_CLRY_324E: model = "324E"; break; case PCI_DEVICE_ID_CLRY_321P: model = "321P"; break; case PCI_DEVICE_ID_CLRY_322P: model = "322P"; break; case PCI_DEVICE_ID_CLRY_324P: model = "324P"; break; case PCI_DEVICE_ID_TLFC_2XX2: model = "2XX2"; tbolt = 1; break; case PCI_DEVICE_ID_TLFC_3162: model = "3162"; tbolt = 1; break; case PCI_DEVICE_ID_TLFC_3322: model = "3322"; tbolt = 1; break; default: model = "Unknown"; break; } if (mdp && mdp[0] == '\0') snprintf(mdp, 79, "%s", model); if (descp && descp[0] == '\0') snprintf(descp, 255, "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s", (tbolt) ? "ThunderLink FC " : "Celerity FC-", model, phba->Port); } /** * lpfc_get_hba_model_desc - Retrieve HBA device model name and description * @phba: pointer to lpfc hba data structure. * @mdp: pointer to the data structure to hold the derived model name. * @descp: pointer to the data structure to hold the derived description. * * This routine retrieves HBA's description based on its registered PCI device * ID. The @descp passed into this function points to an array of 256 chars. It * shall be returned with the model name, maximum speed, and the host bus type. * The @mdp passed into this function points to an array of 80 chars. When the * function returns, the @mdp will be filled with the model name. **/ static void lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) { lpfc_vpd_t *vp; uint16_t dev_id = phba->pcidev->device; int max_speed; int GE = 0; int oneConnect = 0; /* default is not a oneConnect */ struct { char *name; char *bus; char *function; } m = {"<Unknown>", "", ""}; if (mdp && mdp[0] != '\0' && descp && descp[0] != '\0') return; if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) { lpfc_get_atto_model_desc(phba, mdp, descp); return; } if (phba->lmt & LMT_64Gb) max_speed = 64; else if (phba->lmt & LMT_32Gb) max_speed = 32; else if (phba->lmt & LMT_16Gb) max_speed = 16; else if (phba->lmt & LMT_10Gb) max_speed = 10; else if (phba->lmt & LMT_8Gb) max_speed = 8; else if (phba->lmt & LMT_4Gb) max_speed = 4; else if (phba->lmt & LMT_2Gb) max_speed = 2; else if (phba->lmt & LMT_1Gb) max_speed = 1; else max_speed = 0; vp = &phba->vpd; switch (dev_id) { case PCI_DEVICE_ID_FIREFLY: m = (typeof(m)){"LP6000", "PCI", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_SUPERFLY: if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) m = (typeof(m)){"LP7000", "PCI", ""}; else m = (typeof(m)){"LP7000E", "PCI", ""}; m.function = "Obsolete, Unsupported Fibre Channel Adapter"; break; case PCI_DEVICE_ID_DRAGONFLY: m = (typeof(m)){"LP8000", "PCI", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_CENTAUR: if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) m = (typeof(m)){"LP9002", "PCI", ""}; else m = (typeof(m)){"LP9000", "PCI", ""}; m.function = "Obsolete, Unsupported Fibre Channel Adapter"; break; case PCI_DEVICE_ID_RFLY: m = (typeof(m)){"LP952", "PCI", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_PEGASUS: m = (typeof(m)){"LP9802", "PCI-X", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_THOR: m = (typeof(m)){"LP10000", "PCI-X", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_VIPER: m = (typeof(m)){"LPX1000", "PCI-X", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_PFLY: m = (typeof(m)){"LP982", "PCI-X", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_TFLY: m = (typeof(m)){"LP1050", "PCI-X", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_HELIOS: m = (typeof(m)){"LP11000", "PCI-X2", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_HELIOS_SCSP: m = (typeof(m)){"LP11000-SP", "PCI-X2", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_HELIOS_DCSP: m = (typeof(m)){"LP11002-SP", "PCI-X2", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_NEPTUNE: m = (typeof(m)){"LPe1000", "PCIe", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_NEPTUNE_SCSP: m = (typeof(m)){"LPe1000-SP", "PCIe", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_NEPTUNE_DCSP: m = (typeof(m)){"LPe1002-SP", "PCIe", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_BMID: m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_BSMB: m = (typeof(m)){"LP111", "PCI-X2", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_ZEPHYR: m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_ZEPHYR_SCSP: m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_ZEPHYR_DCSP: m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"}; GE = 1; break; case PCI_DEVICE_ID_ZMID: m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_ZSMB: m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_LP101: m = (typeof(m)){"LP101", "PCI-X", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_LP10000S: m = (typeof(m)){"LP10000-S", "PCI", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_LP11000S: m = (typeof(m)){"LP11000-S", "PCI-X2", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_LPE11000S: m = (typeof(m)){"LPe11000-S", "PCIe", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_SAT: m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_SAT_MID: m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_SAT_SMB: m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_SAT_DCSP: m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_SAT_SCSP: m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_SAT_S: m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_PROTEUS_VF: m = (typeof(m)){"LPev12000", "PCIe IOV", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_PROTEUS_PF: m = (typeof(m)){"LPev12000", "PCIe IOV", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_PROTEUS_S: m = (typeof(m)){"LPemv12002-S", "PCIe IOV", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_TIGERSHARK: oneConnect = 1; m = (typeof(m)){"OCe10100", "PCIe", "FCoE"}; break; case PCI_DEVICE_ID_TOMCAT: oneConnect = 1; m = (typeof(m)){"OCe11100", "PCIe", "FCoE"}; break; case PCI_DEVICE_ID_FALCON: m = (typeof(m)){"LPSe12002-ML1-E", "PCIe", "EmulexSecure Fibre"}; break; case PCI_DEVICE_ID_BALIUS: m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_LANCER_FC: m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_LANCER_FC_VF: m = (typeof(m)){"LPe16000", "PCIe", "Obsolete, Unsupported Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_LANCER_FCOE: oneConnect = 1; m = (typeof(m)){"OCe15100", "PCIe", "FCoE"}; break; case PCI_DEVICE_ID_LANCER_FCOE_VF: oneConnect = 1; m = (typeof(m)){"OCe15100", "PCIe", "Obsolete, Unsupported FCoE"}; break; case PCI_DEVICE_ID_LANCER_G6_FC: m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_LANCER_G7_FC: m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_LANCER_G7P_FC: m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"}; break; case PCI_DEVICE_ID_SKYHAWK: case PCI_DEVICE_ID_SKYHAWK_VF: oneConnect = 1; m = (typeof(m)){"OCe14000", "PCIe", "FCoE"}; break; default: m = (typeof(m)){"Unknown", "", ""}; break; } if (mdp && mdp[0] == '\0') snprintf(mdp, 79,"%s", m.name); /* * oneConnect hba requires special processing, they are all initiators * and we put the port number on the end */ if (descp && descp[0] == '\0') { if (oneConnect) snprintf(descp, 255, "Emulex OneConnect %s, %s Initiator %s", m.name, m.function, phba->Port); else if (max_speed == 0) snprintf(descp, 255, "Emulex %s %s %s", m.name, m.bus, m.function); else snprintf(descp, 255, "Emulex %s %d%s %s %s", m.name, max_speed, (GE) ? "GE" : "Gb", m.bus, m.function); } } /** * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring * @phba: pointer to lpfc hba data structure. * @pring: pointer to a IOCB ring. * @cnt: the number of IOCBs to be posted to the IOCB ring. * * This routine posts a given number of IOCBs with the associated DMA buffer * descriptors specified by the cnt argument to the given IOCB ring. * * Return codes * The number of IOCBs NOT able to be posted to the IOCB ring. **/ int lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt) { IOCB_t *icmd; struct lpfc_iocbq *iocb; struct lpfc_dmabuf *mp1, *mp2; cnt += pring->missbufcnt; /* While there are buffers to post */ while (cnt > 0) { /* Allocate buffer for command iocb */ iocb = lpfc_sli_get_iocbq(phba); if (iocb == NULL) { pring->missbufcnt = cnt; return cnt; } icmd = &iocb->iocb; /* 2 buffers can be posted per command */ /* Allocate buffer to post */ mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); if (mp1) mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys); if (!mp1 || !mp1->virt) { kfree(mp1); lpfc_sli_release_iocbq(phba, iocb); pring->missbufcnt = cnt; return cnt; } INIT_LIST_HEAD(&mp1->list); /* Allocate buffer to post */ if (cnt > 1) { mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); if (mp2) mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp2->phys); if (!mp2 || !mp2->virt) { kfree(mp2); lpfc_mbuf_free(phba, mp1->virt, mp1->phys); kfree(mp1); lpfc_sli_release_iocbq(phba, iocb); pring->missbufcnt = cnt; return cnt; } INIT_LIST_HEAD(&mp2->list); } else { mp2 = NULL; } icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; icmd->ulpBdeCount = 1; cnt--; if (mp2) { icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; cnt--; icmd->ulpBdeCount = 2; } icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; icmd->ulpLe = 1; if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) == IOCB_ERROR) { lpfc_mbuf_free(phba, mp1->virt, mp1->phys); kfree(mp1); cnt++; if (mp2) { lpfc_mbuf_free(phba, mp2->virt, mp2->phys); kfree(mp2); cnt++; } lpfc_sli_release_iocbq(phba, iocb); pring->missbufcnt = cnt; return cnt; } lpfc_sli_ringpostbuf_put(phba, pring, mp1); if (mp2) lpfc_sli_ringpostbuf_put(phba, pring, mp2); } pring->missbufcnt = 0; return 0; } /** * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring * @phba: pointer to lpfc hba data structure. * * This routine posts initial receive IOCB buffers to the ELS ring. The * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is * set to 64 IOCBs. SLI3 only. * * Return codes * 0 - success (currently always success) **/ static int lpfc_post_rcv_buf(struct lpfc_hba *phba) { struct lpfc_sli *psli = &phba->sli; /* Ring 0, ELS / CT buffers */ lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0); /* Ring 2 - FCP no buffers needed */ return 0; } #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) /** * lpfc_sha_init - Set up initial array of hash table entries * @HashResultPointer: pointer to an array as hash table. * * This routine sets up the initial values to the array of hash table entries * for the LC HBAs. **/ static void lpfc_sha_init(uint32_t * HashResultPointer) { HashResultPointer[0] = 0x67452301; HashResultPointer[1] = 0xEFCDAB89; HashResultPointer[2] = 0x98BADCFE; HashResultPointer[3] = 0x10325476; HashResultPointer[4] = 0xC3D2E1F0; } /** * lpfc_sha_iterate - Iterate initial hash table with the working hash table * @HashResultPointer: pointer to an initial/result hash table. * @HashWorkingPointer: pointer to an working hash table. * * This routine iterates an initial hash table pointed by @HashResultPointer * with the values from the working hash table pointeed by @HashWorkingPointer. * The results are putting back to the initial hash table, returned through * the @HashResultPointer as the result hash table. **/ static void lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) { int t; uint32_t TEMP; uint32_t A, B, C, D, E; t = 16; do { HashWorkingPointer[t] = S(1, HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 8] ^ HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); } while (++t <= 79); t = 0; A = HashResultPointer[0]; B = HashResultPointer[1]; C = HashResultPointer[2]; D = HashResultPointer[3]; E = HashResultPointer[4]; do { if (t < 20) { TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; } else if (t < 40) { TEMP = (B ^ C ^ D) + 0x6ED9EBA1; } else if (t < 60) { TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; } else { TEMP = (B ^ C ^ D) + 0xCA62C1D6; } TEMP += S(5, A) + E + HashWorkingPointer[t]; E = D; D = C; C = S(30, B); B = A; A = TEMP; } while (++t <= 79); HashResultPointer[0] += A; HashResultPointer[1] += B; HashResultPointer[2] += C; HashResultPointer[3] += D; HashResultPointer[4] += E; } /** * lpfc_challenge_key - Create challenge key based on WWPN of the HBA * @RandomChallenge: pointer to the entry of host challenge random number array. * @HashWorking: pointer to the entry of the working hash array. * * This routine calculates the working hash array referred by @HashWorking * from the challenge random numbers associated with the host, referred by * @RandomChallenge. The result is put into the entry of the working hash * array and returned by reference through @HashWorking. **/ static void lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) { *HashWorking = (*RandomChallenge ^ *HashWorking); } /** * lpfc_hba_init - Perform special handling for LC HBA initialization * @phba: pointer to lpfc hba data structure. * @hbainit: pointer to an array of unsigned 32-bit integers. * * This routine performs the special handling for LC HBA initialization. **/ void lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) { int t; uint32_t *HashWorking; uint32_t *pwwnn = (uint32_t *) phba->wwnn; HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL); if (!HashWorking) return; HashWorking[0] = HashWorking[78] = *pwwnn++; HashWorking[1] = HashWorking[79] = *pwwnn; for (t = 0; t < 7; t++) lpfc_challenge_key(phba->RandomData + t, HashWorking + t); lpfc_sha_init(hbainit); lpfc_sha_iterate(hbainit, HashWorking); kfree(HashWorking); } /** * lpfc_cleanup - Performs vport cleanups before deleting a vport * @vport: pointer to a virtual N_Port data structure. * * This routine performs the necessary cleanups before deleting the @vport. * It invokes the discovery state machine to perform necessary state * transitions and to release the ndlps associated with the @vport. Note, * the physical port is treated as @vport 0. **/ void lpfc_cleanup(struct lpfc_vport *vport) { struct lpfc_hba *phba = vport->phba; struct lpfc_nodelist *ndlp, *next_ndlp; int i = 0; if (phba->link_state > LPFC_LINK_DOWN) lpfc_port_link_failure(vport); /* Clean up VMID resources */ if (lpfc_is_vmid_enabled(phba)) lpfc_vmid_vport_cleanup(vport); list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { if (vport->port_type != LPFC_PHYSICAL_PORT && ndlp->nlp_DID == Fabric_DID) { /* Just free up ndlp with Fabric_DID for vports */ lpfc_nlp_put(ndlp); continue; } if (ndlp->nlp_DID == Fabric_Cntl_DID && ndlp->nlp_state == NLP_STE_UNUSED_NODE) { lpfc_nlp_put(ndlp); continue; } /* Fabric Ports not in UNMAPPED state are cleaned up in the * DEVICE_RM event. */ if (ndlp->nlp_type & NLP_FABRIC && ndlp->nlp_state == NLP_STE_UNMAPPED_NODE) lpfc_disc_state_machine(vport, ndlp, NULL, NLP_EVT_DEVICE_RECOVERY); if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD))) lpfc_disc_state_machine(vport, ndlp, NULL, NLP_EVT_DEVICE_RM); } /* This is a special case flush to return all * IOs before entering this loop. There are * two points in the code where a flush is * avoided if the FC_UNLOADING flag is set. * one is in the multipool destroy, * (this prevents a crash) and the other is * in the nvme abort handler, ( also prevents * a crash). Both of these exceptions are * cases where the slot is still accessible. * The flush here is only when the pci slot * is offline. */ if (vport->load_flag & FC_UNLOADING && pci_channel_offline(phba->pcidev)) lpfc_sli_flush_io_rings(vport->phba); /* At this point, ALL ndlp's should be gone * because of the previous NLP_EVT_DEVICE_RM. * Lets wait for this to happen, if needed. */ while (!list_empty(&vport->fc_nodes)) { if (i++ > 3000) { lpfc_printf_vlog(vport, KERN_ERR, LOG_TRACE_EVENT, "0233 Nodelist not empty\n"); list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { lpfc_printf_vlog(ndlp->vport, KERN_ERR, LOG_DISCOVERY, "0282 did:x%x ndlp:x%px " "refcnt:%d xflags x%x nflag x%x\n", ndlp->nlp_DID, (void *)ndlp, kref_read(&ndlp->kref), ndlp->fc4_xpt_flags, ndlp->nlp_flag); } break; } /* Wait for any activity on ndlps to settle */ msleep(10); } lpfc_cleanup_vports_rrqs(vport, NULL); } /** * lpfc_stop_vport_timers - Stop all the timers associated with a vport * @vport: pointer to a virtual N_Port data structure. * * This routine stops all the timers associated with a @vport. This function * is invoked before disabling or deleting a @vport. Note that the physical * port is treated as @vport 0. **/ void lpfc_stop_vport_timers(struct lpfc_vport *vport) { del_timer_sync(&vport->els_tmofunc); del_timer_sync(&vport->delayed_disc_tmo); lpfc_can_disctmo(vport); return; } /** * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer * @phba: pointer to lpfc hba data structure. * * This routine stops the SLI4 FCF rediscover wait timer if it's on. The * caller of this routine should already hold the host lock. **/ void __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) { /* Clear pending FCF rediscovery wait flag */ phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; /* Now, try to stop the timer */ del_timer(&phba->fcf.redisc_wait); } /** * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer * @phba: pointer to lpfc hba data structure. * * This routine stops the SLI4 FCF rediscover wait timer if it's on. It * checks whether the FCF rediscovery wait timer is pending with the host * lock held before proceeding with disabling the timer and clearing the * wait timer pendig flag. **/ void lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) { spin_lock_irq(&phba->hbalock); if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { /* FCF rediscovery timer already fired or stopped */ spin_unlock_irq(&phba->hbalock); return; } __lpfc_sli4_stop_fcf_redisc_wait_timer(phba); /* Clear failover in progress flags */ phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC); spin_unlock_irq(&phba->hbalock); } /** * lpfc_cmf_stop - Stop CMF processing * @phba: pointer to lpfc hba data structure. * * This is called when the link goes down or if CMF mode is turned OFF. * It is also called when going offline or unloaded just before the * congestion info buffer is unregistered. **/ void lpfc_cmf_stop(struct lpfc_hba *phba) { int cpu; struct lpfc_cgn_stat *cgs; /* We only do something if CMF is enabled */ if (!phba->sli4_hba.pc_sli4_params.cmf) return; lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "6221 Stop CMF / Cancel Timer\n"); /* Cancel the CMF timer */ hrtimer_cancel(&phba->cmf_stats_timer); hrtimer_cancel(&phba->cmf_timer); /* Zero CMF counters */ atomic_set(&phba->cmf_busy, 0); for_each_present_cpu(cpu) { cgs = per_cpu_ptr(phba->cmf_stat, cpu); atomic64_set(&cgs->total_bytes, 0); atomic64_set(&cgs->rcv_bytes, 0); atomic_set(&cgs->rx_io_cnt, 0); atomic64_set(&cgs->rx_latency, 0); } atomic_set(&phba->cmf_bw_wait, 0); /* Resume any blocked IO - Queue unblock on workqueue */ queue_work(phba->wq, &phba->unblock_request_work); } static inline uint64_t lpfc_get_max_line_rate(struct lpfc_hba *phba) { uint64_t rate = lpfc_sli_port_speed_get(phba); return ((((unsigned long)rate) * 1024 * 1024) / 10); } void lpfc_cmf_signal_init(struct lpfc_hba *phba) { lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "6223 Signal CMF init\n"); /* Use the new fc_linkspeed to recalculate */ phba->cmf_interval_rate = LPFC_CMF_INTERVAL; phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba); phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * phba->cmf_interval_rate, 1000); phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count; /* This is a signal to firmware to sync up CMF BW with link speed */ lpfc_issue_cmf_sync_wqe(phba, 0, 0); } /** * lpfc_cmf_start - Start CMF processing * @phba: pointer to lpfc hba data structure. * * This is called when the link comes up or if CMF mode is turned OFF * to Monitor or Managed. **/ void lpfc_cmf_start(struct lpfc_hba *phba) { struct lpfc_cgn_stat *cgs; int cpu; /* We only do something if CMF is enabled */ if (!phba->sli4_hba.pc_sli4_params.cmf || phba->cmf_active_mode == LPFC_CFG_OFF) return; /* Reinitialize congestion buffer info */ lpfc_init_congestion_buf(phba); atomic_set(&phba->cgn_fabric_warn_cnt, 0); atomic_set(&phba->cgn_fabric_alarm_cnt, 0); atomic_set(&phba->cgn_sync_alarm_cnt, 0); atomic_set(&phba->cgn_sync_warn_cnt, 0); atomic_set(&phba->cmf_busy, 0); for_each_present_cpu(cpu) { cgs = per_cpu_ptr(phba->cmf_stat, cpu); atomic64_set(&cgs->total_bytes, 0); atomic64_set(&cgs->rcv_bytes, 0); atomic_set(&cgs->rx_io_cnt, 0); atomic64_set(&cgs->rx_latency, 0); } phba->cmf_latency.tv_sec = 0; phba->cmf_latency.tv_nsec = 0; lpfc_cmf_signal_init(phba); lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "6222 Start CMF / Timer\n"); phba->cmf_timer_cnt = 0; hrtimer_start(&phba->cmf_timer, ktime_set(0, LPFC_CMF_INTERVAL * NSEC_PER_MSEC), HRTIMER_MODE_REL); hrtimer_start(&phba->cmf_stats_timer, ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC), HRTIMER_MODE_REL); /* Setup for latency check in IO cmpl routines */ ktime_get_real_ts64(&phba->cmf_latency); atomic_set(&phba->cmf_bw_wait, 0); atomic_set(&phba->cmf_stop_io, 0); } /** * lpfc_stop_hba_timers - Stop all the timers associated with an HBA * @phba: pointer to lpfc hba data structure. * * This routine stops all the timers associated with a HBA. This function is * invoked before either putting a HBA offline or unloading the driver. **/ void lpfc_stop_hba_timers(struct lpfc_hba *phba) { if (phba->pport) lpfc_stop_vport_timers(phba->pport); cancel_delayed_work_sync(&phba->eq_delay_work); cancel_delayed_work_sync(&phba->idle_stat_delay_work); del_timer_sync(&phba->sli.mbox_tmo); del_timer_sync(&phba->fabric_block_timer); del_timer_sync(&phba->eratt_poll); del_timer_sync(&phba->hb_tmofunc); if (phba->sli_rev == LPFC_SLI_REV4) { del_timer_sync(&phba->rrq_tmr); phba->hba_flag &= ~HBA_RRQ_ACTIVE; } phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); switch (phba->pci_dev_grp) { case LPFC_PCI_DEV_LP: /* Stop any LightPulse device specific driver timers */ del_timer_sync(&phba->fcp_poll_timer); break; case LPFC_PCI_DEV_OC: /* Stop any OneConnect device specific driver timers */ lpfc_sli4_stop_fcf_redisc_wait_timer(phba); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0297 Invalid device group (x%x)\n", phba->pci_dev_grp); break; } return; } /** * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked * @phba: pointer to lpfc hba data structure. * @mbx_action: flag for mailbox no wait action. * * This routine marks a HBA's management interface as blocked. Once the HBA's * management interface is marked as blocked, all the user space access to * the HBA, whether they are from sysfs interface or libdfc interface will * all be blocked. The HBA is set to block the management interface when the * driver prepares the HBA interface for online or offline. **/ static void lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action) { unsigned long iflag; uint8_t actcmd = MBX_HEARTBEAT; unsigned long timeout; spin_lock_irqsave(&phba->hbalock, iflag); phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO; spin_unlock_irqrestore(&phba->hbalock, iflag); if (mbx_action == LPFC_MBX_NO_WAIT) return; timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies; spin_lock_irqsave(&phba->hbalock, iflag); if (phba->sli.mbox_active) { actcmd = phba->sli.mbox_active->u.mb.mbxCommand; /* Determine how long we might wait for the active mailbox * command to be gracefully completed by firmware. */ timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, phba->sli.mbox_active) * 1000) + jiffies; } spin_unlock_irqrestore(&phba->hbalock, iflag); /* Wait for the outstnading mailbox command to complete */ while (phba->sli.mbox_active) { /* Check active mailbox complete status every 2ms */ msleep(2); if (time_after(jiffies, timeout)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2813 Mgmt IO is Blocked %x " "- mbox cmd %x still active\n", phba->sli.sli_flag, actcmd); break; } } } /** * lpfc_sli4_node_prep - Assign RPIs for active nodes. * @phba: pointer to lpfc hba data structure. * * Allocate RPIs for all active remote nodes. This is needed whenever * an SLI4 adapter is reset and the driver is not unloading. Its purpose * is to fixup the temporary rpi assignments. **/ void lpfc_sli4_node_prep(struct lpfc_hba *phba) { struct lpfc_nodelist *ndlp, *next_ndlp; struct lpfc_vport **vports; int i, rpi; if (phba->sli_rev != LPFC_SLI_REV4) return; vports = lpfc_create_vport_work_array(phba); if (vports == NULL) return; for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { if (vports[i]->load_flag & FC_UNLOADING) continue; list_for_each_entry_safe(ndlp, next_ndlp, &vports[i]->fc_nodes, nlp_listp) { rpi = lpfc_sli4_alloc_rpi(phba); if (rpi == LPFC_RPI_ALLOC_ERROR) { /* TODO print log? */ continue; } ndlp->nlp_rpi = rpi; lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE | LOG_DISCOVERY, "0009 Assign RPI x%x to ndlp x%px " "DID:x%06x flg:x%x\n", ndlp->nlp_rpi, ndlp, ndlp->nlp_DID, ndlp->nlp_flag); } } lpfc_destroy_vport_work_array(phba, vports); } /** * lpfc_create_expedite_pool - create expedite pool * @phba: pointer to lpfc hba data structure. * * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0 * to expedite pool. Mark them as expedite. **/ static void lpfc_create_expedite_pool(struct lpfc_hba *phba) { struct lpfc_sli4_hdw_queue *qp; struct lpfc_io_buf *lpfc_ncmd; struct lpfc_io_buf *lpfc_ncmd_next; struct lpfc_epd_pool *epd_pool; unsigned long iflag; epd_pool = &phba->epd_pool; qp = &phba->sli4_hba.hdwq[0]; spin_lock_init(&epd_pool->lock); spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); spin_lock(&epd_pool->lock); INIT_LIST_HEAD(&epd_pool->list); list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, &qp->lpfc_io_buf_list_put, list) { list_move_tail(&lpfc_ncmd->list, &epd_pool->list); lpfc_ncmd->expedite = true; qp->put_io_bufs--; epd_pool->count++; if (epd_pool->count >= XRI_BATCH) break; } spin_unlock(&epd_pool->lock); spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); } /** * lpfc_destroy_expedite_pool - destroy expedite pool * @phba: pointer to lpfc hba data structure. * * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put * of HWQ 0. Clear the mark. **/ static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba) { struct lpfc_sli4_hdw_queue *qp; struct lpfc_io_buf *lpfc_ncmd; struct lpfc_io_buf *lpfc_ncmd_next; struct lpfc_epd_pool *epd_pool; unsigned long iflag; epd_pool = &phba->epd_pool; qp = &phba->sli4_hba.hdwq[0]; spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); spin_lock(&epd_pool->lock); list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, &epd_pool->list, list) { list_move_tail(&lpfc_ncmd->list, &qp->lpfc_io_buf_list_put); lpfc_ncmd->flags = false; qp->put_io_bufs++; epd_pool->count--; } spin_unlock(&epd_pool->lock); spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); } /** * lpfc_create_multixri_pools - create multi-XRI pools * @phba: pointer to lpfc hba data structure. * * This routine initialize public, private per HWQ. Then, move XRIs from * lpfc_io_buf_list_put to public pool. High and low watermark are also * Initialized. **/ void lpfc_create_multixri_pools(struct lpfc_hba *phba) { u32 i, j; u32 hwq_count; u32 count_per_hwq; struct lpfc_io_buf *lpfc_ncmd; struct lpfc_io_buf *lpfc_ncmd_next; unsigned long iflag; struct lpfc_sli4_hdw_queue *qp; struct lpfc_multixri_pool *multixri_pool; struct lpfc_pbl_pool *pbl_pool; struct lpfc_pvt_pool *pvt_pool; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n", phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu, phba->sli4_hba.io_xri_cnt); if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) lpfc_create_expedite_pool(phba); hwq_count = phba->cfg_hdw_queue; count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count; for (i = 0; i < hwq_count; i++) { multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL); if (!multixri_pool) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "1238 Failed to allocate memory for " "multixri_pool\n"); if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) lpfc_destroy_expedite_pool(phba); j = 0; while (j < i) { qp = &phba->sli4_hba.hdwq[j]; kfree(qp->p_multixri_pool); j++; } phba->cfg_xri_rebalancing = 0; return; } qp = &phba->sli4_hba.hdwq[i]; qp->p_multixri_pool = multixri_pool; multixri_pool->xri_limit = count_per_hwq; multixri_pool->rrb_next_hwqid = i; /* Deal with public free xri pool */ pbl_pool = &multixri_pool->pbl_pool; spin_lock_init(&pbl_pool->lock); spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); spin_lock(&pbl_pool->lock); INIT_LIST_HEAD(&pbl_pool->list); list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, &qp->lpfc_io_buf_list_put, list) { list_move_tail(&lpfc_ncmd->list, &pbl_pool->list); qp->put_io_bufs--; pbl_pool->count++; } lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n", pbl_pool->count, i); spin_unlock(&pbl_pool->lock); spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); /* Deal with private free xri pool */ pvt_pool = &multixri_pool->pvt_pool; pvt_pool->high_watermark = multixri_pool->xri_limit / 2; pvt_pool->low_watermark = XRI_BATCH; spin_lock_init(&pvt_pool->lock); spin_lock_irqsave(&pvt_pool->lock, iflag); INIT_LIST_HEAD(&pvt_pool->list); pvt_pool->count = 0; spin_unlock_irqrestore(&pvt_pool->lock, iflag); } } /** * lpfc_destroy_multixri_pools - destroy multi-XRI pools * @phba: pointer to lpfc hba data structure. * * This routine returns XRIs from public/private to lpfc_io_buf_list_put. **/ static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba) { u32 i; u32 hwq_count; struct lpfc_io_buf *lpfc_ncmd; struct lpfc_io_buf *lpfc_ncmd_next; unsigned long iflag; struct lpfc_sli4_hdw_queue *qp; struct lpfc_multixri_pool *multixri_pool; struct lpfc_pbl_pool *pbl_pool; struct lpfc_pvt_pool *pvt_pool; if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) lpfc_destroy_expedite_pool(phba); if (!(phba->pport->load_flag & FC_UNLOADING)) lpfc_sli_flush_io_rings(phba); hwq_count = phba->cfg_hdw_queue; for (i = 0; i < hwq_count; i++) { qp = &phba->sli4_hba.hdwq[i]; multixri_pool = qp->p_multixri_pool; if (!multixri_pool) continue; qp->p_multixri_pool = NULL; spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); /* Deal with public free xri pool */ pbl_pool = &multixri_pool->pbl_pool; spin_lock(&pbl_pool->lock); lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n", pbl_pool->count, i); list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, &pbl_pool->list, list) { list_move_tail(&lpfc_ncmd->list, &qp->lpfc_io_buf_list_put); qp->put_io_bufs++; pbl_pool->count--; } INIT_LIST_HEAD(&pbl_pool->list); pbl_pool->count = 0; spin_unlock(&pbl_pool->lock); /* Deal with private free xri pool */ pvt_pool = &multixri_pool->pvt_pool; spin_lock(&pvt_pool->lock); lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n", pvt_pool->count, i); list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, &pvt_pool->list, list) { list_move_tail(&lpfc_ncmd->list, &qp->lpfc_io_buf_list_put); qp->put_io_bufs++; pvt_pool->count--; } INIT_LIST_HEAD(&pvt_pool->list); pvt_pool->count = 0; spin_unlock(&pvt_pool->lock); spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); kfree(multixri_pool); } } /** * lpfc_online - Initialize and bring a HBA online * @phba: pointer to lpfc hba data structure. * * This routine initializes the HBA and brings a HBA online. During this * process, the management interface is blocked to prevent user space access * to the HBA interfering with the driver initialization. * * Return codes * 0 - successful * 1 - failed **/ int lpfc_online(struct lpfc_hba *phba) { struct lpfc_vport *vport; struct lpfc_vport **vports; int i, error = 0; bool vpis_cleared = false; if (!phba) return 0; vport = phba->pport; if (!(vport->fc_flag & FC_OFFLINE_MODE)) return 0; lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0458 Bring Adapter online\n"); lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); if (phba->sli_rev == LPFC_SLI_REV4) { if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */ lpfc_unblock_mgmt_io(phba); return 1; } spin_lock_irq(&phba->hbalock); if (!phba->sli4_hba.max_cfg_param.vpi_used) vpis_cleared = true; spin_unlock_irq(&phba->hbalock); /* Reestablish the local initiator port. * The offline process destroyed the previous lport. */ if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME && !phba->nvmet_support) { error = lpfc_nvme_create_localport(phba->pport); if (error) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6132 NVME restore reg failed " "on nvmei error x%x\n", error); } } else { lpfc_sli_queue_init(phba); if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */ lpfc_unblock_mgmt_io(phba); return 1; } } vports = lpfc_create_vport_work_array(phba); if (vports != NULL) { for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { struct Scsi_Host *shost; shost = lpfc_shost_from_vport(vports[i]); spin_lock_irq(shost->host_lock); vports[i]->fc_flag &= ~FC_OFFLINE_MODE; if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED) vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; if (phba->sli_rev == LPFC_SLI_REV4) { vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; if ((vpis_cleared) && (vports[i]->port_type != LPFC_PHYSICAL_PORT)) vports[i]->vpi = 0; } spin_unlock_irq(shost->host_lock); } } lpfc_destroy_vport_work_array(phba, vports); if (phba->cfg_xri_rebalancing) lpfc_create_multixri_pools(phba); lpfc_cpuhp_add(phba); lpfc_unblock_mgmt_io(phba); return 0; } /** * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked * @phba: pointer to lpfc hba data structure. * * This routine marks a HBA's management interface as not blocked. Once the * HBA's management interface is marked as not blocked, all the user space * access to the HBA, whether they are from sysfs interface or libdfc * interface will be allowed. The HBA is set to block the management interface * when the driver prepares the HBA interface for online or offline and then * set to unblock the management interface afterwards. **/ void lpfc_unblock_mgmt_io(struct lpfc_hba * phba) { unsigned long iflag; spin_lock_irqsave(&phba->hbalock, iflag); phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO; spin_unlock_irqrestore(&phba->hbalock, iflag); } /** * lpfc_offline_prep - Prepare a HBA to be brought offline * @phba: pointer to lpfc hba data structure. * @mbx_action: flag for mailbox shutdown action. * * This routine is invoked to prepare a HBA to be brought offline. It performs * unregistration login to all the nodes on all vports and flushes the mailbox * queue to make it ready to be brought offline. **/ void lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action) { struct lpfc_vport *vport = phba->pport; struct lpfc_nodelist *ndlp, *next_ndlp; struct lpfc_vport **vports; struct Scsi_Host *shost; int i; int offline; bool hba_pci_err; if (vport->fc_flag & FC_OFFLINE_MODE) return; lpfc_block_mgmt_io(phba, mbx_action); lpfc_linkdown(phba); offline = pci_channel_offline(phba->pcidev); hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags); /* Issue an unreg_login to all nodes on all vports */ vports = lpfc_create_vport_work_array(phba); if (vports != NULL) { for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { if (vports[i]->load_flag & FC_UNLOADING) continue; shost = lpfc_shost_from_vport(vports[i]); spin_lock_irq(shost->host_lock); vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; vports[i]->fc_flag &= ~FC_VFI_REGISTERED; spin_unlock_irq(shost->host_lock); shost = lpfc_shost_from_vport(vports[i]); list_for_each_entry_safe(ndlp, next_ndlp, &vports[i]->fc_nodes, nlp_listp) { spin_lock_irq(&ndlp->lock); ndlp->nlp_flag &= ~NLP_NPR_ADISC; spin_unlock_irq(&ndlp->lock); if (offline || hba_pci_err) { spin_lock_irq(&ndlp->lock); ndlp->nlp_flag &= ~(NLP_UNREG_INP | NLP_RPI_REGISTERED); spin_unlock_irq(&ndlp->lock); if (phba->sli_rev == LPFC_SLI_REV4) lpfc_sli_rpi_release(vports[i], ndlp); } else { lpfc_unreg_rpi(vports[i], ndlp); } /* * Whenever an SLI4 port goes offline, free the * RPI. Get a new RPI when the adapter port * comes back online. */ if (phba->sli_rev == LPFC_SLI_REV4) { lpfc_printf_vlog(vports[i], KERN_INFO, LOG_NODE | LOG_DISCOVERY, "0011 Free RPI x%x on " "ndlp: x%px did x%x\n", ndlp->nlp_rpi, ndlp, ndlp->nlp_DID); lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR; } if (ndlp->nlp_type & NLP_FABRIC) { lpfc_disc_state_machine(vports[i], ndlp, NULL, NLP_EVT_DEVICE_RECOVERY); /* Don't remove the node unless the node * has been unregistered with the * transport, and we're not in recovery * before dev_loss_tmo triggered. * Otherwise, let dev_loss take care of * the node. */ if (!(ndlp->save_flags & NLP_IN_RECOV_POST_DEV_LOSS) && !(ndlp->fc4_xpt_flags & (NVME_XPT_REGD | SCSI_XPT_REGD))) lpfc_disc_state_machine (vports[i], ndlp, NULL, NLP_EVT_DEVICE_RM); } } } } lpfc_destroy_vport_work_array(phba, vports); lpfc_sli_mbox_sys_shutdown(phba, mbx_action); if (phba->wq) flush_workqueue(phba->wq); } /** * lpfc_offline - Bring a HBA offline * @phba: pointer to lpfc hba data structure. * * This routine actually brings a HBA offline. It stops all the timers * associated with the HBA, brings down the SLI layer, and eventually * marks the HBA as in offline state for the upper layer protocol. **/ void lpfc_offline(struct lpfc_hba *phba) { struct Scsi_Host *shost; struct lpfc_vport **vports; int i; if (phba->pport->fc_flag & FC_OFFLINE_MODE) return; /* stop port and all timers associated with this hba */ lpfc_stop_port(phba); /* Tear down the local and target port registrations. The * nvme transports need to cleanup. */ lpfc_nvmet_destroy_targetport(phba); lpfc_nvme_destroy_localport(phba->pport); vports = lpfc_create_vport_work_array(phba); if (vports != NULL) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) lpfc_stop_vport_timers(vports[i]); lpfc_destroy_vport_work_array(phba, vports); lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0460 Bring Adapter offline\n"); /* Bring down the SLI Layer and cleanup. The HBA is offline now. */ lpfc_sli_hba_down(phba); spin_lock_irq(&phba->hbalock); phba->work_ha = 0; spin_unlock_irq(&phba->hbalock); vports = lpfc_create_vport_work_array(phba); if (vports != NULL) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { shost = lpfc_shost_from_vport(vports[i]); spin_lock_irq(shost->host_lock); vports[i]->work_port_events = 0; vports[i]->fc_flag |= FC_OFFLINE_MODE; spin_unlock_irq(shost->host_lock); } lpfc_destroy_vport_work_array(phba, vports); /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled * in hba_unset */ if (phba->pport->fc_flag & FC_OFFLINE_MODE) __lpfc_cpuhp_remove(phba); if (phba->cfg_xri_rebalancing) lpfc_destroy_multixri_pools(phba); } /** * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists * @phba: pointer to lpfc hba data structure. * * This routine is to free all the SCSI buffers and IOCBs from the driver * list back to kernel. It is called from lpfc_pci_remove_one to free * the internal resources before the device is removed from the system. **/ static void lpfc_scsi_free(struct lpfc_hba *phba) { struct lpfc_io_buf *sb, *sb_next; if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) return; spin_lock_irq(&phba->hbalock); /* Release all the lpfc_scsi_bufs maintained by this host. */ spin_lock(&phba->scsi_buf_list_put_lock); list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put, list) { list_del(&sb->list); dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, sb->dma_handle); kfree(sb); phba->total_scsi_bufs--; } spin_unlock(&phba->scsi_buf_list_put_lock); spin_lock(&phba->scsi_buf_list_get_lock); list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get, list) { list_del(&sb->list); dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, sb->dma_handle); kfree(sb); phba->total_scsi_bufs--; } spin_unlock(&phba->scsi_buf_list_get_lock); spin_unlock_irq(&phba->hbalock); } /** * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists * @phba: pointer to lpfc hba data structure. * * This routine is to free all the IO buffers and IOCBs from the driver * list back to kernel. It is called from lpfc_pci_remove_one to free * the internal resources before the device is removed from the system. **/ void lpfc_io_free(struct lpfc_hba *phba) { struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next; struct lpfc_sli4_hdw_queue *qp; int idx; for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { qp = &phba->sli4_hba.hdwq[idx]; /* Release all the lpfc_nvme_bufs maintained by this host. */ spin_lock(&qp->io_buf_list_put_lock); list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, &qp->lpfc_io_buf_list_put, list) { list_del(&lpfc_ncmd->list); qp->put_io_bufs--; dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data, lpfc_ncmd->dma_handle); if (phba->cfg_xpsgl && !phba->nvmet_support) lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); kfree(lpfc_ncmd); qp->total_io_bufs--; } spin_unlock(&qp->io_buf_list_put_lock); spin_lock(&qp->io_buf_list_get_lock); list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, &qp->lpfc_io_buf_list_get, list) { list_del(&lpfc_ncmd->list); qp->get_io_bufs--; dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data, lpfc_ncmd->dma_handle); if (phba->cfg_xpsgl && !phba->nvmet_support) lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); kfree(lpfc_ncmd); qp->total_io_bufs--; } spin_unlock(&qp->io_buf_list_get_lock); } } /** * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping * @phba: pointer to lpfc hba data structure. * * This routine first calculates the sizes of the current els and allocated * scsi sgl lists, and then goes through all sgls to updates the physical * XRIs assigned due to port function reset. During port initialization, the * current els and allocated scsi sgl lists are 0s. * * Return codes * 0 - successful (for now, it always returns 0) **/ int lpfc_sli4_els_sgl_update(struct lpfc_hba *phba) { struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; uint16_t i, lxri, xri_cnt, els_xri_cnt; LIST_HEAD(els_sgl_list); int rc; /* * update on pci function's els xri-sgl list */ els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) { /* els xri-sgl expanded */ xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt; lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "3157 ELS xri-sgl count increased from " "%d to %d\n", phba->sli4_hba.els_xri_cnt, els_xri_cnt); /* allocate the additional els sgls */ for (i = 0; i < xri_cnt; i++) { sglq_entry = kzalloc(sizeof(struct lpfc_sglq), GFP_KERNEL); if (sglq_entry == NULL) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2562 Failure to allocate an " "ELS sgl entry:%d\n", i); rc = -ENOMEM; goto out_free_mem; } sglq_entry->buff_type = GEN_BUFF_TYPE; sglq_entry->virt = lpfc_mbuf_alloc(phba, 0, &sglq_entry->phys); if (sglq_entry->virt == NULL) { kfree(sglq_entry); lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2563 Failure to allocate an " "ELS mbuf:%d\n", i); rc = -ENOMEM; goto out_free_mem; } sglq_entry->sgl = sglq_entry->virt; memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE); sglq_entry->state = SGL_FREED; list_add_tail(&sglq_entry->list, &els_sgl_list); } spin_lock_irq(&phba->sli4_hba.sgl_list_lock); list_splice_init(&els_sgl_list, &phba->sli4_hba.lpfc_els_sgl_list); spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) { /* els xri-sgl shrinked */ xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt; lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "3158 ELS xri-sgl count decreased from " "%d to %d\n", phba->sli4_hba.els_xri_cnt, els_xri_cnt); spin_lock_irq(&phba->sli4_hba.sgl_list_lock); list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &els_sgl_list); /* release extra els sgls from list */ for (i = 0; i < xri_cnt; i++) { list_remove_head(&els_sgl_list, sglq_entry, struct lpfc_sglq, list); if (sglq_entry) { __lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); kfree(sglq_entry); } } list_splice_init(&els_sgl_list, &phba->sli4_hba.lpfc_els_sgl_list); spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); } else lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "3163 ELS xri-sgl count unchanged: %d\n", els_xri_cnt); phba->sli4_hba.els_xri_cnt = els_xri_cnt; /* update xris to els sgls on the list */ sglq_entry = NULL; sglq_entry_next = NULL; list_for_each_entry_safe(sglq_entry, sglq_entry_next, &phba->sli4_hba.lpfc_els_sgl_list, list) { lxri = lpfc_sli4_next_xritag(phba); if (lxri == NO_XRI) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2400 Failed to allocate xri for " "ELS sgl\n"); rc = -ENOMEM; goto out_free_mem; } sglq_entry->sli4_lxritag = lxri; sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; } return 0; out_free_mem: lpfc_free_els_sgl_list(phba); return rc; } /** * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping * @phba: pointer to lpfc hba data structure. * * This routine first calculates the sizes of the current els and allocated * scsi sgl lists, and then goes through all sgls to updates the physical * XRIs assigned due to port function reset. During port initialization, the * current els and allocated scsi sgl lists are 0s. * * Return codes * 0 - successful (for now, it always returns 0) **/ int lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba) { struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; uint16_t i, lxri, xri_cnt, els_xri_cnt; uint16_t nvmet_xri_cnt; LIST_HEAD(nvmet_sgl_list); int rc; /* * update on pci function's nvmet xri-sgl list */ els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); /* For NVMET, ALL remaining XRIs are dedicated for IO processing */ nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) { /* els xri-sgl expanded */ xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt; lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "6302 NVMET xri-sgl cnt grew from %d to %d\n", phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); /* allocate the additional nvmet sgls */ for (i = 0; i < xri_cnt; i++) { sglq_entry = kzalloc(sizeof(struct lpfc_sglq), GFP_KERNEL); if (sglq_entry == NULL) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6303 Failure to allocate an " "NVMET sgl entry:%d\n", i); rc = -ENOMEM; goto out_free_mem; } sglq_entry->buff_type = NVMET_BUFF_TYPE; sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0, &sglq_entry->phys); if (sglq_entry->virt == NULL) { kfree(sglq_entry); lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6304 Failure to allocate an " "NVMET buf:%d\n", i); rc = -ENOMEM; goto out_free_mem; } sglq_entry->sgl = sglq_entry->virt; memset(sglq_entry->sgl, 0, phba->cfg_sg_dma_buf_size); sglq_entry->state = SGL_FREED; list_add_tail(&sglq_entry->list, &nvmet_sgl_list); } spin_lock_irq(&phba->hbalock); spin_lock(&phba->sli4_hba.sgl_list_lock); list_splice_init(&nvmet_sgl_list, &phba->sli4_hba.lpfc_nvmet_sgl_list); spin_unlock(&phba->sli4_hba.sgl_list_lock); spin_unlock_irq(&phba->hbalock); } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) { /* nvmet xri-sgl shrunk */ xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt; lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "6305 NVMET xri-sgl count decreased from " "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); spin_lock_irq(&phba->hbalock); spin_lock(&phba->sli4_hba.sgl_list_lock); list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &nvmet_sgl_list); /* release extra nvmet sgls from list */ for (i = 0; i < xri_cnt; i++) { list_remove_head(&nvmet_sgl_list, sglq_entry, struct lpfc_sglq, list); if (sglq_entry) { lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); kfree(sglq_entry); } } list_splice_init(&nvmet_sgl_list, &phba->sli4_hba.lpfc_nvmet_sgl_list); spin_unlock(&phba->sli4_hba.sgl_list_lock); spin_unlock_irq(&phba->hbalock); } else lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "6306 NVMET xri-sgl count unchanged: %d\n", nvmet_xri_cnt); phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt; /* update xris to nvmet sgls on the list */ sglq_entry = NULL; sglq_entry_next = NULL; list_for_each_entry_safe(sglq_entry, sglq_entry_next, &phba->sli4_hba.lpfc_nvmet_sgl_list, list) { lxri = lpfc_sli4_next_xritag(phba); if (lxri == NO_XRI) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6307 Failed to allocate xri for " "NVMET sgl\n"); rc = -ENOMEM; goto out_free_mem; } sglq_entry->sli4_lxritag = lxri; sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; } return 0; out_free_mem: lpfc_free_nvmet_sgl_list(phba); return rc; } int lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf) { LIST_HEAD(blist); struct lpfc_sli4_hdw_queue *qp; struct lpfc_io_buf *lpfc_cmd; struct lpfc_io_buf *iobufp, *prev_iobufp; int idx, cnt, xri, inserted; cnt = 0; for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { qp = &phba->sli4_hba.hdwq[idx]; spin_lock_irq(&qp->io_buf_list_get_lock); spin_lock(&qp->io_buf_list_put_lock); /* Take everything off the get and put lists */ list_splice_init(&qp->lpfc_io_buf_list_get, &blist); list_splice(&qp->lpfc_io_buf_list_put, &blist); INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); cnt += qp->get_io_bufs + qp->put_io_bufs; qp->get_io_bufs = 0; qp->put_io_bufs = 0; qp->total_io_bufs = 0; spin_unlock(&qp->io_buf_list_put_lock); spin_unlock_irq(&qp->io_buf_list_get_lock); } /* * Take IO buffers off blist and put on cbuf sorted by XRI. * This is because POST_SGL takes a sequential range of XRIs * to post to the firmware. */ for (idx = 0; idx < cnt; idx++) { list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list); if (!lpfc_cmd) return cnt; if (idx == 0) { list_add_tail(&lpfc_cmd->list, cbuf); continue; } xri = lpfc_cmd->cur_iocbq.sli4_xritag; inserted = 0; prev_iobufp = NULL; list_for_each_entry(iobufp, cbuf, list) { if (xri < iobufp->cur_iocbq.sli4_xritag) { if (prev_iobufp) list_add(&lpfc_cmd->list, &prev_iobufp->list); else list_add(&lpfc_cmd->list, cbuf); inserted = 1; break; } prev_iobufp = iobufp; } if (!inserted) list_add_tail(&lpfc_cmd->list, cbuf); } return cnt; } int lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf) { struct lpfc_sli4_hdw_queue *qp; struct lpfc_io_buf *lpfc_cmd; int idx, cnt; unsigned long iflags; qp = phba->sli4_hba.hdwq; cnt = 0; while (!list_empty(cbuf)) { for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { list_remove_head(cbuf, lpfc_cmd, struct lpfc_io_buf, list); if (!lpfc_cmd) return cnt; cnt++; qp = &phba->sli4_hba.hdwq[idx]; lpfc_cmd->hdwq_no = idx; lpfc_cmd->hdwq = qp; lpfc_cmd->cur_iocbq.cmd_cmpl = NULL; spin_lock_irqsave(&qp->io_buf_list_put_lock, iflags); list_add_tail(&lpfc_cmd->list, &qp->lpfc_io_buf_list_put); qp->put_io_bufs++; qp->total_io_bufs++; spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflags); } } return cnt; } /** * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping * @phba: pointer to lpfc hba data structure. * * This routine first calculates the sizes of the current els and allocated * scsi sgl lists, and then goes through all sgls to updates the physical * XRIs assigned due to port function reset. During port initialization, the * current els and allocated scsi sgl lists are 0s. * * Return codes * 0 - successful (for now, it always returns 0) **/ int lpfc_sli4_io_sgl_update(struct lpfc_hba *phba) { struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL; uint16_t i, lxri, els_xri_cnt; uint16_t io_xri_cnt, io_xri_max; LIST_HEAD(io_sgl_list); int rc, cnt; /* * update on pci function's allocated nvme xri-sgl list */ /* maximum number of xris available for nvme buffers */ els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; phba->sli4_hba.io_xri_max = io_xri_max; lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "6074 Current allocated XRI sgl count:%d, " "maximum XRI count:%d els_xri_cnt:%d\n\n", phba->sli4_hba.io_xri_cnt, phba->sli4_hba.io_xri_max, els_xri_cnt); cnt = lpfc_io_buf_flush(phba, &io_sgl_list); if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) { /* max nvme xri shrunk below the allocated nvme buffers */ io_xri_cnt = phba->sli4_hba.io_xri_cnt - phba->sli4_hba.io_xri_max; /* release the extra allocated nvme buffers */ for (i = 0; i < io_xri_cnt; i++) { list_remove_head(&io_sgl_list, lpfc_ncmd, struct lpfc_io_buf, list); if (lpfc_ncmd) { dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data, lpfc_ncmd->dma_handle); kfree(lpfc_ncmd); } } phba->sli4_hba.io_xri_cnt -= io_xri_cnt; } /* update xris associated to remaining allocated nvme buffers */ lpfc_ncmd = NULL; lpfc_ncmd_next = NULL; phba->sli4_hba.io_xri_cnt = cnt; list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, &io_sgl_list, list) { lxri = lpfc_sli4_next_xritag(phba); if (lxri == NO_XRI) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6075 Failed to allocate xri for " "nvme buffer\n"); rc = -ENOMEM; goto out_free_mem; } lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri; lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri]; } cnt = lpfc_io_buf_replenish(phba, &io_sgl_list); return 0; out_free_mem: lpfc_io_free(phba); return rc; } /** * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec * @phba: Pointer to lpfc hba data structure. * @num_to_alloc: The requested number of buffers to allocate. * * This routine allocates nvme buffers for device with SLI-4 interface spec, * the nvme buffer contains all the necessary information needed to initiate * an I/O. After allocating up to @num_to_allocate IO buffers and put * them on a list, it post them to the port by using SGL block post. * * Return codes: * int - number of IO buffers that were allocated and posted. * 0 = failure, less than num_to_alloc is a partial failure. **/ int lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc) { struct lpfc_io_buf *lpfc_ncmd; struct lpfc_iocbq *pwqeq; uint16_t iotag, lxri = 0; int bcnt, num_posted; LIST_HEAD(prep_nblist); LIST_HEAD(post_nblist); LIST_HEAD(nvme_nblist); phba->sli4_hba.io_xri_cnt = 0; for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL); if (!lpfc_ncmd) break; /* * Get memory from the pci pool to map the virt space to * pci bus space for an I/O. The DMA buffer includes the * number of SGE's necessary to support the sg_tablesize. */ lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool, GFP_KERNEL, &lpfc_ncmd->dma_handle); if (!lpfc_ncmd->data) { kfree(lpfc_ncmd); break; } if (phba->cfg_xpsgl && !phba->nvmet_support) { INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list); } else { /* * 4K Page alignment is CRITICAL to BlockGuard, double * check to be sure. */ if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && (((unsigned long)(lpfc_ncmd->data) & (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3369 Memory alignment err: " "addr=%lx\n", (unsigned long)lpfc_ncmd->data); dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data, lpfc_ncmd->dma_handle); kfree(lpfc_ncmd); break; } } INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list); lxri = lpfc_sli4_next_xritag(phba); if (lxri == NO_XRI) { dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data, lpfc_ncmd->dma_handle); kfree(lpfc_ncmd); break; } pwqeq = &lpfc_ncmd->cur_iocbq; /* Allocate iotag for lpfc_ncmd->cur_iocbq. */ iotag = lpfc_sli_next_iotag(phba, pwqeq); if (iotag == 0) { dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data, lpfc_ncmd->dma_handle); kfree(lpfc_ncmd); lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6121 Failed to allocate IOTAG for" " XRI:0x%x\n", lxri); lpfc_sli4_free_xri(phba, lxri); break; } pwqeq->sli4_lxritag = lxri; pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; /* Initialize local short-hand pointers. */ lpfc_ncmd->dma_sgl = lpfc_ncmd->data; lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle; lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd; spin_lock_init(&lpfc_ncmd->buf_lock); /* add the nvme buffer to a post list */ list_add_tail(&lpfc_ncmd->list, &post_nblist); phba->sli4_hba.io_xri_cnt++; } lpfc_printf_log(phba, KERN_INFO, LOG_NVME, "6114 Allocate %d out of %d requested new NVME " "buffers of size x%zu bytes\n", bcnt, num_to_alloc, sizeof(*lpfc_ncmd)); /* post the list of nvme buffer sgls to port if available */ if (!list_empty(&post_nblist)) num_posted = lpfc_sli4_post_io_sgl_list( phba, &post_nblist, bcnt); else num_posted = 0; return num_posted; } static uint64_t lpfc_get_wwpn(struct lpfc_hba *phba) { uint64_t wwn; int rc; LPFC_MBOXQ_t *mboxq; MAILBOX_t *mb; mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!mboxq) return (uint64_t)-1; /* First get WWN of HBA instance */ lpfc_read_nv(phba, mboxq); rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); if (rc != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6019 Mailbox failed , mbxCmd x%x " "READ_NV, mbxStatus x%x\n", bf_get(lpfc_mqe_command, &mboxq->u.mqe), bf_get(lpfc_mqe_status, &mboxq->u.mqe)); mempool_free(mboxq, phba->mbox_mem_pool); return (uint64_t) -1; } mb = &mboxq->u.mb; memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); /* wwn is WWPN of HBA instance */ mempool_free(mboxq, phba->mbox_mem_pool); if (phba->sli_rev == LPFC_SLI_REV4) return be64_to_cpu(wwn); else return rol64(wwn, 32); } static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba) { if (phba->sli_rev == LPFC_SLI_REV4) if (phba->cfg_xpsgl && !phba->nvmet_support) return LPFC_MAX_SG_TABLESIZE; else return phba->cfg_scsi_seg_cnt; else return phba->cfg_sg_seg_cnt; } /** * lpfc_vmid_res_alloc - Allocates resources for VMID * @phba: pointer to lpfc hba data structure. * @vport: pointer to vport data structure * * This routine allocated the resources needed for the VMID. * * Return codes * 0 on Success * Non-0 on Failure */ static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport) { /* VMID feature is supported only on SLI4 */ if (phba->sli_rev == LPFC_SLI_REV3) { phba->cfg_vmid_app_header = 0; phba->cfg_vmid_priority_tagging = 0; } if (lpfc_is_vmid_enabled(phba)) { vport->vmid = kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid), GFP_KERNEL); if (!vport->vmid) return -ENOMEM; rwlock_init(&vport->vmid_lock); /* Set the VMID parameters for the vport */ vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging; vport->vmid_inactivity_timeout = phba->cfg_vmid_inactivity_timeout; vport->max_vmid = phba->cfg_max_vmid; vport->cur_vmid_cnt = 0; vport->vmid_priority_range = bitmap_zalloc (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL); if (!vport->vmid_priority_range) { kfree(vport->vmid); return -ENOMEM; } hash_init(vport->hash_table); } return 0; } /** * lpfc_create_port - Create an FC port * @phba: pointer to lpfc hba data structure. * @instance: a unique integer ID to this FC port. * @dev: pointer to the device data structure. * * This routine creates a FC port for the upper layer protocol. The FC port * can be created on top of either a physical port or a virtual port provided * by the HBA. This routine also allocates a SCSI host data structure (shost) * and associates the FC port created before adding the shost into the SCSI * layer. * * Return codes * @vport - pointer to the virtual N_Port data structure. * NULL - port create failed. **/ struct lpfc_vport * lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) { struct lpfc_vport *vport; struct Scsi_Host *shost = NULL; struct scsi_host_template *template; int error = 0; int i; uint64_t wwn; bool use_no_reset_hba = false; int rc; if (lpfc_no_hba_reset_cnt) { if (phba->sli_rev < LPFC_SLI_REV4 && dev == &phba->pcidev->dev) { /* Reset the port first */ lpfc_sli_brdrestart(phba); rc = lpfc_sli_chipset_init(phba); if (rc) return NULL; } wwn = lpfc_get_wwpn(phba); } for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { if (wwn == lpfc_no_hba_reset[i]) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6020 Setting use_no_reset port=%llx\n", wwn); use_no_reset_hba = true; break; } } /* Seed template for SCSI host registration */ if (dev == &phba->pcidev->dev) { if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { /* Seed physical port template */ template = &lpfc_template; if (use_no_reset_hba) /* template is for a no reset SCSI Host */ template->eh_host_reset_handler = NULL; /* Seed updated value of sg_tablesize */ template->sg_tablesize = lpfc_get_sg_tablesize(phba); } else { /* NVMET is for physical port only */ template = &lpfc_template_nvme; } } else { /* Seed vport template */ template = &lpfc_vport_template; /* Seed updated value of sg_tablesize */ template->sg_tablesize = lpfc_get_sg_tablesize(phba); } shost = scsi_host_alloc(template, sizeof(struct lpfc_vport)); if (!shost) goto out; vport = (struct lpfc_vport *) shost->hostdata; vport->phba = phba; vport->load_flag |= FC_LOADING; vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; vport->fc_rscn_flush = 0; lpfc_get_vport_cfgparam(vport); /* Adjust value in vport */ vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type; shost->unique_id = instance; shost->max_id = LPFC_MAX_TARGET; shost->max_lun = vport->cfg_max_luns; shost->this_id = -1; shost->max_cmd_len = 16; if (phba->sli_rev == LPFC_SLI_REV4) { if (!phba->cfg_fcp_mq_threshold || phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue) phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue; shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(), phba->cfg_fcp_mq_threshold); shost->dma_boundary = phba->sli4_hba.pc_sli4_params.sge_supp_len-1; } else /* SLI-3 has a limited number of hardware queues (3), * thus there is only one for FCP processing. */ shost->nr_hw_queues = 1; /* * Set initial can_queue value since 0 is no longer supported and * scsi_add_host will fail. This will be adjusted later based on the * max xri value determined in hba setup. */ shost->can_queue = phba->cfg_hba_queue_depth - 10; if (dev != &phba->pcidev->dev) { shost->transportt = lpfc_vport_transport_template; vport->port_type = LPFC_NPIV_PORT; } else { shost->transportt = lpfc_transport_template; vport->port_type = LPFC_PHYSICAL_PORT; } lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, "9081 CreatePort TMPLATE type %x TBLsize %d " "SEGcnt %d/%d\n", vport->port_type, shost->sg_tablesize, phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt); /* Allocate the resources for VMID */ rc = lpfc_vmid_res_alloc(phba, vport); if (rc) goto out_put_shost; /* Initialize all internally managed lists. */ INIT_LIST_HEAD(&vport->fc_nodes); INIT_LIST_HEAD(&vport->rcv_buffer_list); spin_lock_init(&vport->work_port_lock); timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0); timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0); timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0); if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) lpfc_setup_bg(phba, shost); error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); if (error) goto out_free_vmid; spin_lock_irq(&phba->port_list_lock); list_add_tail(&vport->listentry, &phba->port_list); spin_unlock_irq(&phba->port_list_lock); return vport; out_free_vmid: kfree(vport->vmid); bitmap_free(vport->vmid_priority_range); out_put_shost: scsi_host_put(shost); out: return NULL; } /** * destroy_port - destroy an FC port * @vport: pointer to an lpfc virtual N_Port data structure. * * This routine destroys a FC port from the upper layer protocol. All the * resources associated with the port are released. **/ void destroy_port(struct lpfc_vport *vport) { struct Scsi_Host *shost = lpfc_shost_from_vport(vport); struct lpfc_hba *phba = vport->phba; lpfc_debugfs_terminate(vport); fc_remove_host(shost); scsi_remove_host(shost); spin_lock_irq(&phba->port_list_lock); list_del_init(&vport->listentry); spin_unlock_irq(&phba->port_list_lock); lpfc_cleanup(vport); return; } /** * lpfc_get_instance - Get a unique integer ID * * This routine allocates a unique integer ID from lpfc_hba_index pool. It * uses the kernel idr facility to perform the task. * * Return codes: * instance - a unique integer ID allocated as the new instance. * -1 - lpfc get instance failed. **/ int lpfc_get_instance(void) { int ret; ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL); return ret < 0 ? -1 : ret; } /** * lpfc_scan_finished - method for SCSI layer to detect whether scan is done * @shost: pointer to SCSI host data structure. * @time: elapsed time of the scan in jiffies. * * This routine is called by the SCSI layer with a SCSI host to determine * whether the scan host is finished. * * Note: there is no scan_start function as adapter initialization will have * asynchronously kicked off the link initialization. * * Return codes * 0 - SCSI host scan is not over yet. * 1 - SCSI host scan is over. **/ int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time) { struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; struct lpfc_hba *phba = vport->phba; int stat = 0; spin_lock_irq(shost->host_lock); if (vport->load_flag & FC_UNLOADING) { stat = 1; goto finished; } if (time >= msecs_to_jiffies(30 * 1000)) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0461 Scanning longer than 30 " "seconds. Continuing initialization\n"); stat = 1; goto finished; } if (time >= msecs_to_jiffies(15 * 1000) && phba->link_state <= LPFC_LINK_DOWN) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0465 Link down longer than 15 " "seconds. Continuing initialization\n"); stat = 1; goto finished; } if (vport->port_state != LPFC_VPORT_READY) goto finished; if (vport->num_disc_nodes || vport->fc_prli_sent) goto finished; if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000)) goto finished; if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0) goto finished; stat = 1; finished: spin_unlock_irq(shost->host_lock); return stat; } static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost) { struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; struct lpfc_hba *phba = vport->phba; fc_host_supported_speeds(shost) = 0; /* * Avoid reporting supported link speed for FCoE as it can't be * controlled via FCoE. */ if (phba->hba_flag & HBA_FCOE_MODE) return; if (phba->lmt & LMT_256Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT; if (phba->lmt & LMT_128Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT; if (phba->lmt & LMT_64Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT; if (phba->lmt & LMT_32Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT; if (phba->lmt & LMT_16Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT; if (phba->lmt & LMT_10Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT; if (phba->lmt & LMT_8Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT; if (phba->lmt & LMT_4Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT; if (phba->lmt & LMT_2Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT; if (phba->lmt & LMT_1Gb) fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT; } /** * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port * @shost: pointer to SCSI host data structure. * * This routine initializes a given SCSI host attributes on a FC port. The * SCSI host can be either on top of a physical port or a virtual port. **/ void lpfc_host_attrib_init(struct Scsi_Host *shost) { struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; struct lpfc_hba *phba = vport->phba; /* * Set fixed host attributes. Must done after lpfc_sli_hba_setup(). */ fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); fc_host_supported_classes(shost) = FC_COS_CLASS3; memset(fc_host_supported_fc4s(shost), 0, sizeof(fc_host_supported_fc4s(shost))); fc_host_supported_fc4s(shost)[2] = 1; fc_host_supported_fc4s(shost)[7] = 1; lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost), sizeof fc_host_symbolic_name(shost)); lpfc_host_supported_speeds_set(shost); fc_host_maxframe_size(shost) = (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb; fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo; /* This value is also unchanging */ memset(fc_host_active_fc4s(shost), 0, sizeof(fc_host_active_fc4s(shost))); fc_host_active_fc4s(shost)[2] = 1; fc_host_active_fc4s(shost)[7] = 1; fc_host_max_npiv_vports(shost) = phba->max_vpi; spin_lock_irq(shost->host_lock); vport->load_flag &= ~FC_LOADING; spin_unlock_irq(shost->host_lock); } /** * lpfc_stop_port_s3 - Stop SLI3 device port * @phba: pointer to lpfc hba data structure. * * This routine is invoked to stop an SLI3 device port, it stops the device * from generating interrupts and stops the device driver's timers for the * device. **/ static void lpfc_stop_port_s3(struct lpfc_hba *phba) { /* Clear all interrupt enable conditions */ writel(0, phba->HCregaddr); readl(phba->HCregaddr); /* flush */ /* Clear all pending interrupts */ writel(0xffffffff, phba->HAregaddr); readl(phba->HAregaddr); /* flush */ /* Reset some HBA SLI setup states */ lpfc_stop_hba_timers(phba); phba->pport->work_port_events = 0; } /** * lpfc_stop_port_s4 - Stop SLI4 device port * @phba: pointer to lpfc hba data structure. * * This routine is invoked to stop an SLI4 device port, it stops the device * from generating interrupts and stops the device driver's timers for the * device. **/ static void lpfc_stop_port_s4(struct lpfc_hba *phba) { /* Reset some HBA SLI4 setup states */ lpfc_stop_hba_timers(phba); if (phba->pport) phba->pport->work_port_events = 0; phba->sli4_hba.intr_enable = 0; } /** * lpfc_stop_port - Wrapper function for stopping hba port * @phba: Pointer to HBA context object. * * This routine wraps the actual SLI3 or SLI4 hba stop port routine from * the API jump table function pointer from the lpfc_hba struct. **/ void lpfc_stop_port(struct lpfc_hba *phba) { phba->lpfc_stop_port(phba); if (phba->wq) flush_workqueue(phba->wq); } /** * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer * @phba: Pointer to hba for which this call is being executed. * * This routine starts the timer waiting for the FCF rediscovery to complete. **/ void lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba) { unsigned long fcf_redisc_wait_tmo = (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO)); /* Start fcf rediscovery wait period timer */ mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo); spin_lock_irq(&phba->hbalock); /* Allow action to new fcf asynchronous event */ phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE); /* Mark the FCF rediscovery pending state */ phba->fcf.fcf_flag |= FCF_REDISC_PEND; spin_unlock_irq(&phba->hbalock); } /** * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout * @t: Timer context used to obtain the pointer to lpfc hba data structure. * * This routine is invoked when waiting for FCF table rediscover has been * timed out. If new FCF record(s) has (have) been discovered during the * wait period, a new FCF event shall be added to the FCOE async event * list, and then worker thread shall be waked up for processing from the * worker thread context. **/ static void lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t) { struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait); /* Don't send FCF rediscovery event if timer cancelled */ spin_lock_irq(&phba->hbalock); if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { spin_unlock_irq(&phba->hbalock); return; } /* Clear FCF rediscovery timer pending flag */ phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; /* FCF rediscovery event to worker thread */ phba->fcf.fcf_flag |= FCF_REDISC_EVT; spin_unlock_irq(&phba->hbalock); lpfc_printf_log(phba, KERN_INFO, LOG_FIP, "2776 FCF rediscover quiescent timer expired\n"); /* wake up worker thread */ lpfc_worker_wake_up(phba); } /** * lpfc_vmid_poll - VMID timeout detection * @t: Timer context used to obtain the pointer to lpfc hba data structure. * * This routine is invoked when there is no I/O on by a VM for the specified * amount of time. When this situation is detected, the VMID has to be * deregistered from the switch and all the local resources freed. The VMID * will be reassigned to the VM once the I/O begins. **/ static void lpfc_vmid_poll(struct timer_list *t) { struct lpfc_hba *phba = from_timer(phba, t, inactive_vmid_poll); u32 wake_up = 0; /* check if there is a need to issue QFPA */ if (phba->pport->vmid_priority_tagging) { wake_up = 1; phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA; } /* Is the vmid inactivity timer enabled */ if (phba->pport->vmid_inactivity_timeout || phba->pport->load_flag & FC_DEREGISTER_ALL_APP_ID) { wake_up = 1; phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID; } if (wake_up) lpfc_worker_wake_up(phba); /* restart the timer for the next iteration */ mod_timer(&phba->inactive_vmid_poll, jiffies + msecs_to_jiffies(1000 * LPFC_VMID_TIMER)); } /** * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code * @phba: pointer to lpfc hba data structure. * @acqe_link: pointer to the async link completion queue entry. * * This routine is to parse the SLI4 link-attention link fault code. **/ static void lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, struct lpfc_acqe_link *acqe_link) { switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) { case LPFC_FC_LA_TYPE_LINK_DOWN: case LPFC_FC_LA_TYPE_TRUNKING_EVENT: case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: break; default: switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { case LPFC_ASYNC_LINK_FAULT_NONE: case LPFC_ASYNC_LINK_FAULT_LOCAL: case LPFC_ASYNC_LINK_FAULT_REMOTE: case LPFC_ASYNC_LINK_FAULT_LR_LRR: break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0398 Unknown link fault code: x%x\n", bf_get(lpfc_acqe_link_fault, acqe_link)); break; } break; } } /** * lpfc_sli4_parse_latt_type - Parse sli4 link attention type * @phba: pointer to lpfc hba data structure. * @acqe_link: pointer to the async link completion queue entry. * * This routine is to parse the SLI4 link attention type and translate it * into the base driver's link attention type coding. * * Return: Link attention type in terms of base driver's coding. **/ static uint8_t lpfc_sli4_parse_latt_type(struct lpfc_hba *phba, struct lpfc_acqe_link *acqe_link) { uint8_t att_type; switch (bf_get(lpfc_acqe_link_status, acqe_link)) { case LPFC_ASYNC_LINK_STATUS_DOWN: case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: att_type = LPFC_ATT_LINK_DOWN; break; case LPFC_ASYNC_LINK_STATUS_UP: /* Ignore physical link up events - wait for logical link up */ att_type = LPFC_ATT_RESERVED; break; case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: att_type = LPFC_ATT_LINK_UP; break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0399 Invalid link attention type: x%x\n", bf_get(lpfc_acqe_link_status, acqe_link)); att_type = LPFC_ATT_RESERVED; break; } return att_type; } /** * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed * @phba: pointer to lpfc hba data structure. * * This routine is to get an SLI3 FC port's link speed in Mbps. * * Return: link speed in terms of Mbps. **/ uint32_t lpfc_sli_port_speed_get(struct lpfc_hba *phba) { uint32_t link_speed; if (!lpfc_is_link_up(phba)) return 0; if (phba->sli_rev <= LPFC_SLI_REV3) { switch (phba->fc_linkspeed) { case LPFC_LINK_SPEED_1GHZ: link_speed = 1000; break; case LPFC_LINK_SPEED_2GHZ: link_speed = 2000; break; case LPFC_LINK_SPEED_4GHZ: link_speed = 4000; break; case LPFC_LINK_SPEED_8GHZ: link_speed = 8000; break; case LPFC_LINK_SPEED_10GHZ: link_speed = 10000; break; case LPFC_LINK_SPEED_16GHZ: link_speed = 16000; break; default: link_speed = 0; } } else { if (phba->sli4_hba.link_state.logical_speed) link_speed = phba->sli4_hba.link_state.logical_speed; else link_speed = phba->sli4_hba.link_state.speed; } return link_speed; } /** * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed * @phba: pointer to lpfc hba data structure. * @evt_code: asynchronous event code. * @speed_code: asynchronous event link speed code. * * This routine is to parse the giving SLI4 async event link speed code into * value of Mbps for the link speed. * * Return: link speed in terms of Mbps. **/ static uint32_t lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code, uint8_t speed_code) { uint32_t port_speed; switch (evt_code) { case LPFC_TRAILER_CODE_LINK: switch (speed_code) { case LPFC_ASYNC_LINK_SPEED_ZERO: port_speed = 0; break; case LPFC_ASYNC_LINK_SPEED_10MBPS: port_speed = 10; break; case LPFC_ASYNC_LINK_SPEED_100MBPS: port_speed = 100; break; case LPFC_ASYNC_LINK_SPEED_1GBPS: port_speed = 1000; break; case LPFC_ASYNC_LINK_SPEED_10GBPS: port_speed = 10000; break; case LPFC_ASYNC_LINK_SPEED_20GBPS: port_speed = 20000; break; case LPFC_ASYNC_LINK_SPEED_25GBPS: port_speed = 25000; break; case LPFC_ASYNC_LINK_SPEED_40GBPS: port_speed = 40000; break; case LPFC_ASYNC_LINK_SPEED_100GBPS: port_speed = 100000; break; default: port_speed = 0; } break; case LPFC_TRAILER_CODE_FC: switch (speed_code) { case LPFC_FC_LA_SPEED_UNKNOWN: port_speed = 0; break; case LPFC_FC_LA_SPEED_1G: port_speed = 1000; break; case LPFC_FC_LA_SPEED_2G: port_speed = 2000; break; case LPFC_FC_LA_SPEED_4G: port_speed = 4000; break; case LPFC_FC_LA_SPEED_8G: port_speed = 8000; break; case LPFC_FC_LA_SPEED_10G: port_speed = 10000; break; case LPFC_FC_LA_SPEED_16G: port_speed = 16000; break; case LPFC_FC_LA_SPEED_32G: port_speed = 32000; break; case LPFC_FC_LA_SPEED_64G: port_speed = 64000; break; case LPFC_FC_LA_SPEED_128G: port_speed = 128000; break; case LPFC_FC_LA_SPEED_256G: port_speed = 256000; break; default: port_speed = 0; } break; default: port_speed = 0; } return port_speed; } /** * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event * @phba: pointer to lpfc hba data structure. * @acqe_link: pointer to the async link completion queue entry. * * This routine is to handle the SLI4 asynchronous FCoE link event. **/ static void lpfc_sli4_async_link_evt(struct lpfc_hba *phba, struct lpfc_acqe_link *acqe_link) { LPFC_MBOXQ_t *pmb; MAILBOX_t *mb; struct lpfc_mbx_read_top *la; uint8_t att_type; int rc; att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP) return; phba->fcoe_eventtag = acqe_link->event_tag; pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0395 The mboxq allocation failed\n"); return; } rc = lpfc_mbox_rsrc_prep(phba, pmb); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0396 mailbox allocation failed\n"); goto out_free_pmb; } /* Cleanup any outstanding ELS commands */ lpfc_els_flush_all_cmd(phba); /* Block ELS IOCBs until we have done process link event */ phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; /* Update link event statistics */ phba->sli.slistat.link_event++; /* Create lpfc_handle_latt mailbox command from link ACQE */ lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; pmb->vport = phba->pport; /* Keep the link status for extra SLI4 state machine reference */ phba->sli4_hba.link_state.speed = lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK, bf_get(lpfc_acqe_link_speed, acqe_link)); phba->sli4_hba.link_state.duplex = bf_get(lpfc_acqe_link_duplex, acqe_link); phba->sli4_hba.link_state.status = bf_get(lpfc_acqe_link_status, acqe_link); phba->sli4_hba.link_state.type = bf_get(lpfc_acqe_link_type, acqe_link); phba->sli4_hba.link_state.number = bf_get(lpfc_acqe_link_number, acqe_link); phba->sli4_hba.link_state.fault = bf_get(lpfc_acqe_link_fault, acqe_link); phba->sli4_hba.link_state.logical_speed = bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10; lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "2900 Async FC/FCoE Link event - Speed:%dGBit " "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d " "Logical speed:%dMbps Fault:%d\n", phba->sli4_hba.link_state.speed, phba->sli4_hba.link_state.topology, phba->sli4_hba.link_state.status, phba->sli4_hba.link_state.type, phba->sli4_hba.link_state.number, phba->sli4_hba.link_state.logical_speed, phba->sli4_hba.link_state.fault); /* * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch * topology info. Note: Optional for non FC-AL ports. */ if (!(phba->hba_flag & HBA_FCOE_MODE)) { rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); if (rc == MBX_NOT_FINISHED) goto out_free_pmb; return; } /* * For FCoE Mode: fill in all the topology information we need and call * the READ_TOPOLOGY completion routine to continue without actually * sending the READ_TOPOLOGY mailbox command to the port. */ /* Initialize completion status */ mb = &pmb->u.mb; mb->mbxStatus = MBX_SUCCESS; /* Parse port fault information field */ lpfc_sli4_parse_latt_fault(phba, acqe_link); /* Parse and translate link attention fields */ la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop; la->eventTag = acqe_link->event_tag; bf_set(lpfc_mbx_read_top_att_type, la, att_type); bf_set(lpfc_mbx_read_top_link_spd, la, (bf_get(lpfc_acqe_link_speed, acqe_link))); /* Fake the following irrelevant fields */ bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT); bf_set(lpfc_mbx_read_top_alpa_granted, la, 0); bf_set(lpfc_mbx_read_top_il, la, 0); bf_set(lpfc_mbx_read_top_pb, la, 0); bf_set(lpfc_mbx_read_top_fa, la, 0); bf_set(lpfc_mbx_read_top_mm, la, 0); /* Invoke the lpfc_handle_latt mailbox command callback function */ lpfc_mbx_cmpl_read_topology(phba, pmb); return; out_free_pmb: lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); } /** * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read * topology. * @phba: pointer to lpfc hba data structure. * @speed_code: asynchronous event link speed code. * * This routine is to parse the giving SLI4 async event link speed code into * value of Read topology link speed. * * Return: link speed in terms of Read topology. **/ static uint8_t lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code) { uint8_t port_speed; switch (speed_code) { case LPFC_FC_LA_SPEED_1G: port_speed = LPFC_LINK_SPEED_1GHZ; break; case LPFC_FC_LA_SPEED_2G: port_speed = LPFC_LINK_SPEED_2GHZ; break; case LPFC_FC_LA_SPEED_4G: port_speed = LPFC_LINK_SPEED_4GHZ; break; case LPFC_FC_LA_SPEED_8G: port_speed = LPFC_LINK_SPEED_8GHZ; break; case LPFC_FC_LA_SPEED_16G: port_speed = LPFC_LINK_SPEED_16GHZ; break; case LPFC_FC_LA_SPEED_32G: port_speed = LPFC_LINK_SPEED_32GHZ; break; case LPFC_FC_LA_SPEED_64G: port_speed = LPFC_LINK_SPEED_64GHZ; break; case LPFC_FC_LA_SPEED_128G: port_speed = LPFC_LINK_SPEED_128GHZ; break; case LPFC_FC_LA_SPEED_256G: port_speed = LPFC_LINK_SPEED_256GHZ; break; default: port_speed = 0; break; } return port_speed; } void lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba) { if (!phba->rx_monitor) { lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "4411 Rx Monitor Info is empty.\n"); } else { lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0, LPFC_MAX_RXMONITOR_DUMP); } } /** * lpfc_cgn_update_stat - Save data into congestion stats buffer * @phba: pointer to lpfc hba data structure. * @dtag: FPIN descriptor received * * Increment the FPIN received counter/time when it happens. */ void lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag) { struct lpfc_cgn_info *cp; u32 value; /* Make sure we have a congestion info buffer */ if (!phba->cgn_i) return; cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; /* Update congestion statistics */ switch (dtag) { case ELS_DTAG_LNK_INTEGRITY: le32_add_cpu(&cp->link_integ_notification, 1); lpfc_cgn_update_tstamp(phba, &cp->stat_lnk); break; case ELS_DTAG_DELIVERY: le32_add_cpu(&cp->delivery_notification, 1); lpfc_cgn_update_tstamp(phba, &cp->stat_delivery); break; case ELS_DTAG_PEER_CONGEST: le32_add_cpu(&cp->cgn_peer_notification, 1); lpfc_cgn_update_tstamp(phba, &cp->stat_peer); break; case ELS_DTAG_CONGESTION: le32_add_cpu(&cp->cgn_notification, 1); lpfc_cgn_update_tstamp(phba, &cp->stat_fpin); } if (phba->cgn_fpin_frequency && phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; cp->cgn_stat_npm = value; } value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); cp->cgn_info_crc = cpu_to_le32(value); } /** * lpfc_cgn_update_tstamp - Update cmf timestamp * @phba: pointer to lpfc hba data structure. * @ts: structure to write the timestamp to. */ void lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts) { struct timespec64 cur_time; struct tm tm_val; ktime_get_real_ts64(&cur_time); time64_to_tm(cur_time.tv_sec, 0, &tm_val); ts->month = tm_val.tm_mon + 1; ts->day = tm_val.tm_mday; ts->year = tm_val.tm_year - 100; ts->hour = tm_val.tm_hour; ts->minute = tm_val.tm_min; ts->second = tm_val.tm_sec; lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "2646 Updated CMF timestamp : " "%u/%u/%u %u:%u:%u\n", ts->day, ts->month, ts->year, ts->hour, ts->minute, ts->second); } /** * lpfc_cmf_stats_timer - Save data into registered congestion buffer * @timer: Timer cookie to access lpfc private data * * Save the congestion event data every minute. * On the hour collapse all the minute data into hour data. Every day * collapse all the hour data into daily data. Separate driver * and fabrc congestion event counters that will be saved out * to the registered congestion buffer every minute. */ static enum hrtimer_restart lpfc_cmf_stats_timer(struct hrtimer *timer) { struct lpfc_hba *phba; struct lpfc_cgn_info *cp; uint32_t i, index; uint16_t value, mvalue; uint64_t bps; uint32_t mbps; uint32_t dvalue, wvalue, lvalue, avalue; uint64_t latsum; __le16 *ptr; __le32 *lptr; __le16 *mptr; phba = container_of(timer, struct lpfc_hba, cmf_stats_timer); /* Make sure we have a congestion info buffer */ if (!phba->cgn_i) return HRTIMER_NORESTART; cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; phba->cgn_evt_timestamp = jiffies + msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); phba->cgn_evt_minute++; /* We should get to this point in the routine on 1 minute intervals */ lpfc_cgn_update_tstamp(phba, &cp->base_time); if (phba->cgn_fpin_frequency && phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; cp->cgn_stat_npm = value; } /* Read and clear the latency counters for this minute */ lvalue = atomic_read(&phba->cgn_latency_evt_cnt); latsum = atomic64_read(&phba->cgn_latency_evt); atomic_set(&phba->cgn_latency_evt_cnt, 0); atomic64_set(&phba->cgn_latency_evt, 0); /* We need to store MB/sec bandwidth in the congestion information. * block_cnt is count of 512 byte blocks for the entire minute, * bps will get bytes per sec before finally converting to MB/sec. */ bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512; phba->rx_block_cnt = 0; mvalue = bps / (1024 * 1024); /* convert to MB/sec */ /* Every minute */ /* cgn parameters */ cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; /* Fill in default LUN qdepth */ value = (uint16_t)(phba->pport->cfg_lun_queue_depth); cp->cgn_lunq = cpu_to_le16(value); /* Record congestion buffer info - every minute * cgn_driver_evt_cnt (Driver events) * cgn_fabric_warn_cnt (Congestion Warnings) * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency) * cgn_fabric_alarm_cnt (Congestion Alarms) */ index = ++cp->cgn_index_minute; if (cp->cgn_index_minute == LPFC_MIN_HOUR) { cp->cgn_index_minute = 0; index = 0; } /* Get the number of driver events in this sample and reset counter */ dvalue = atomic_read(&phba->cgn_driver_evt_cnt); atomic_set(&phba->cgn_driver_evt_cnt, 0); /* Get the number of warning events - FPIN and Signal for this minute */ wvalue = 0; if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) || phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) wvalue = atomic_read(&phba->cgn_fabric_warn_cnt); atomic_set(&phba->cgn_fabric_warn_cnt, 0); /* Get the number of alarm events - FPIN and Signal for this minute */ avalue = 0; if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) || phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) avalue = atomic_read(&phba->cgn_fabric_alarm_cnt); atomic_set(&phba->cgn_fabric_alarm_cnt, 0); /* Collect the driver, warning, alarm and latency counts for this * minute into the driver congestion buffer. */ ptr = &cp->cgn_drvr_min[index]; value = (uint16_t)dvalue; *ptr = cpu_to_le16(value); ptr = &cp->cgn_warn_min[index]; value = (uint16_t)wvalue; *ptr = cpu_to_le16(value); ptr = &cp->cgn_alarm_min[index]; value = (uint16_t)avalue; *ptr = cpu_to_le16(value); lptr = &cp->cgn_latency_min[index]; if (lvalue) { lvalue = (uint32_t)div_u64(latsum, lvalue); *lptr = cpu_to_le32(lvalue); } else { *lptr = 0; } /* Collect the bandwidth value into the driver's congesion buffer. */ mptr = &cp->cgn_bw_min[index]; *mptr = cpu_to_le16(mvalue); lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "2418 Congestion Info - minute (%d): %d %d %d %d %d\n", index, dvalue, wvalue, *lptr, mvalue, avalue); /* Every hour */ if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) { /* Record congestion buffer info - every hour * Collapse all minutes into an hour */ index = ++cp->cgn_index_hour; if (cp->cgn_index_hour == LPFC_HOUR_DAY) { cp->cgn_index_hour = 0; index = 0; } dvalue = 0; wvalue = 0; lvalue = 0; avalue = 0; mvalue = 0; mbps = 0; for (i = 0; i < LPFC_MIN_HOUR; i++) { dvalue += le16_to_cpu(cp->cgn_drvr_min[i]); wvalue += le16_to_cpu(cp->cgn_warn_min[i]); lvalue += le32_to_cpu(cp->cgn_latency_min[i]); mbps += le16_to_cpu(cp->cgn_bw_min[i]); avalue += le16_to_cpu(cp->cgn_alarm_min[i]); } if (lvalue) /* Avg of latency averages */ lvalue /= LPFC_MIN_HOUR; if (mbps) /* Avg of Bandwidth averages */ mvalue = mbps / LPFC_MIN_HOUR; lptr = &cp->cgn_drvr_hr[index]; *lptr = cpu_to_le32(dvalue); lptr = &cp->cgn_warn_hr[index]; *lptr = cpu_to_le32(wvalue); lptr = &cp->cgn_latency_hr[index]; *lptr = cpu_to_le32(lvalue); mptr = &cp->cgn_bw_hr[index]; *mptr = cpu_to_le16(mvalue); lptr = &cp->cgn_alarm_hr[index]; *lptr = cpu_to_le32(avalue); lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "2419 Congestion Info - hour " "(%d): %d %d %d %d %d\n", index, dvalue, wvalue, lvalue, mvalue, avalue); } /* Every day */ if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) { /* Record congestion buffer info - every hour * Collapse all hours into a day. Rotate days * after LPFC_MAX_CGN_DAYS. */ index = ++cp->cgn_index_day; if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) { cp->cgn_index_day = 0; index = 0; } dvalue = 0; wvalue = 0; lvalue = 0; mvalue = 0; mbps = 0; avalue = 0; for (i = 0; i < LPFC_HOUR_DAY; i++) { dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]); wvalue += le32_to_cpu(cp->cgn_warn_hr[i]); lvalue += le32_to_cpu(cp->cgn_latency_hr[i]); mbps += le16_to_cpu(cp->cgn_bw_hr[i]); avalue += le32_to_cpu(cp->cgn_alarm_hr[i]); } if (lvalue) /* Avg of latency averages */ lvalue /= LPFC_HOUR_DAY; if (mbps) /* Avg of Bandwidth averages */ mvalue = mbps / LPFC_HOUR_DAY; lptr = &cp->cgn_drvr_day[index]; *lptr = cpu_to_le32(dvalue); lptr = &cp->cgn_warn_day[index]; *lptr = cpu_to_le32(wvalue); lptr = &cp->cgn_latency_day[index]; *lptr = cpu_to_le32(lvalue); mptr = &cp->cgn_bw_day[index]; *mptr = cpu_to_le16(mvalue); lptr = &cp->cgn_alarm_day[index]; *lptr = cpu_to_le32(avalue); lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "2420 Congestion Info - daily (%d): " "%d %d %d %d %d\n", index, dvalue, wvalue, lvalue, mvalue, avalue); } /* Use the frequency found in the last rcv'ed FPIN */ value = phba->cgn_fpin_frequency; cp->cgn_warn_freq = cpu_to_le16(value); cp->cgn_alarm_freq = cpu_to_le16(value); lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); cp->cgn_info_crc = cpu_to_le32(lvalue); hrtimer_forward_now(timer, ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC)); return HRTIMER_RESTART; } /** * lpfc_calc_cmf_latency - latency from start of rxate timer interval * @phba: The Hba for which this call is being executed. * * The routine calculates the latency from the beginning of the CMF timer * interval to the current point in time. It is called from IO completion * when we exceed our Bandwidth limitation for the time interval. */ uint32_t lpfc_calc_cmf_latency(struct lpfc_hba *phba) { struct timespec64 cmpl_time; uint32_t msec = 0; ktime_get_real_ts64(&cmpl_time); /* This routine works on a ms granularity so sec and usec are * converted accordingly. */ if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) { msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC; } else { if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) { msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec) * MSEC_PER_SEC; msec += ((cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC); } else { msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec - 1) * MSEC_PER_SEC; msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) + cmpl_time.tv_nsec) / NSEC_PER_MSEC); } } return msec; } /** * lpfc_cmf_timer - This is the timer function for one congestion * rate interval. * @timer: Pointer to the high resolution timer that expired */ static enum hrtimer_restart lpfc_cmf_timer(struct hrtimer *timer) { struct lpfc_hba *phba = container_of(timer, struct lpfc_hba, cmf_timer); struct rx_info_entry entry; uint32_t io_cnt; uint32_t busy, max_read; uint64_t total, rcv, lat, mbpi, extra, cnt; int timer_interval = LPFC_CMF_INTERVAL; uint32_t ms; struct lpfc_cgn_stat *cgs; int cpu; /* Only restart the timer if congestion mgmt is on */ if (phba->cmf_active_mode == LPFC_CFG_OFF || !phba->cmf_latency.tv_sec) { lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "6224 CMF timer exit: %d %lld\n", phba->cmf_active_mode, (uint64_t)phba->cmf_latency.tv_sec); return HRTIMER_NORESTART; } /* If pport is not ready yet, just exit and wait for * the next timer cycle to hit. */ if (!phba->pport) goto skip; /* Do not block SCSI IO while in the timer routine since * total_bytes will be cleared */ atomic_set(&phba->cmf_stop_io, 1); /* First we need to calculate the actual ms between * the last timer interrupt and this one. We ask for * LPFC_CMF_INTERVAL, however the actual time may * vary depending on system overhead. */ ms = lpfc_calc_cmf_latency(phba); /* Immediately after we calculate the time since the last * timer interrupt, set the start time for the next * interrupt */ ktime_get_real_ts64(&phba->cmf_latency); phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000); /* Collect all the stats from the prior timer interval */ total = 0; io_cnt = 0; lat = 0; rcv = 0; for_each_present_cpu(cpu) { cgs = per_cpu_ptr(phba->cmf_stat, cpu); total += atomic64_xchg(&cgs->total_bytes, 0); io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0); lat += atomic64_xchg(&cgs->rx_latency, 0); rcv += atomic64_xchg(&cgs->rcv_bytes, 0); } /* Before we issue another CMF_SYNC_WQE, retrieve the BW * returned from the last CMF_SYNC_WQE issued, from * cmf_last_sync_bw. This will be the target BW for * this next timer interval. */ if (phba->cmf_active_mode == LPFC_CFG_MANAGED && phba->link_state != LPFC_LINK_DOWN && phba->hba_flag & HBA_SETUP) { mbpi = phba->cmf_last_sync_bw; phba->cmf_last_sync_bw = 0; extra = 0; /* Calculate any extra bytes needed to account for the * timer accuracy. If we are less than LPFC_CMF_INTERVAL * calculate the adjustment needed for total to reflect * a full LPFC_CMF_INTERVAL. */ if (ms && ms < LPFC_CMF_INTERVAL) { cnt = div_u64(total, ms); /* bytes per ms */ cnt *= LPFC_CMF_INTERVAL; /* what total should be */ extra = cnt - total; } lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra); } else { /* For Monitor mode or link down we want mbpi * to be the full link speed */ mbpi = phba->cmf_link_byte_count; extra = 0; } phba->cmf_timer_cnt++; if (io_cnt) { /* Update congestion info buffer latency in us */ atomic_add(io_cnt, &phba->cgn_latency_evt_cnt); atomic64_add(lat, &phba->cgn_latency_evt); } busy = atomic_xchg(&phba->cmf_busy, 0); max_read = atomic_xchg(&phba->rx_max_read_cnt, 0); /* Calculate MBPI for the next timer interval */ if (mbpi) { if (mbpi > phba->cmf_link_byte_count || phba->cmf_active_mode == LPFC_CFG_MONITOR) mbpi = phba->cmf_link_byte_count; /* Change max_bytes_per_interval to what the prior * CMF_SYNC_WQE cmpl indicated. */ if (mbpi != phba->cmf_max_bytes_per_interval) phba->cmf_max_bytes_per_interval = mbpi; } /* Save rxmonitor information for debug */ if (phba->rx_monitor) { entry.total_bytes = total; entry.cmf_bytes = total + extra; entry.rcv_bytes = rcv; entry.cmf_busy = busy; entry.cmf_info = phba->cmf_active_info; if (io_cnt) { entry.avg_io_latency = div_u64(lat, io_cnt); entry.avg_io_size = div_u64(rcv, io_cnt); } else { entry.avg_io_latency = 0; entry.avg_io_size = 0; } entry.max_read_cnt = max_read; entry.io_cnt = io_cnt; entry.max_bytes_per_interval = mbpi; if (phba->cmf_active_mode == LPFC_CFG_MANAGED) entry.timer_utilization = phba->cmf_last_ts; else entry.timer_utilization = ms; entry.timer_interval = ms; phba->cmf_last_ts = 0; lpfc_rx_monitor_record(phba->rx_monitor, &entry); } if (phba->cmf_active_mode == LPFC_CFG_MONITOR) { /* If Monitor mode, check if we are oversubscribed * against the full line rate. */ if (mbpi && total > mbpi) atomic_inc(&phba->cgn_driver_evt_cnt); } phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */ /* Since total_bytes has already been zero'ed, its okay to unblock * after max_bytes_per_interval is setup. */ if (atomic_xchg(&phba->cmf_bw_wait, 0)) queue_work(phba->wq, &phba->unblock_request_work); /* SCSI IO is now unblocked */ atomic_set(&phba->cmf_stop_io, 0); skip: hrtimer_forward_now(timer, ktime_set(0, timer_interval * NSEC_PER_MSEC)); return HRTIMER_RESTART; } #define trunk_link_status(__idx)\ bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\ "Link up" : "Link down") : "NA" /* Did port __idx reported an error */ #define trunk_port_fault(__idx)\ bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ (port_fault & (1 << __idx) ? "YES" : "NO") : "NA" static void lpfc_update_trunk_link_status(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) { uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc); uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc); u8 cnt = 0; phba->sli4_hba.link_state.speed = lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); phba->sli4_hba.link_state.logical_speed = bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */ phba->fc_linkspeed = lpfc_async_link_speed_to_read_top( phba, bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) { phba->trunk_link.link0.state = bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc) ? LPFC_LINK_UP : LPFC_LINK_DOWN; phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0; cnt++; } if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) { phba->trunk_link.link1.state = bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc) ? LPFC_LINK_UP : LPFC_LINK_DOWN; phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0; cnt++; } if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) { phba->trunk_link.link2.state = bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc) ? LPFC_LINK_UP : LPFC_LINK_DOWN; phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0; cnt++; } if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) { phba->trunk_link.link3.state = bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc) ? LPFC_LINK_UP : LPFC_LINK_DOWN; phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0; cnt++; } if (cnt) phba->trunk_link.phy_lnk_speed = phba->sli4_hba.link_state.logical_speed / (cnt * 1000); else phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2910 Async FC Trunking Event - Speed:%d\n" "\tLogical speed:%d " "port0: %s port1: %s port2: %s port3: %s\n", phba->sli4_hba.link_state.speed, phba->sli4_hba.link_state.logical_speed, trunk_link_status(0), trunk_link_status(1), trunk_link_status(2), trunk_link_status(3)); if (phba->cmf_active_mode != LPFC_CFG_OFF) lpfc_cmf_signal_init(phba); if (port_fault) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3202 trunk error:0x%x (%s) seen on port0:%s " /* * SLI-4: We have only 0xA error codes * defined as of now. print an appropriate * message in case driver needs to be updated. */ "port1:%s port2:%s port3:%s\n", err, err > 0xA ? "UNDEFINED. update driver." : trunk_errmsg[err], trunk_port_fault(0), trunk_port_fault(1), trunk_port_fault(2), trunk_port_fault(3)); } /** * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event * @phba: pointer to lpfc hba data structure. * @acqe_fc: pointer to the async fc completion queue entry. * * This routine is to handle the SLI4 asynchronous FC event. It will simply log * that the event was received and then issue a read_topology mailbox command so * that the rest of the driver will treat it the same as SLI3. **/ static void lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) { LPFC_MBOXQ_t *pmb; MAILBOX_t *mb; struct lpfc_mbx_read_top *la; char *log_level; int rc; if (bf_get(lpfc_trailer_type, acqe_fc) != LPFC_FC_LA_EVENT_TYPE_FC_LINK) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2895 Non FC link Event detected.(%d)\n", bf_get(lpfc_trailer_type, acqe_fc)); return; } if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == LPFC_FC_LA_TYPE_TRUNKING_EVENT) { lpfc_update_trunk_link_status(phba, acqe_fc); return; } /* Keep the link status for extra SLI4 state machine reference */ phba->sli4_hba.link_state.speed = lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL; phba->sli4_hba.link_state.topology = bf_get(lpfc_acqe_fc_la_topology, acqe_fc); phba->sli4_hba.link_state.status = bf_get(lpfc_acqe_fc_la_att_type, acqe_fc); phba->sli4_hba.link_state.type = bf_get(lpfc_acqe_fc_la_port_type, acqe_fc); phba->sli4_hba.link_state.number = bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); phba->sli4_hba.link_state.fault = bf_get(lpfc_acqe_link_fault, acqe_fc); phba->sli4_hba.link_state.link_status = bf_get(lpfc_acqe_fc_la_link_status, acqe_fc); /* * Only select attention types need logical speed modification to what * was previously set. */ if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP && phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == LPFC_FC_LA_TYPE_LINK_DOWN) phba->sli4_hba.link_state.logical_speed = 0; else if (!phba->sli4_hba.conf_trunk) phba->sli4_hba.link_state.logical_speed = bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; } lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "2896 Async FC event - Speed:%dGBaud Topology:x%x " "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" "%dMbps Fault:x%x Link Status:x%x\n", phba->sli4_hba.link_state.speed, phba->sli4_hba.link_state.topology, phba->sli4_hba.link_state.status, phba->sli4_hba.link_state.type, phba->sli4_hba.link_state.number, phba->sli4_hba.link_state.logical_speed, phba->sli4_hba.link_state.fault, phba->sli4_hba.link_state.link_status); /* * The following attention types are informational only, providing * further details about link status. Overwrite the value of * link_state.status appropriately. No further action is required. */ if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { switch (phba->sli4_hba.link_state.status) { case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: log_level = KERN_WARNING; phba->sli4_hba.link_state.status = LPFC_FC_LA_TYPE_LINK_DOWN; break; case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: /* * During bb credit recovery establishment, receiving * this attention type is normal. Link Up attention * type is expected to occur before this informational * attention type so keep the Link Up status. */ log_level = KERN_INFO; phba->sli4_hba.link_state.status = LPFC_FC_LA_TYPE_LINK_UP; break; default: log_level = KERN_INFO; break; } lpfc_log_msg(phba, log_level, LOG_SLI, "2992 Async FC event - Informational Link " "Attention Type x%x\n", bf_get(lpfc_acqe_fc_la_att_type, acqe_fc)); return; } pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2897 The mboxq allocation failed\n"); return; } rc = lpfc_mbox_rsrc_prep(phba, pmb); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2898 The mboxq prep failed\n"); goto out_free_pmb; } /* Cleanup any outstanding ELS commands */ lpfc_els_flush_all_cmd(phba); /* Block ELS IOCBs until we have done process link event */ phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; /* Update link event statistics */ phba->sli.slistat.link_event++; /* Create lpfc_handle_latt mailbox command from link ACQE */ lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; pmb->vport = phba->pport; if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) { phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK); switch (phba->sli4_hba.link_state.status) { case LPFC_FC_LA_TYPE_MDS_LINK_DOWN: phba->link_flag |= LS_MDS_LINK_DOWN; break; case LPFC_FC_LA_TYPE_MDS_LOOPBACK: phba->link_flag |= LS_MDS_LOOPBACK; break; default: break; } /* Initialize completion status */ mb = &pmb->u.mb; mb->mbxStatus = MBX_SUCCESS; /* Parse port fault information field */ lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc); /* Parse and translate link attention fields */ la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop; la->eventTag = acqe_fc->event_tag; if (phba->sli4_hba.link_state.status == LPFC_FC_LA_TYPE_UNEXP_WWPN) { bf_set(lpfc_mbx_read_top_att_type, la, LPFC_FC_LA_TYPE_UNEXP_WWPN); } else { bf_set(lpfc_mbx_read_top_att_type, la, LPFC_FC_LA_TYPE_LINK_DOWN); } /* Invoke the mailbox command callback function */ lpfc_mbx_cmpl_read_topology(phba, pmb); return; } rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); if (rc == MBX_NOT_FINISHED) goto out_free_pmb; return; out_free_pmb: lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); } /** * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event * @phba: pointer to lpfc hba data structure. * @acqe_sli: pointer to the async SLI completion queue entry. * * This routine is to handle the SLI4 asynchronous SLI events. **/ static void lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli) { char port_name; char message[128]; uint8_t status; uint8_t evt_type; uint8_t operational = 0; struct temp_event temp_event_data; struct lpfc_acqe_misconfigured_event *misconfigured; struct lpfc_acqe_cgn_signal *cgn_signal; struct Scsi_Host *shost; struct lpfc_vport **vports; int rc, i, cnt; evt_type = bf_get(lpfc_trailer_type, acqe_sli); lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "2901 Async SLI event - Type:%d, Event Data: x%08x " "x%08x x%08x x%08x\n", evt_type, acqe_sli->event_data1, acqe_sli->event_data2, acqe_sli->event_data3, acqe_sli->trailer); port_name = phba->Port[0]; if (port_name == 0x00) port_name = '?'; /* get port name is empty */ switch (evt_type) { case LPFC_SLI_EVENT_TYPE_OVER_TEMP: temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; temp_event_data.event_code = LPFC_THRESHOLD_TEMP; temp_event_data.data = (uint32_t)acqe_sli->event_data1; lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, "3190 Over Temperature:%d Celsius- Port Name %c\n", acqe_sli->event_data1, port_name); phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; shost = lpfc_shost_from_vport(phba->pport); fc_host_post_vendor_event(shost, fc_get_event_number(), sizeof(temp_event_data), (char *)&temp_event_data, SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); break; case LPFC_SLI_EVENT_TYPE_NORM_TEMP: temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; temp_event_data.event_code = LPFC_NORMAL_TEMP; temp_event_data.data = (uint32_t)acqe_sli->event_data1; lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT, "3191 Normal Temperature:%d Celsius - Port Name %c\n", acqe_sli->event_data1, port_name); shost = lpfc_shost_from_vport(phba->pport); fc_host_post_vendor_event(shost, fc_get_event_number(), sizeof(temp_event_data), (char *)&temp_event_data, SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); break; case LPFC_SLI_EVENT_TYPE_MISCONFIGURED: misconfigured = (struct lpfc_acqe_misconfigured_event *) &acqe_sli->event_data1; /* fetch the status for this port */ switch (phba->sli4_hba.lnk_info.lnk_no) { case LPFC_LINK_NUMBER_0: status = bf_get(lpfc_sli_misconfigured_port0_state, &misconfigured->theEvent); operational = bf_get(lpfc_sli_misconfigured_port0_op, &misconfigured->theEvent); break; case LPFC_LINK_NUMBER_1: status = bf_get(lpfc_sli_misconfigured_port1_state, &misconfigured->theEvent); operational = bf_get(lpfc_sli_misconfigured_port1_op, &misconfigured->theEvent); break; case LPFC_LINK_NUMBER_2: status = bf_get(lpfc_sli_misconfigured_port2_state, &misconfigured->theEvent); operational = bf_get(lpfc_sli_misconfigured_port2_op, &misconfigured->theEvent); break; case LPFC_LINK_NUMBER_3: status = bf_get(lpfc_sli_misconfigured_port3_state, &misconfigured->theEvent); operational = bf_get(lpfc_sli_misconfigured_port3_op, &misconfigured->theEvent); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3296 " "LPFC_SLI_EVENT_TYPE_MISCONFIGURED " "event: Invalid link %d", phba->sli4_hba.lnk_info.lnk_no); return; } /* Skip if optic state unchanged */ if (phba->sli4_hba.lnk_info.optic_state == status) return; switch (status) { case LPFC_SLI_EVENT_STATUS_VALID: sprintf(message, "Physical Link is functional"); break; case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: sprintf(message, "Optics faulted/incorrectly " "installed/not installed - Reseat optics, " "if issue not resolved, replace."); break; case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: sprintf(message, "Optics of two types installed - Remove one " "optic or install matching pair of optics."); break; case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: sprintf(message, "Incompatible optics - Replace with " "compatible optics for card to function."); break; case LPFC_SLI_EVENT_STATUS_UNQUALIFIED: sprintf(message, "Unqualified optics - Replace with " "Avago optics for Warranty and Technical " "Support - Link is%s operational", (operational) ? " not" : ""); break; case LPFC_SLI_EVENT_STATUS_UNCERTIFIED: sprintf(message, "Uncertified optics - Replace with " "Avago-certified optics to enable link " "operation - Link is%s operational", (operational) ? " not" : ""); break; default: /* firmware is reporting a status we don't know about */ sprintf(message, "Unknown event status x%02x", status); break; } /* Issue READ_CONFIG mbox command to refresh supported speeds */ rc = lpfc_sli4_read_config(phba); if (rc) { phba->lmt = 0; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3194 Unable to retrieve supported " "speeds, rc = 0x%x\n", rc); } rc = lpfc_sli4_refresh_params(phba); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_SLI, "3174 Unable to update pls support, " "rc x%x\n", rc); } vports = lpfc_create_vport_work_array(phba); if (vports != NULL) { for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { shost = lpfc_shost_from_vport(vports[i]); lpfc_host_supported_speeds_set(shost); } } lpfc_destroy_vport_work_array(phba, vports); phba->sli4_hba.lnk_info.optic_state = status; lpfc_printf_log(phba, KERN_ERR, LOG_SLI, "3176 Port Name %c %s\n", port_name, message); break; case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT: lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "3192 Remote DPort Test Initiated - " "Event Data1:x%08x Event Data2: x%08x\n", acqe_sli->event_data1, acqe_sli->event_data2); break; case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG: /* Call FW to obtain active parms */ lpfc_sli4_cgn_parm_chg_evt(phba); break; case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN: /* Misconfigured WWN. Reports that the SLI Port is configured * to use FA-WWN, but the attached device doesn’t support it. * Event Data1 - N.A, Event Data2 - N.A * This event only happens on the physical port. */ lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY, "2699 Misconfigured FA-PWWN - Attached device " "does not support FA-PWWN\n"); phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC; memset(phba->pport->fc_portname.u.wwn, 0, sizeof(struct lpfc_name)); break; case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE: /* EEPROM failure. No driver action is required */ lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, "2518 EEPROM failure - " "Event Data1: x%08x Event Data2: x%08x\n", acqe_sli->event_data1, acqe_sli->event_data2); break; case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL: if (phba->cmf_active_mode == LPFC_CFG_OFF) break; cgn_signal = (struct lpfc_acqe_cgn_signal *) &acqe_sli->event_data1; phba->cgn_acqe_cnt++; cnt = bf_get(lpfc_warn_acqe, cgn_signal); atomic64_add(cnt, &phba->cgn_acqe_stat.warn); atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm); /* no threshold for CMF, even 1 signal will trigger an event */ /* Alarm overrides warning, so check that first */ if (cgn_signal->alarm_cnt) { if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { /* Keep track of alarm cnt for CMF_SYNC_WQE */ atomic_add(cgn_signal->alarm_cnt, &phba->cgn_sync_alarm_cnt); } } else if (cnt) { /* signal action needs to be taken */ if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { /* Keep track of warning cnt for CMF_SYNC_WQE */ atomic_add(cnt, &phba->cgn_sync_warn_cnt); } } break; case LPFC_SLI_EVENT_TYPE_RD_SIGNAL: /* May be accompanied by a temperature event */ lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT, "2902 Remote Degrade Signaling: x%08x x%08x " "x%08x\n", acqe_sli->event_data1, acqe_sli->event_data2, acqe_sli->event_data3); break; default: lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "3193 Unrecognized SLI event, type: 0x%x", evt_type); break; } } /** * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport * @vport: pointer to vport data structure. * * This routine is to perform Clear Virtual Link (CVL) on a vport in * response to a CVL event. * * Return the pointer to the ndlp with the vport if successful, otherwise * return NULL. **/ static struct lpfc_nodelist * lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport) { struct lpfc_nodelist *ndlp; struct Scsi_Host *shost; struct lpfc_hba *phba; if (!vport) return NULL; phba = vport->phba; if (!phba) return NULL; ndlp = lpfc_findnode_did(vport, Fabric_DID); if (!ndlp) { /* Cannot find existing Fabric ndlp, so allocate a new one */ ndlp = lpfc_nlp_init(vport, Fabric_DID); if (!ndlp) return NULL; /* Set the node type */ ndlp->nlp_type |= NLP_FABRIC; /* Put ndlp onto node list */ lpfc_enqueue_node(vport, ndlp); } if ((phba->pport->port_state < LPFC_FLOGI) && (phba->pport->port_state != LPFC_VPORT_FAILED)) return NULL; /* If virtual link is not yet instantiated ignore CVL */ if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC) && (vport->port_state != LPFC_VPORT_FAILED)) return NULL; shost = lpfc_shost_from_vport(vport); if (!shost) return NULL; lpfc_linkdown_port(vport); lpfc_cleanup_pending_mbox(vport); spin_lock_irq(shost->host_lock); vport->fc_flag |= FC_VPORT_CVL_RCVD; spin_unlock_irq(shost->host_lock); return ndlp; } /** * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports * @phba: pointer to lpfc hba data structure. * * This routine is to perform Clear Virtual Link (CVL) on all vports in * response to a FCF dead event. **/ static void lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba) { struct lpfc_vport **vports; int i; vports = lpfc_create_vport_work_array(phba); if (vports) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) lpfc_sli4_perform_vport_cvl(vports[i]); lpfc_destroy_vport_work_array(phba, vports); } /** * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event * @phba: pointer to lpfc hba data structure. * @acqe_fip: pointer to the async fcoe completion queue entry. * * This routine is to handle the SLI4 asynchronous fcoe event. **/ static void lpfc_sli4_async_fip_evt(struct lpfc_hba *phba, struct lpfc_acqe_fip *acqe_fip) { uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip); int rc; struct lpfc_vport *vport; struct lpfc_nodelist *ndlp; int active_vlink_present; struct lpfc_vport **vports; int i; phba->fc_eventTag = acqe_fip->event_tag; phba->fcoe_eventtag = acqe_fip->event_tag; switch (event_type) { case LPFC_FIP_EVENT_TYPE_NEW_FCF: case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD: if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2546 New FCF event, evt_tag:x%x, " "index:x%x\n", acqe_fip->event_tag, acqe_fip->index); else lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | LOG_DISCOVERY, "2788 FCF param modified event, " "evt_tag:x%x, index:x%x\n", acqe_fip->event_tag, acqe_fip->index); if (phba->fcf.fcf_flag & FCF_DISCOVERY) { /* * During period of FCF discovery, read the FCF * table record indexed by the event to update * FCF roundrobin failover eligible FCF bmask. */ lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, "2779 Read FCF (x%x) for updating " "roundrobin FCF failover bmask\n", acqe_fip->index); rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index); } /* If the FCF discovery is in progress, do nothing. */ spin_lock_irq(&phba->hbalock); if (phba->hba_flag & FCF_TS_INPROG) { spin_unlock_irq(&phba->hbalock); break; } /* If fast FCF failover rescan event is pending, do nothing */ if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) { spin_unlock_irq(&phba->hbalock); break; } /* If the FCF has been in discovered state, do nothing. */ if (phba->fcf.fcf_flag & FCF_SCAN_DONE) { spin_unlock_irq(&phba->hbalock); break; } spin_unlock_irq(&phba->hbalock); /* Otherwise, scan the entire FCF table and re-discover SAN */ lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, "2770 Start FCF table scan per async FCF " "event, evt_tag:x%x, index:x%x\n", acqe_fip->event_tag, acqe_fip->index); rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); if (rc) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2547 Issue FCF scan read FCF mailbox " "command failed (x%x)\n", rc); break; case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2548 FCF Table full count 0x%x tag 0x%x\n", bf_get(lpfc_acqe_fip_fcf_count, acqe_fip), acqe_fip->event_tag); break; case LPFC_FIP_EVENT_TYPE_FCF_DEAD: phba->fcoe_cvl_eventtag = acqe_fip->event_tag; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2549 FCF (x%x) disconnected from network, " "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag); /* * If we are in the middle of FCF failover process, clear * the corresponding FCF bit in the roundrobin bitmap. */ spin_lock_irq(&phba->hbalock); if ((phba->fcf.fcf_flag & FCF_DISCOVERY) && (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) { spin_unlock_irq(&phba->hbalock); /* Update FLOGI FCF failover eligible FCF bmask */ lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index); break; } spin_unlock_irq(&phba->hbalock); /* If the event is not for currently used fcf do nothing */ if (phba->fcf.current_rec.fcf_indx != acqe_fip->index) break; /* * Otherwise, request the port to rediscover the entire FCF * table for a fast recovery from case that the current FCF * is no longer valid as we are not in the middle of FCF * failover process already. */ spin_lock_irq(&phba->hbalock); /* Mark the fast failover process in progress */ phba->fcf.fcf_flag |= FCF_DEAD_DISC; spin_unlock_irq(&phba->hbalock); lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, "2771 Start FCF fast failover process due to " "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " "\n", acqe_fip->event_tag, acqe_fip->index); rc = lpfc_sli4_redisc_fcf_table(phba); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_TRACE_EVENT, "2772 Issue FCF rediscover mailbox " "command failed, fail through to FCF " "dead event\n"); spin_lock_irq(&phba->hbalock); phba->fcf.fcf_flag &= ~FCF_DEAD_DISC; spin_unlock_irq(&phba->hbalock); /* * Last resort will fail over by treating this * as a link down to FCF registration. */ lpfc_sli4_fcf_dead_failthrough(phba); } else { /* Reset FCF roundrobin bmask for new discovery */ lpfc_sli4_clear_fcf_rr_bmask(phba); /* * Handling fast FCF failover to a DEAD FCF event is * considered equalivant to receiving CVL to all vports. */ lpfc_sli4_perform_all_vport_cvl(phba); } break; case LPFC_FIP_EVENT_TYPE_CVL: phba->fcoe_cvl_eventtag = acqe_fip->event_tag; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2718 Clear Virtual Link Received for VPI 0x%x" " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag); vport = lpfc_find_vport_by_vpid(phba, acqe_fip->index); ndlp = lpfc_sli4_perform_vport_cvl(vport); if (!ndlp) break; active_vlink_present = 0; vports = lpfc_create_vport_work_array(phba); if (vports) { for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { if ((!(vports[i]->fc_flag & FC_VPORT_CVL_RCVD)) && (vports[i]->port_state > LPFC_FDISC)) { active_vlink_present = 1; break; } } lpfc_destroy_vport_work_array(phba, vports); } /* * Don't re-instantiate if vport is marked for deletion. * If we are here first then vport_delete is going to wait * for discovery to complete. */ if (!(vport->load_flag & FC_UNLOADING) && active_vlink_present) { /* * If there are other active VLinks present, * re-instantiate the Vlink using FDISC. */ mod_timer(&ndlp->nlp_delayfunc, jiffies + msecs_to_jiffies(1000)); spin_lock_irq(&ndlp->lock); ndlp->nlp_flag |= NLP_DELAY_TMO; spin_unlock_irq(&ndlp->lock); ndlp->nlp_last_elscmd = ELS_CMD_FDISC; vport->port_state = LPFC_FDISC; } else { /* * Otherwise, we request port to rediscover * the entire FCF table for a fast recovery * from possible case that the current FCF * is no longer valid if we are not already * in the FCF failover process. */ spin_lock_irq(&phba->hbalock); if (phba->fcf.fcf_flag & FCF_DISCOVERY) { spin_unlock_irq(&phba->hbalock); break; } /* Mark the fast failover process in progress */ phba->fcf.fcf_flag |= FCF_ACVL_DISC; spin_unlock_irq(&phba->hbalock); lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, "2773 Start FCF failover per CVL, " "evt_tag:x%x\n", acqe_fip->event_tag); rc = lpfc_sli4_redisc_fcf_table(phba); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_TRACE_EVENT, "2774 Issue FCF rediscover " "mailbox command failed, " "through to CVL event\n"); spin_lock_irq(&phba->hbalock); phba->fcf.fcf_flag &= ~FCF_ACVL_DISC; spin_unlock_irq(&phba->hbalock); /* * Last resort will be re-try on the * the current registered FCF entry. */ lpfc_retry_pport_discovery(phba); } else /* * Reset FCF roundrobin bmask for new * discovery. */ lpfc_sli4_clear_fcf_rr_bmask(phba); } break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0288 Unknown FCoE event type 0x%x event tag " "0x%x\n", event_type, acqe_fip->event_tag); break; } } /** * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event * @phba: pointer to lpfc hba data structure. * @acqe_dcbx: pointer to the async dcbx completion queue entry. * * This routine is to handle the SLI4 asynchronous dcbx event. **/ static void lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba, struct lpfc_acqe_dcbx *acqe_dcbx) { phba->fc_eventTag = acqe_dcbx->event_tag; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0290 The SLI4 DCBX asynchronous event is not " "handled yet\n"); } /** * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event * @phba: pointer to lpfc hba data structure. * @acqe_grp5: pointer to the async grp5 completion queue entry. * * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event * is an asynchronous notified of a logical link speed change. The Port * reports the logical link speed in units of 10Mbps. **/ static void lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba, struct lpfc_acqe_grp5 *acqe_grp5) { uint16_t prev_ll_spd; phba->fc_eventTag = acqe_grp5->event_tag; phba->fcoe_eventtag = acqe_grp5->event_tag; prev_ll_spd = phba->sli4_hba.link_state.logical_speed; phba->sli4_hba.link_state.logical_speed = (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10; lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "2789 GRP5 Async Event: Updating logical link speed " "from %dMbps to %dMbps\n", prev_ll_spd, phba->sli4_hba.link_state.logical_speed); } /** * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event * @phba: pointer to lpfc hba data structure. * * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event * is an asynchronous notification of a request to reset CM stats. **/ static void lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba) { if (!phba->cgn_i) return; lpfc_init_congestion_stat(phba); } /** * lpfc_cgn_params_val - Validate FW congestion parameters. * @phba: pointer to lpfc hba data structure. * @p_cfg_param: pointer to FW provided congestion parameters. * * This routine validates the congestion parameters passed * by the FW to the driver via an ACQE event. **/ static void lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param) { spin_lock_irq(&phba->hbalock); if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF, LPFC_CFG_MONITOR)) { lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT, "6225 CMF mode param out of range: %d\n", p_cfg_param->cgn_param_mode); p_cfg_param->cgn_param_mode = LPFC_CFG_OFF; } spin_unlock_irq(&phba->hbalock); } static const char * const lpfc_cmf_mode_to_str[] = { "OFF", "MANAGED", "MONITOR", }; /** * lpfc_cgn_params_parse - Process a FW cong parm change event * @phba: pointer to lpfc hba data structure. * @p_cgn_param: pointer to a data buffer with the FW cong params. * @len: the size of pdata in bytes. * * This routine validates the congestion management buffer signature * from the FW, validates the contents and makes corrections for * valid, in-range values. If the signature magic is correct and * after parameter validation, the contents are copied to the driver's * @phba structure. If the magic is incorrect, an error message is * logged. **/ static void lpfc_cgn_params_parse(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cgn_param, uint32_t len) { struct lpfc_cgn_info *cp; uint32_t crc, oldmode; char acr_string[4] = {0}; /* Make sure the FW has encoded the correct magic number to * validate the congestion parameter in FW memory. */ if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) { lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, "4668 FW cgn parm buffer data: " "magic 0x%x version %d mode %d " "level0 %d level1 %d " "level2 %d byte13 %d " "byte14 %d byte15 %d " "byte11 %d byte12 %d activeMode %d\n", p_cgn_param->cgn_param_magic, p_cgn_param->cgn_param_version, p_cgn_param->cgn_param_mode, p_cgn_param->cgn_param_level0, p_cgn_param->cgn_param_level1, p_cgn_param->cgn_param_level2, p_cgn_param->byte13, p_cgn_param->byte14, p_cgn_param->byte15, p_cgn_param->byte11, p_cgn_param->byte12, phba->cmf_active_mode); oldmode = phba->cmf_active_mode; /* Any parameters out of range are corrected to defaults * by this routine. No need to fail. */ lpfc_cgn_params_val(phba, p_cgn_param); /* Parameters are verified, move them into driver storage */ spin_lock_irq(&phba->hbalock); memcpy(&phba->cgn_p, p_cgn_param, sizeof(struct lpfc_cgn_param)); /* Update parameters in congestion info buffer now */ if (phba->cgn_i) { cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); cp->cgn_info_crc = cpu_to_le32(crc); } spin_unlock_irq(&phba->hbalock); phba->cmf_active_mode = phba->cgn_p.cgn_param_mode; switch (oldmode) { case LPFC_CFG_OFF: if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) { /* Turning CMF on */ lpfc_cmf_start(phba); if (phba->link_state >= LPFC_LINK_UP) { phba->cgn_reg_fpin = phba->cgn_init_reg_fpin; phba->cgn_reg_signal = phba->cgn_init_reg_signal; lpfc_issue_els_edc(phba->pport, 0); } } break; case LPFC_CFG_MANAGED: switch (phba->cgn_p.cgn_param_mode) { case LPFC_CFG_OFF: /* Turning CMF off */ lpfc_cmf_stop(phba); if (phba->link_state >= LPFC_LINK_UP) lpfc_issue_els_edc(phba->pport, 0); break; case LPFC_CFG_MONITOR: phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count; /* Resume blocked IO - unblock on workqueue */ queue_work(phba->wq, &phba->unblock_request_work); break; } break; case LPFC_CFG_MONITOR: switch (phba->cgn_p.cgn_param_mode) { case LPFC_CFG_OFF: /* Turning CMF off */ lpfc_cmf_stop(phba); if (phba->link_state >= LPFC_LINK_UP) lpfc_issue_els_edc(phba->pport, 0); break; case LPFC_CFG_MANAGED: lpfc_cmf_signal_init(phba); break; } break; } if (oldmode != LPFC_CFG_OFF || oldmode != phba->cgn_p.cgn_param_mode) { if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED) scnprintf(acr_string, sizeof(acr_string), "%u", phba->cgn_p.cgn_param_level0); else scnprintf(acr_string, sizeof(acr_string), "NA"); dev_info(&phba->pcidev->dev, "%d: " "4663 CMF: Mode %s acr %s\n", phba->brd_no, lpfc_cmf_mode_to_str [phba->cgn_p.cgn_param_mode], acr_string); } } else { lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, "4669 FW cgn parm buf wrong magic 0x%x " "version %d\n", p_cgn_param->cgn_param_magic, p_cgn_param->cgn_param_version); } } /** * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters. * @phba: pointer to lpfc hba data structure. * * This routine issues a read_object mailbox command to * get the congestion management parameters from the FW * parses it and updates the driver maintained values. * * Returns * 0 if the object was empty * -Eval if an error was encountered * Count if bytes were read from object **/ int lpfc_sli4_cgn_params_read(struct lpfc_hba *phba) { int ret = 0; struct lpfc_cgn_param *p_cgn_param = NULL; u32 *pdata = NULL; u32 len = 0; /* Find out if the FW has a new set of congestion parameters. */ len = sizeof(struct lpfc_cgn_param); pdata = kzalloc(len, GFP_KERNEL); if (!pdata) return -ENOMEM; ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME, pdata, len); /* 0 means no data. A negative means error. A positive means * bytes were copied. */ if (!ret) { lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, "4670 CGN RD OBJ returns no data\n"); goto rd_obj_err; } else if (ret < 0) { /* Some error. Just exit and return it to the caller.*/ goto rd_obj_err; } lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, "6234 READ CGN PARAMS Successful %d\n", len); /* Parse data pointer over len and update the phba congestion * parameters with values passed back. The receive rate values * may have been altered in FW, but take no action here. */ p_cgn_param = (struct lpfc_cgn_param *)pdata; lpfc_cgn_params_parse(phba, p_cgn_param, len); rd_obj_err: kfree(pdata); return ret; } /** * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event * @phba: pointer to lpfc hba data structure. * * The FW generated Async ACQE SLI event calls this routine when * the event type is an SLI Internal Port Event and the Event Code * indicates a change to the FW maintained congestion parameters. * * This routine executes a Read_Object mailbox call to obtain the * current congestion parameters maintained in FW and corrects * the driver's active congestion parameters. * * The acqe event is not passed because there is no further data * required. * * Returns nonzero error if event processing encountered an error. * Zero otherwise for success. **/ static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba) { int ret = 0; if (!phba->sli4_hba.pc_sli4_params.cmf) { lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, "4664 Cgn Evt when E2E off. Drop event\n"); return -EACCES; } /* If the event is claiming an empty object, it's ok. A write * could have cleared it. Only error is a negative return * status. */ ret = lpfc_sli4_cgn_params_read(phba); if (ret < 0) { lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, "4667 Error reading Cgn Params (%d)\n", ret); } else if (!ret) { lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, "4673 CGN Event empty object.\n"); } return ret; } /** * lpfc_sli4_async_event_proc - Process all the pending asynchronous event * @phba: pointer to lpfc hba data structure. * * This routine is invoked by the worker thread to process all the pending * SLI4 asynchronous events. **/ void lpfc_sli4_async_event_proc(struct lpfc_hba *phba) { struct lpfc_cq_event *cq_event; unsigned long iflags; /* First, declare the async event has been handled */ spin_lock_irqsave(&phba->hbalock, iflags); phba->hba_flag &= ~ASYNC_EVENT; spin_unlock_irqrestore(&phba->hbalock, iflags); /* Now, handle all the async events */ spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) { list_remove_head(&phba->sli4_hba.sp_asynce_work_queue, cq_event, struct lpfc_cq_event, list); spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); /* Process the asynchronous event */ switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) { case LPFC_TRAILER_CODE_LINK: lpfc_sli4_async_link_evt(phba, &cq_event->cqe.acqe_link); break; case LPFC_TRAILER_CODE_FCOE: lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip); break; case LPFC_TRAILER_CODE_DCBX: lpfc_sli4_async_dcbx_evt(phba, &cq_event->cqe.acqe_dcbx); break; case LPFC_TRAILER_CODE_GRP5: lpfc_sli4_async_grp5_evt(phba, &cq_event->cqe.acqe_grp5); break; case LPFC_TRAILER_CODE_FC: lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc); break; case LPFC_TRAILER_CODE_SLI: lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli); break; case LPFC_TRAILER_CODE_CMSTAT: lpfc_sli4_async_cmstat_evt(phba); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1804 Invalid asynchronous event code: " "x%x\n", bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)); break; } /* Free the completion event processed to the free pool */ lpfc_sli4_cq_event_release(phba, cq_event); spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); } spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); } /** * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event * @phba: pointer to lpfc hba data structure. * * This routine is invoked by the worker thread to process FCF table * rediscovery pending completion event. **/ void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba) { int rc; spin_lock_irq(&phba->hbalock); /* Clear FCF rediscovery timeout event */ phba->fcf.fcf_flag &= ~FCF_REDISC_EVT; /* Clear driver fast failover FCF record flag */ phba->fcf.failover_rec.flag = 0; /* Set state for FCF fast failover */ phba->fcf.fcf_flag |= FCF_REDISC_FOV; spin_unlock_irq(&phba->hbalock); /* Scan FCF table from the first entry to re-discover SAN */ lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, "2777 Start post-quiescent FCF table scan\n"); rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); if (rc) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2747 Issue FCF scan read FCF mailbox " "command failed 0x%x\n", rc); } /** * lpfc_api_table_setup - Set up per hba pci-device group func api jump table * @phba: pointer to lpfc hba data structure. * @dev_grp: The HBA PCI-Device group number. * * This routine is invoked to set up the per HBA PCI-Device group function * API jump table entries. * * Return: 0 if success, otherwise -ENODEV **/ int lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) { int rc; /* Set up lpfc PCI-device group */ phba->pci_dev_grp = dev_grp; /* The LPFC_PCI_DEV_OC uses SLI4 */ if (dev_grp == LPFC_PCI_DEV_OC) phba->sli_rev = LPFC_SLI_REV4; /* Set up device INIT API function jump table */ rc = lpfc_init_api_table_setup(phba, dev_grp); if (rc) return -ENODEV; /* Set up SCSI API function jump table */ rc = lpfc_scsi_api_table_setup(phba, dev_grp); if (rc) return -ENODEV; /* Set up SLI API function jump table */ rc = lpfc_sli_api_table_setup(phba, dev_grp); if (rc) return -ENODEV; /* Set up MBOX API function jump table */ rc = lpfc_mbox_api_table_setup(phba, dev_grp); if (rc) return -ENODEV; return 0; } /** * lpfc_log_intr_mode - Log the active interrupt mode * @phba: pointer to lpfc hba data structure. * @intr_mode: active interrupt mode adopted. * * This routine it invoked to log the currently used active interrupt mode * to the device. **/ static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode) { switch (intr_mode) { case 0: lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0470 Enable INTx interrupt mode.\n"); break; case 1: lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0481 Enabled MSI interrupt mode.\n"); break; case 2: lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0480 Enabled MSI-X interrupt mode.\n"); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0482 Illegal interrupt mode.\n"); break; } return; } /** * lpfc_enable_pci_dev - Enable a generic PCI device. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to enable the PCI device that is common to all * PCI devices. * * Return codes * 0 - successful * other values - error **/ static int lpfc_enable_pci_dev(struct lpfc_hba *phba) { struct pci_dev *pdev; /* Obtain PCI device reference */ if (!phba->pcidev) goto out_error; else pdev = phba->pcidev; /* Enable PCI device */ if (pci_enable_device_mem(pdev)) goto out_error; /* Request PCI resource for the device */ if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME)) goto out_disable_device; /* Set up device as PCI master and save state for EEH */ pci_set_master(pdev); pci_try_set_mwi(pdev); pci_save_state(pdev); /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ if (pci_is_pcie(pdev)) pdev->needs_freset = 1; return 0; out_disable_device: pci_disable_device(pdev); out_error: lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1401 Failed to enable pci device\n"); return -ENODEV; } /** * lpfc_disable_pci_dev - Disable a generic PCI device. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to disable the PCI device that is common to all * PCI devices. **/ static void lpfc_disable_pci_dev(struct lpfc_hba *phba) { struct pci_dev *pdev; /* Obtain PCI device reference */ if (!phba->pcidev) return; else pdev = phba->pcidev; /* Release PCI resource and disable PCI device */ pci_release_mem_regions(pdev); pci_disable_device(pdev); return; } /** * lpfc_reset_hba - Reset a hba * @phba: pointer to lpfc hba data structure. * * This routine is invoked to reset a hba device. It brings the HBA * offline, performs a board restart, and then brings the board back * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up * on outstanding mailbox commands. **/ void lpfc_reset_hba(struct lpfc_hba *phba) { int rc = 0; /* If resets are disabled then set error state and return. */ if (!phba->cfg_enable_hba_reset) { phba->link_state = LPFC_HBA_ERROR; return; } /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */ if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) { lpfc_offline_prep(phba, LPFC_MBX_WAIT); } else { if (test_bit(MBX_TMO_ERR, &phba->bit_flags)) { /* Perform a PCI function reset to start from clean */ rc = lpfc_pci_function_reset(phba); lpfc_els_flush_all_cmd(phba); } lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); lpfc_sli_flush_io_rings(phba); } lpfc_offline(phba); clear_bit(MBX_TMO_ERR, &phba->bit_flags); if (unlikely(rc)) { lpfc_printf_log(phba, KERN_ERR, LOG_SLI, "8888 PCI function reset failed rc %x\n", rc); } else { lpfc_sli_brdrestart(phba); lpfc_online(phba); lpfc_unblock_mgmt_io(phba); } } /** * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions * @phba: pointer to lpfc hba data structure. * * This function enables the PCI SR-IOV virtual functions to a physical * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to * enable the number of virtual functions to the physical function. As * not all devices support SR-IOV, the return code from the pci_enable_sriov() * API call does not considered as an error condition for most of the device. **/ uint16_t lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba) { struct pci_dev *pdev = phba->pcidev; uint16_t nr_virtfn; int pos; pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); if (pos == 0) return 0; pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn); return nr_virtfn; } /** * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions * @phba: pointer to lpfc hba data structure. * @nr_vfn: number of virtual functions to be enabled. * * This function enables the PCI SR-IOV virtual functions to a physical * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to * enable the number of virtual functions to the physical function. As * not all devices support SR-IOV, the return code from the pci_enable_sriov() * API call does not considered as an error condition for most of the device. **/ int lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn) { struct pci_dev *pdev = phba->pcidev; uint16_t max_nr_vfn; int rc; max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba); if (nr_vfn > max_nr_vfn) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3057 Requested vfs (%d) greater than " "supported vfs (%d)", nr_vfn, max_nr_vfn); return -EINVAL; } rc = pci_enable_sriov(pdev, nr_vfn); if (rc) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "2806 Failed to enable sriov on this device " "with vfn number nr_vf:%d, rc:%d\n", nr_vfn, rc); } else lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "2807 Successful enable sriov on this device " "with vfn number nr_vf:%d\n", nr_vfn); return rc; } static void lpfc_unblock_requests_work(struct work_struct *work) { struct lpfc_hba *phba = container_of(work, struct lpfc_hba, unblock_request_work); lpfc_unblock_requests(phba); } /** * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to set up the driver internal resources before the * device specific resource setup to support the HBA device it attached to. * * Return codes * 0 - successful * other values - error **/ static int lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) { struct lpfc_sli *psli = &phba->sli; /* * Driver resources common to all SLI revisions */ atomic_set(&phba->fast_event_count, 0); atomic_set(&phba->dbg_log_idx, 0); atomic_set(&phba->dbg_log_cnt, 0); atomic_set(&phba->dbg_log_dmping, 0); spin_lock_init(&phba->hbalock); /* Initialize port_list spinlock */ spin_lock_init(&phba->port_list_lock); INIT_LIST_HEAD(&phba->port_list); INIT_LIST_HEAD(&phba->work_list); /* Initialize the wait queue head for the kernel thread */ init_waitqueue_head(&phba->work_waitq); lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "1403 Protocols supported %s %s %s\n", ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ? "SCSI" : " "), ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ? "NVME" : " "), (phba->nvmet_support ? "NVMET" : " ")); /* Initialize the IO buffer list used by driver for SLI3 SCSI */ spin_lock_init(&phba->scsi_buf_list_get_lock); INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get); spin_lock_init(&phba->scsi_buf_list_put_lock); INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put); /* Initialize the fabric iocb list */ INIT_LIST_HEAD(&phba->fabric_iocb_list); /* Initialize list to save ELS buffers */ INIT_LIST_HEAD(&phba->elsbuf); /* Initialize FCF connection rec list */ INIT_LIST_HEAD(&phba->fcf_conn_rec_list); /* Initialize OAS configuration list */ spin_lock_init(&phba->devicelock); INIT_LIST_HEAD(&phba->luns); /* MBOX heartbeat timer */ timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0); /* Fabric block timer */ timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0); /* EA polling mode timer */ timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0); /* Heartbeat timer */ timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work); INIT_DELAYED_WORK(&phba->idle_stat_delay_work, lpfc_idle_stat_delay_work); INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work); return 0; } /** * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev * @phba: pointer to lpfc hba data structure. * * This routine is invoked to set up the driver internal resources specific to * support the SLI-3 HBA device it attached to. * * Return codes * 0 - successful * other values - error **/ static int lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) { int rc, entry_sz; /* * Initialize timers used by driver */ /* FCP polling mode timer */ timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0); /* Host attention work mask setup */ phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); /* Get all the module params for configuring this host */ lpfc_get_cfgparam(phba); /* Set up phase-1 common device driver resources */ rc = lpfc_setup_driver_resource_phase1(phba); if (rc) return -ENODEV; if (!phba->sli.sli3_ring) phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING, sizeof(struct lpfc_sli_ring), GFP_KERNEL); if (!phba->sli.sli3_ring) return -ENOMEM; /* * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size * used to create the sg_dma_buf_pool must be dynamically calculated. */ if (phba->sli_rev == LPFC_SLI_REV4) entry_sz = sizeof(struct sli4_sge); else entry_sz = sizeof(struct ulp_bde64); /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ if (phba->cfg_enable_bg) { /* * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd, * the FCP rsp, and a BDE for each. Sice we have no control * over how many protection data segments the SCSI Layer * will hand us (ie: there could be one for every block * in the IO), we just allocate enough BDEs to accomidate * our max amount and we need to limit lpfc_sg_seg_cnt to * minimize the risk of running out. */ phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) + (LPFC_MAX_SG_SEG_CNT * entry_sz); if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF) phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF; /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */ phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT; } else { /* * The scsi_buf for a regular I/O will hold the FCP cmnd, * the FCP rsp, a BDE for each, and a BDE for up to * cfg_sg_seg_cnt data segments. */ phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) + ((phba->cfg_sg_seg_cnt + 2) * entry_sz); /* Total BDEs in BPL for scsi_sg_list */ phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2; } lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n", phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, phba->cfg_total_seg_cnt); phba->max_vpi = LPFC_MAX_VPI; /* This will be set to correct value after config_port mbox */ phba->max_vports = 0; /* * Initialize the SLI Layer to run with lpfc HBAs. */ lpfc_sli_setup(phba); lpfc_sli_queue_init(phba); /* Allocate device driver memory */ if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) return -ENOMEM; phba->lpfc_sg_dma_buf_pool = dma_pool_create("lpfc_sg_dma_buf_pool", &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, BPL_ALIGN_SZ, 0); if (!phba->lpfc_sg_dma_buf_pool) goto fail_free_mem; phba->lpfc_cmd_rsp_buf_pool = dma_pool_create("lpfc_cmd_rsp_buf_pool", &phba->pcidev->dev, sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp), BPL_ALIGN_SZ, 0); if (!phba->lpfc_cmd_rsp_buf_pool) goto fail_free_dma_buf_pool; /* * Enable sr-iov virtual functions if supported and configured * through the module parameter. */ if (phba->cfg_sriov_nr_virtfn > 0) { rc = lpfc_sli_probe_sriov_nr_virtfn(phba, phba->cfg_sriov_nr_virtfn); if (rc) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "2808 Requested number of SR-IOV " "virtual functions (%d) is not " "supported\n", phba->cfg_sriov_nr_virtfn); phba->cfg_sriov_nr_virtfn = 0; } } return 0; fail_free_dma_buf_pool: dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); phba->lpfc_sg_dma_buf_pool = NULL; fail_free_mem: lpfc_mem_free(phba); return -ENOMEM; } /** * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev * @phba: pointer to lpfc hba data structure. * * This routine is invoked to unset the driver internal resources set up * specific for supporting the SLI-3 HBA device it attached to. **/ static void lpfc_sli_driver_resource_unset(struct lpfc_hba *phba) { /* Free device driver memory allocated */ lpfc_mem_free_all(phba); return; } /** * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev * @phba: pointer to lpfc hba data structure. * * This routine is invoked to set up the driver internal resources specific to * support the SLI-4 HBA device it attached to. * * Return codes * 0 - successful * other values - error **/ static int lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) { LPFC_MBOXQ_t *mboxq; MAILBOX_t *mb; int rc, i, max_buf_size; int longs; int extra; uint64_t wwn; u32 if_type; u32 if_fam; phba->sli4_hba.num_present_cpu = lpfc_present_cpu; phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1; phba->sli4_hba.curr_disp_cpu = 0; /* Get all the module params for configuring this host */ lpfc_get_cfgparam(phba); /* Set up phase-1 common device driver resources */ rc = lpfc_setup_driver_resource_phase1(phba); if (rc) return -ENODEV; /* Before proceed, wait for POST done and device ready */ rc = lpfc_sli4_post_status_check(phba); if (rc) return -ENODEV; /* Allocate all driver workqueues here */ /* The lpfc_wq workqueue for deferred irq use */ phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); if (!phba->wq) return -ENOMEM; /* * Initialize timers used by driver */ timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0); /* FCF rediscover timer */ timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0); /* CMF congestion timer */ hrtimer_init(&phba->cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); phba->cmf_timer.function = lpfc_cmf_timer; /* CMF 1 minute stats collection timer */ hrtimer_init(&phba->cmf_stats_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); phba->cmf_stats_timer.function = lpfc_cmf_stats_timer; /* * Control structure for handling external multi-buffer mailbox * command pass-through. */ memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0, sizeof(struct lpfc_mbox_ext_buf_ctx)); INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list); phba->max_vpi = LPFC_MAX_VPI; /* This will be set to correct value after the read_config mbox */ phba->max_vports = 0; /* Program the default value of vlan_id and fc_map */ phba->valid_vlan = 0; phba->fc_map[0] = LPFC_FCOE_FCF_MAP0; phba->fc_map[1] = LPFC_FCOE_FCF_MAP1; phba->fc_map[2] = LPFC_FCOE_FCF_MAP2; /* * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands * we will associate a new ring, for each EQ/CQ/WQ tuple. * The WQ create will allocate the ring. */ /* Initialize buffer queue management fields */ INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free; /* for VMID idle timeout if VMID is enabled */ if (lpfc_is_vmid_enabled(phba)) timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0); /* * Initialize the SLI Layer to run with lpfc SLI4 HBAs. */ /* Initialize the Abort buffer list used by driver */ spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock); INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list); if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { /* Initialize the Abort nvme buffer list used by driver */ spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock); INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list); spin_lock_init(&phba->sli4_hba.t_active_list_lock); INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list); } /* This abort list used by worker thread */ spin_lock_init(&phba->sli4_hba.sgl_list_lock); spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock); spin_lock_init(&phba->sli4_hba.asynce_list_lock); spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock); /* * Initialize driver internal slow-path work queues */ /* Driver internel slow-path CQ Event pool */ INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool); /* Response IOCB work queue list */ INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event); /* Asynchronous event CQ Event work queue list */ INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue); /* Slow-path XRI aborted CQ Event work queue list */ INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue); /* Receive queue CQ Event work queue list */ INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue); /* Initialize extent block lists. */ INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list); INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list); INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list); INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list); /* Initialize mboxq lists. If the early init routines fail * these lists need to be correctly initialized. */ INIT_LIST_HEAD(&phba->sli.mboxq); INIT_LIST_HEAD(&phba->sli.mboxq_cmpl); /* initialize optic_state to 0xFF */ phba->sli4_hba.lnk_info.optic_state = 0xff; /* Allocate device driver memory */ rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ); if (rc) goto out_destroy_workqueue; /* IF Type 2 ports get initialized now. */ if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= LPFC_SLI_INTF_IF_TYPE_2) { rc = lpfc_pci_function_reset(phba); if (unlikely(rc)) { rc = -ENODEV; goto out_free_mem; } phba->temp_sensor_support = 1; } /* Create the bootstrap mailbox command */ rc = lpfc_create_bootstrap_mbox(phba); if (unlikely(rc)) goto out_free_mem; /* Set up the host's endian order with the device. */ rc = lpfc_setup_endian_order(phba); if (unlikely(rc)) goto out_free_bsmbx; /* Set up the hba's configuration parameters. */ rc = lpfc_sli4_read_config(phba); if (unlikely(rc)) goto out_free_bsmbx; if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) { /* Right now the link is down, if FA-PWWN is configured the * firmware will try FLOGI before the driver gets a link up. * If it fails, the driver should get a MISCONFIGURED async * event which will clear this flag. The only notification * the driver gets is if it fails, if it succeeds there is no * notification given. Assume success. */ phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC; } rc = lpfc_mem_alloc_active_rrq_pool_s4(phba); if (unlikely(rc)) goto out_free_bsmbx; /* IF Type 0 ports get initialized now. */ if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_IF_TYPE_0) { rc = lpfc_pci_function_reset(phba); if (unlikely(rc)) goto out_free_bsmbx; } mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!mboxq) { rc = -ENOMEM; goto out_free_bsmbx; } /* Check for NVMET being configured */ phba->nvmet_support = 0; if (lpfc_enable_nvmet_cnt) { /* First get WWN of HBA instance */ lpfc_read_nv(phba, mboxq); rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); if (rc != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6016 Mailbox failed , mbxCmd x%x " "READ_NV, mbxStatus x%x\n", bf_get(lpfc_mqe_command, &mboxq->u.mqe), bf_get(lpfc_mqe_status, &mboxq->u.mqe)); mempool_free(mboxq, phba->mbox_mem_pool); rc = -EIO; goto out_free_bsmbx; } mb = &mboxq->u.mb; memcpy(&wwn, (char *)mb->un.varRDnvp.nodename, sizeof(uint64_t)); wwn = cpu_to_be64(wwn); phba->sli4_hba.wwnn.u.name = wwn; memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); /* wwn is WWPN of HBA instance */ wwn = cpu_to_be64(wwn); phba->sli4_hba.wwpn.u.name = wwn; /* Check to see if it matches any module parameter */ for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { if (wwn == lpfc_enable_nvmet[i]) { #if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) if (lpfc_nvmet_mem_alloc(phba)) break; phba->nvmet_support = 1; /* a match */ lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6017 NVME Target %016llx\n", wwn); #else lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6021 Can't enable NVME Target." " NVME_TARGET_FC infrastructure" " is not in kernel\n"); #endif /* Not supported for NVMET */ phba->cfg_xri_rebalancing = 0; if (phba->irq_chann_mode == NHT_MODE) { phba->cfg_irq_chann = phba->sli4_hba.num_present_cpu; phba->cfg_hdw_queue = phba->sli4_hba.num_present_cpu; phba->irq_chann_mode = NORMAL_MODE; } break; } } } lpfc_nvme_mod_param_dep(phba); /* * Get sli4 parameters that override parameters from Port capabilities. * If this call fails, it isn't critical unless the SLI4 parameters come * back in conflict. */ rc = lpfc_get_sli4_parameters(phba, mboxq); if (rc) { if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); if_fam = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf); if (phba->sli4_hba.extents_in_use && phba->sli4_hba.rpi_hdrs_in_use) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2999 Unsupported SLI4 Parameters " "Extents and RPI headers enabled.\n"); if (if_type == LPFC_SLI_INTF_IF_TYPE_0 && if_fam == LPFC_SLI_INTF_FAMILY_BE2) { mempool_free(mboxq, phba->mbox_mem_pool); rc = -EIO; goto out_free_bsmbx; } } if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 && if_fam == LPFC_SLI_INTF_FAMILY_BE2)) { mempool_free(mboxq, phba->mbox_mem_pool); rc = -EIO; goto out_free_bsmbx; } } /* * 1 for cmd, 1 for rsp, NVME adds an extra one * for boundary conditions in its max_sgl_segment template. */ extra = 2; if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) extra++; /* * It doesn't matter what family our adapter is in, we are * limited to 2 Pages, 512 SGEs, for our SGL. * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp */ max_buf_size = (2 * SLI4_PAGE_SIZE); /* * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size * used to create the sg_dma_buf_pool must be calculated. */ if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { /* Both cfg_enable_bg and cfg_external_dif code paths */ /* * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, * the FCP rsp, and a SGE. Sice we have no control * over how many protection segments the SCSI Layer * will hand us (ie: there could be one for every block * in the IO), just allocate enough SGEs to accomidate * our max amount and we need to limit lpfc_sg_seg_cnt * to minimize the risk of running out. */ phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) + max_buf_size; /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; /* * If supporting DIF, reduce the seg count for scsi to * allow room for the DIF sges. */ if (phba->cfg_enable_bg && phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; else phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; } else { /* * The scsi_buf for a regular I/O holds the FCP cmnd, * the FCP rsp, a SGE for each, and a SGE for up to * cfg_sg_seg_cnt data segments. */ phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) + ((phba->cfg_sg_seg_cnt + extra) * sizeof(struct sli4_sge)); /* Total SGEs for scsi_sg_list */ phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; /* * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only * need to post 1 page for the SGL. */ } if (phba->cfg_xpsgl && !phba->nvmet_support) phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE; else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; else phba->cfg_sg_dma_buf_size = SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); phba->border_sge_num = phba->cfg_sg_dma_buf_size / sizeof(struct sli4_sge); /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, "6300 Reducing NVME sg segment " "cnt to %d\n", LPFC_MAX_NVME_SEG_CNT); phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; } else phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; } lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, "9087 sg_seg_cnt:%d dmabuf_size:%d " "total:%d scsi:%d nvme:%d\n", phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, phba->cfg_nvme_seg_cnt); if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) i = phba->cfg_sg_dma_buf_size; else i = SLI4_PAGE_SIZE; phba->lpfc_sg_dma_buf_pool = dma_pool_create("lpfc_sg_dma_buf_pool", &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, i, 0); if (!phba->lpfc_sg_dma_buf_pool) { rc = -ENOMEM; goto out_free_bsmbx; } phba->lpfc_cmd_rsp_buf_pool = dma_pool_create("lpfc_cmd_rsp_buf_pool", &phba->pcidev->dev, sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp), i, 0); if (!phba->lpfc_cmd_rsp_buf_pool) { rc = -ENOMEM; goto out_free_sg_dma_buf; } mempool_free(mboxq, phba->mbox_mem_pool); /* Verify OAS is supported */ lpfc_sli4_oas_verify(phba); /* Verify RAS support on adapter */ lpfc_sli4_ras_init(phba); /* Verify all the SLI4 queues */ rc = lpfc_sli4_queue_verify(phba); if (rc) goto out_free_cmd_rsp_buf; /* Create driver internal CQE event pool */ rc = lpfc_sli4_cq_event_pool_create(phba); if (rc) goto out_free_cmd_rsp_buf; /* Initialize sgl lists per host */ lpfc_init_sgl_list(phba); /* Allocate and initialize active sgl array */ rc = lpfc_init_active_sgl_array(phba); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1430 Failed to initialize sgl list.\n"); goto out_destroy_cq_event_pool; } rc = lpfc_sli4_init_rpi_hdrs(phba); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1432 Failed to initialize rpi headers.\n"); goto out_free_active_sgl; } /* Allocate eligible FCF bmask memory for FCF roundrobin failover */ longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG; phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long), GFP_KERNEL); if (!phba->fcf.fcf_rr_bmask) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2759 Failed allocate memory for FCF round " "robin failover bmask\n"); rc = -ENOMEM; goto out_remove_rpi_hdrs; } phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann, sizeof(struct lpfc_hba_eq_hdl), GFP_KERNEL); if (!phba->sli4_hba.hba_eq_hdl) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2572 Failed allocate memory for " "fast-path per-EQ handle array\n"); rc = -ENOMEM; goto out_free_fcf_rr_bmask; } phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(struct lpfc_vector_map_info), GFP_KERNEL); if (!phba->sli4_hba.cpu_map) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3327 Failed allocate memory for msi-x " "interrupt vector mapping\n"); rc = -ENOMEM; goto out_free_hba_eq_hdl; } phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info); if (!phba->sli4_hba.eq_info) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3321 Failed allocation for per_cpu stats\n"); rc = -ENOMEM; goto out_free_hba_cpu_map; } phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*phba->sli4_hba.idle_stat), GFP_KERNEL); if (!phba->sli4_hba.idle_stat) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3390 Failed allocation for idle_stat\n"); rc = -ENOMEM; goto out_free_hba_eq_info; } #ifdef CONFIG_SCSI_LPFC_DEBUG_FS phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat); if (!phba->sli4_hba.c_stat) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3332 Failed allocating per cpu hdwq stats\n"); rc = -ENOMEM; goto out_free_hba_idle_stat; } #endif phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat); if (!phba->cmf_stat) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3331 Failed allocating per cpu cgn stats\n"); rc = -ENOMEM; goto out_free_hba_hdwq_info; } /* * Enable sr-iov virtual functions if supported and configured * through the module parameter. */ if (phba->cfg_sriov_nr_virtfn > 0) { rc = lpfc_sli_probe_sriov_nr_virtfn(phba, phba->cfg_sriov_nr_virtfn); if (rc) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "3020 Requested number of SR-IOV " "virtual functions (%d) is not " "supported\n", phba->cfg_sriov_nr_virtfn); phba->cfg_sriov_nr_virtfn = 0; } } return 0; out_free_hba_hdwq_info: #ifdef CONFIG_SCSI_LPFC_DEBUG_FS free_percpu(phba->sli4_hba.c_stat); out_free_hba_idle_stat: #endif kfree(phba->sli4_hba.idle_stat); out_free_hba_eq_info: free_percpu(phba->sli4_hba.eq_info); out_free_hba_cpu_map: kfree(phba->sli4_hba.cpu_map); out_free_hba_eq_hdl: kfree(phba->sli4_hba.hba_eq_hdl); out_free_fcf_rr_bmask: kfree(phba->fcf.fcf_rr_bmask); out_remove_rpi_hdrs: lpfc_sli4_remove_rpi_hdrs(phba); out_free_active_sgl: lpfc_free_active_sgl(phba); out_destroy_cq_event_pool: lpfc_sli4_cq_event_pool_destroy(phba); out_free_cmd_rsp_buf: dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); phba->lpfc_cmd_rsp_buf_pool = NULL; out_free_sg_dma_buf: dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); phba->lpfc_sg_dma_buf_pool = NULL; out_free_bsmbx: lpfc_destroy_bootstrap_mbox(phba); out_free_mem: lpfc_mem_free(phba); out_destroy_workqueue: destroy_workqueue(phba->wq); phba->wq = NULL; return rc; } /** * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev * @phba: pointer to lpfc hba data structure. * * This routine is invoked to unset the driver internal resources set up * specific for supporting the SLI-4 HBA device it attached to. **/ static void lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba) { struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; free_percpu(phba->sli4_hba.eq_info); #ifdef CONFIG_SCSI_LPFC_DEBUG_FS free_percpu(phba->sli4_hba.c_stat); #endif free_percpu(phba->cmf_stat); kfree(phba->sli4_hba.idle_stat); /* Free memory allocated for msi-x interrupt vector to CPU mapping */ kfree(phba->sli4_hba.cpu_map); phba->sli4_hba.num_possible_cpu = 0; phba->sli4_hba.num_present_cpu = 0; phba->sli4_hba.curr_disp_cpu = 0; cpumask_clear(&phba->sli4_hba.irq_aff_mask); /* Free memory allocated for fast-path work queue handles */ kfree(phba->sli4_hba.hba_eq_hdl); /* Free the allocated rpi headers. */ lpfc_sli4_remove_rpi_hdrs(phba); lpfc_sli4_remove_rpis(phba); /* Free eligible FCF index bmask */ kfree(phba->fcf.fcf_rr_bmask); /* Free the ELS sgl list */ lpfc_free_active_sgl(phba); lpfc_free_els_sgl_list(phba); lpfc_free_nvmet_sgl_list(phba); /* Free the completion queue EQ event pool */ lpfc_sli4_cq_event_release_all(phba); lpfc_sli4_cq_event_pool_destroy(phba); /* Release resource identifiers. */ lpfc_sli4_dealloc_resource_identifiers(phba); /* Free the bsmbx region. */ lpfc_destroy_bootstrap_mbox(phba); /* Free the SLI Layer memory with SLI4 HBAs */ lpfc_mem_free_all(phba); /* Free the current connect table */ list_for_each_entry_safe(conn_entry, next_conn_entry, &phba->fcf_conn_rec_list, list) { list_del_init(&conn_entry->list); kfree(conn_entry); } return; } /** * lpfc_init_api_table_setup - Set up init api function jump table * @phba: The hba struct for which this call is being executed. * @dev_grp: The HBA PCI-Device group number. * * This routine sets up the device INIT interface API function jump table * in @phba struct. * * Returns: 0 - success, -ENODEV - failure. **/ int lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) { phba->lpfc_hba_init_link = lpfc_hba_init_link; phba->lpfc_hba_down_link = lpfc_hba_down_link; phba->lpfc_selective_reset = lpfc_selective_reset; switch (dev_grp) { case LPFC_PCI_DEV_LP: phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; phba->lpfc_handle_eratt = lpfc_handle_eratt_s3; phba->lpfc_stop_port = lpfc_stop_port_s3; break; case LPFC_PCI_DEV_OC: phba->lpfc_hba_down_post = lpfc_hba_down_post_s4; phba->lpfc_handle_eratt = lpfc_handle_eratt_s4; phba->lpfc_stop_port = lpfc_stop_port_s4; break; default: lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1431 Invalid HBA PCI-device group: 0x%x\n", dev_grp); return -ENODEV; } return 0; } /** * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to set up the driver internal resources after the * device specific resource setup to support the HBA device it attached to. * * Return codes * 0 - successful * other values - error **/ static int lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba) { int error; /* Startup the kernel thread for this host adapter. */ phba->worker_thread = kthread_run(lpfc_do_work, phba, "lpfc_worker_%d", phba->brd_no); if (IS_ERR(phba->worker_thread)) { error = PTR_ERR(phba->worker_thread); return error; } return 0; } /** * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to unset the driver internal resources set up after * the device specific resource setup for supporting the HBA device it * attached to. **/ static void lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba) { if (phba->wq) { destroy_workqueue(phba->wq); phba->wq = NULL; } /* Stop kernel worker thread */ if (phba->worker_thread) kthread_stop(phba->worker_thread); } /** * lpfc_free_iocb_list - Free iocb list. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to free the driver's IOCB list and memory. **/ void lpfc_free_iocb_list(struct lpfc_hba *phba) { struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; spin_lock_irq(&phba->hbalock); list_for_each_entry_safe(iocbq_entry, iocbq_next, &phba->lpfc_iocb_list, list) { list_del(&iocbq_entry->list); kfree(iocbq_entry); phba->total_iocbq_bufs--; } spin_unlock_irq(&phba->hbalock); return; } /** * lpfc_init_iocb_list - Allocate and initialize iocb list. * @phba: pointer to lpfc hba data structure. * @iocb_count: number of requested iocbs * * This routine is invoked to allocate and initizlize the driver's IOCB * list and set up the IOCB tag array accordingly. * * Return codes * 0 - successful * other values - error **/ int lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count) { struct lpfc_iocbq *iocbq_entry = NULL; uint16_t iotag; int i; /* Initialize and populate the iocb list per host. */ INIT_LIST_HEAD(&phba->lpfc_iocb_list); for (i = 0; i < iocb_count; i++) { iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); if (iocbq_entry == NULL) { printk(KERN_ERR "%s: only allocated %d iocbs of " "expected %d count. Unloading driver.\n", __func__, i, iocb_count); goto out_free_iocbq; } iotag = lpfc_sli_next_iotag(phba, iocbq_entry); if (iotag == 0) { kfree(iocbq_entry); printk(KERN_ERR "%s: failed to allocate IOTAG. " "Unloading driver.\n", __func__); goto out_free_iocbq; } iocbq_entry->sli4_lxritag = NO_XRI; iocbq_entry->sli4_xritag = NO_XRI; spin_lock_irq(&phba->hbalock); list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); phba->total_iocbq_bufs++; spin_unlock_irq(&phba->hbalock); } return 0; out_free_iocbq: lpfc_free_iocb_list(phba); return -ENOMEM; } /** * lpfc_free_sgl_list - Free a given sgl list. * @phba: pointer to lpfc hba data structure. * @sglq_list: pointer to the head of sgl list. * * This routine is invoked to free a give sgl list and memory. **/ void lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list) { struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) { list_del(&sglq_entry->list); lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); kfree(sglq_entry); } } /** * lpfc_free_els_sgl_list - Free els sgl list. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to free the driver's els sgl list and memory. **/ static void lpfc_free_els_sgl_list(struct lpfc_hba *phba) { LIST_HEAD(sglq_list); /* Retrieve all els sgls from driver list */ spin_lock_irq(&phba->sli4_hba.sgl_list_lock); list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list); spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); /* Now free the sgl list */ lpfc_free_sgl_list(phba, &sglq_list); } /** * lpfc_free_nvmet_sgl_list - Free nvmet sgl list. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to free the driver's nvmet sgl list and memory. **/ static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba) { struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; LIST_HEAD(sglq_list); /* Retrieve all nvmet sgls from driver list */ spin_lock_irq(&phba->hbalock); spin_lock(&phba->sli4_hba.sgl_list_lock); list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list); spin_unlock(&phba->sli4_hba.sgl_list_lock); spin_unlock_irq(&phba->hbalock); /* Now free the sgl list */ list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) { list_del(&sglq_entry->list); lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); kfree(sglq_entry); } /* Update the nvmet_xri_cnt to reflect no current sgls. * The next initialization cycle sets the count and allocates * the sgls over again. */ phba->sli4_hba.nvmet_xri_cnt = 0; } /** * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to allocate the driver's active sgl memory. * This array will hold the sglq_entry's for active IOs. **/ static int lpfc_init_active_sgl_array(struct lpfc_hba *phba) { int size; size = sizeof(struct lpfc_sglq *); size *= phba->sli4_hba.max_cfg_param.max_xri; phba->sli4_hba.lpfc_sglq_active_list = kzalloc(size, GFP_KERNEL); if (!phba->sli4_hba.lpfc_sglq_active_list) return -ENOMEM; return 0; } /** * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to walk through the array of active sglq entries * and free all of the resources. * This is just a place holder for now. **/ static void lpfc_free_active_sgl(struct lpfc_hba *phba) { kfree(phba->sli4_hba.lpfc_sglq_active_list); } /** * lpfc_init_sgl_list - Allocate and initialize sgl list. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to allocate and initizlize the driver's sgl * list and set up the sgl xritag tag array accordingly. * **/ static void lpfc_init_sgl_list(struct lpfc_hba *phba) { /* Initialize and populate the sglq list per host/VF. */ INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list); INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list); INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list); INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); /* els xri-sgl book keeping */ phba->sli4_hba.els_xri_cnt = 0; /* nvme xri-buffer book keeping */ phba->sli4_hba.io_xri_cnt = 0; } /** * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port * @phba: pointer to lpfc hba data structure. * * This routine is invoked to post rpi header templates to the * port for those SLI4 ports that do not support extents. This routine * posts a PAGE_SIZE memory region to the port to hold up to * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine * and should be called only when interrupts are disabled. * * Return codes * 0 - successful * -ERROR - otherwise. **/ int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba) { int rc = 0; struct lpfc_rpi_hdr *rpi_hdr; INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list); if (!phba->sli4_hba.rpi_hdrs_in_use) return rc; if (phba->sli4_hba.extents_in_use) return -EIO; rpi_hdr = lpfc_sli4_create_rpi_hdr(phba); if (!rpi_hdr) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0391 Error during rpi post operation\n"); lpfc_sli4_remove_rpis(phba); rc = -ENODEV; } return rc; } /** * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region * @phba: pointer to lpfc hba data structure. * * This routine is invoked to allocate a single 4KB memory region to * support rpis and stores them in the phba. This single region * provides support for up to 64 rpis. The region is used globally * by the device. * * Returns: * A valid rpi hdr on success. * A NULL pointer on any failure. **/ struct lpfc_rpi_hdr * lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba) { uint16_t rpi_limit, curr_rpi_range; struct lpfc_dmabuf *dmabuf; struct lpfc_rpi_hdr *rpi_hdr; /* * If the SLI4 port supports extents, posting the rpi header isn't * required. Set the expected maximum count and let the actual value * get set when extents are fully allocated. */ if (!phba->sli4_hba.rpi_hdrs_in_use) return NULL; if (phba->sli4_hba.extents_in_use) return NULL; /* The limit on the logical index is just the max_rpi count. */ rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi; spin_lock_irq(&phba->hbalock); /* * Establish the starting RPI in this header block. The starting * rpi is normalized to a zero base because the physical rpi is * port based. */ curr_rpi_range = phba->sli4_hba.next_rpi; spin_unlock_irq(&phba->hbalock); /* Reached full RPI range */ if (curr_rpi_range == rpi_limit) return NULL; /* * First allocate the protocol header region for the port. The * port expects a 4KB DMA-mapped memory region that is 4K aligned. */ dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); if (!dmabuf) return NULL; dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, &dmabuf->phys, GFP_KERNEL); if (!dmabuf->virt) { rpi_hdr = NULL; goto err_free_dmabuf; } if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) { rpi_hdr = NULL; goto err_free_coherent; } /* Save the rpi header data for cleanup later. */ rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL); if (!rpi_hdr) goto err_free_coherent; rpi_hdr->dmabuf = dmabuf; rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE; rpi_hdr->page_count = 1; spin_lock_irq(&phba->hbalock); /* The rpi_hdr stores the logical index only. */ rpi_hdr->start_rpi = curr_rpi_range; rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT; list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list); spin_unlock_irq(&phba->hbalock); return rpi_hdr; err_free_coherent: dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, dmabuf->virt, dmabuf->phys); err_free_dmabuf: kfree(dmabuf); return NULL; } /** * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions * @phba: pointer to lpfc hba data structure. * * This routine is invoked to remove all memory resources allocated * to support rpis for SLI4 ports not supporting extents. This routine * presumes the caller has released all rpis consumed by fabric or port * logins and is prepared to have the header pages removed. **/ void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba) { struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr; if (!phba->sli4_hba.rpi_hdrs_in_use) goto exit; list_for_each_entry_safe(rpi_hdr, next_rpi_hdr, &phba->sli4_hba.lpfc_rpi_hdr_list, list) { list_del(&rpi_hdr->list); dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len, rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys); kfree(rpi_hdr->dmabuf); kfree(rpi_hdr); } exit: /* There are no rpis available to the port now. */ phba->sli4_hba.next_rpi = 0; } /** * lpfc_hba_alloc - Allocate driver hba data structure for a device. * @pdev: pointer to pci device data structure. * * This routine is invoked to allocate the driver hba data structure for an * HBA device. If the allocation is successful, the phba reference to the * PCI device data structure is set. * * Return codes * pointer to @phba - successful * NULL - error **/ static struct lpfc_hba * lpfc_hba_alloc(struct pci_dev *pdev) { struct lpfc_hba *phba; /* Allocate memory for HBA structure */ phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL); if (!phba) { dev_err(&pdev->dev, "failed to allocate hba struct\n"); return NULL; } /* Set reference to PCI device in HBA structure */ phba->pcidev = pdev; /* Assign an unused board number */ phba->brd_no = lpfc_get_instance(); if (phba->brd_no < 0) { kfree(phba); return NULL; } phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL; spin_lock_init(&phba->ct_ev_lock); INIT_LIST_HEAD(&phba->ct_ev_waiters); return phba; } /** * lpfc_hba_free - Free driver hba data structure with a device. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to free the driver hba data structure with an * HBA device. **/ static void lpfc_hba_free(struct lpfc_hba *phba) { if (phba->sli_rev == LPFC_SLI_REV4) kfree(phba->sli4_hba.hdwq); /* Release the driver assigned board number */ idr_remove(&lpfc_hba_index, phba->brd_no); /* Free memory allocated with sli3 rings */ kfree(phba->sli.sli3_ring); phba->sli.sli3_ring = NULL; kfree(phba); return; } /** * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes * @vport: pointer to lpfc vport data structure. * * This routine is will setup initial FDMI attribute masks for * FDMI2 or SmartSAN depending on module parameters. The driver will attempt * to get these attributes first before falling back, the attribute * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1 **/ void lpfc_setup_fdmi_mask(struct lpfc_vport *vport) { struct lpfc_hba *phba = vport->phba; vport->load_flag |= FC_ALLOW_FDMI; if (phba->cfg_enable_SmartSAN || phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) { /* Setup appropriate attribute masks */ vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR; if (phba->cfg_enable_SmartSAN) vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR; else vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; } lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY, "6077 Setup FDMI mask: hba x%x port x%x\n", vport->fdmi_hba_mask, vport->fdmi_port_mask); } /** * lpfc_create_shost - Create hba physical port with associated scsi host. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to create HBA physical port and associate a SCSI * host with it. * * Return codes * 0 - successful * other values - error **/ static int lpfc_create_shost(struct lpfc_hba *phba) { struct lpfc_vport *vport; struct Scsi_Host *shost; /* Initialize HBA FC structure */ phba->fc_edtov = FF_DEF_EDTOV; phba->fc_ratov = FF_DEF_RATOV; phba->fc_altov = FF_DEF_ALTOV; phba->fc_arbtov = FF_DEF_ARBTOV; atomic_set(&phba->sdev_cnt, 0); vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev); if (!vport) return -ENODEV; shost = lpfc_shost_from_vport(vport); phba->pport = vport; if (phba->nvmet_support) { /* Only 1 vport (pport) will support NVME target */ phba->targetport = NULL; phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME; lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC, "6076 NVME Target Found\n"); } lpfc_debugfs_initialize(vport); /* Put reference to SCSI host to driver's device private data */ pci_set_drvdata(phba->pcidev, shost); lpfc_setup_fdmi_mask(vport); /* * At this point we are fully registered with PSA. In addition, * any initial discovery should be completed. */ return 0; } /** * lpfc_destroy_shost - Destroy hba physical port with associated scsi host. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to destroy HBA physical port and the associated * SCSI host. **/ static void lpfc_destroy_shost(struct lpfc_hba *phba) { struct lpfc_vport *vport = phba->pport; /* Destroy physical port that associated with the SCSI host */ destroy_port(vport); return; } /** * lpfc_setup_bg - Setup Block guard structures and debug areas. * @phba: pointer to lpfc hba data structure. * @shost: the shost to be used to detect Block guard settings. * * This routine sets up the local Block guard protocol settings for @shost. * This routine also allocates memory for debugging bg buffers. **/ static void lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost) { uint32_t old_mask; uint32_t old_guard; if (phba->cfg_prot_mask && phba->cfg_prot_guard) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "1478 Registering BlockGuard with the " "SCSI layer\n"); old_mask = phba->cfg_prot_mask; old_guard = phba->cfg_prot_guard; /* Only allow supported values */ phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION | SHOST_DIX_TYPE0_PROTECTION | SHOST_DIX_TYPE1_PROTECTION); phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP | SHOST_DIX_GUARD_CRC); /* DIF Type 1 protection for profiles AST1/C1 is end to end */ if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION) phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION; if (phba->cfg_prot_mask && phba->cfg_prot_guard) { if ((old_mask != phba->cfg_prot_mask) || (old_guard != phba->cfg_prot_guard)) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1475 Registering BlockGuard with the " "SCSI layer: mask %d guard %d\n", phba->cfg_prot_mask, phba->cfg_prot_guard); scsi_host_set_prot(shost, phba->cfg_prot_mask); scsi_host_set_guard(shost, phba->cfg_prot_guard); } else lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1479 Not Registering BlockGuard with the SCSI " "layer, Bad protection parameters: %d %d\n", old_mask, old_guard); } } /** * lpfc_post_init_setup - Perform necessary device post initialization setup. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to perform all the necessary post initialization * setup for the device. **/ static void lpfc_post_init_setup(struct lpfc_hba *phba) { struct Scsi_Host *shost; struct lpfc_adapter_event_header adapter_event; /* Get the default values for Model Name and Description */ lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); /* * hba setup may have changed the hba_queue_depth so we need to * adjust the value of can_queue. */ shost = pci_get_drvdata(phba->pcidev); shost->can_queue = phba->cfg_hba_queue_depth - 10; lpfc_host_attrib_init(shost); if (phba->cfg_poll & DISABLE_FCP_RING_INT) { spin_lock_irq(shost->host_lock); lpfc_poll_start_timer(phba); spin_unlock_irq(shost->host_lock); } lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0428 Perform SCSI scan\n"); /* Send board arrival event to upper layer */ adapter_event.event_type = FC_REG_ADAPTER_EVENT; adapter_event.subcategory = LPFC_EVENT_ARRIVAL; fc_host_post_vendor_event(shost, fc_get_event_number(), sizeof(adapter_event), (char *) &adapter_event, LPFC_NL_VENDOR_ID); return; } /** * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to set up the PCI device memory space for device * with SLI-3 interface spec. * * Return codes * 0 - successful * other values - error **/ static int lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) { struct pci_dev *pdev = phba->pcidev; unsigned long bar0map_len, bar2map_len; int i, hbq_count; void *ptr; int error; if (!pdev) return -ENODEV; /* Set the device DMA mask size */ error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); if (error) error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); if (error) return error; error = -ENODEV; /* Get the bus address of Bar0 and Bar2 and the number of bytes * required by each mapping. */ phba->pci_bar0_map = pci_resource_start(pdev, 0); bar0map_len = pci_resource_len(pdev, 0); phba->pci_bar2_map = pci_resource_start(pdev, 2); bar2map_len = pci_resource_len(pdev, 2); /* Map HBA SLIM to a kernel virtual address. */ phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); if (!phba->slim_memmap_p) { dev_printk(KERN_ERR, &pdev->dev, "ioremap failed for SLIM memory.\n"); goto out; } /* Map HBA Control Registers to a kernel virtual address. */ phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); if (!phba->ctrl_regs_memmap_p) { dev_printk(KERN_ERR, &pdev->dev, "ioremap failed for HBA control registers.\n"); goto out_iounmap_slim; } /* Allocate memory for SLI-2 structures */ phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE, &phba->slim2p.phys, GFP_KERNEL); if (!phba->slim2p.virt) goto out_iounmap; phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx); phba->mbox_ext = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx_ext_words)); phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb)); phba->IOCBs = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, IOCBs)); phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev, lpfc_sli_hbq_size(), &phba->hbqslimp.phys, GFP_KERNEL); if (!phba->hbqslimp.virt) goto out_free_slim; hbq_count = lpfc_sli_hbq_count(); ptr = phba->hbqslimp.virt; for (i = 0; i < hbq_count; ++i) { phba->hbqs[i].hbq_virt = ptr; INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list); ptr += (lpfc_hbq_defs[i]->entry_count * sizeof(struct lpfc_hbq_entry)); } phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc; phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free; memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size()); phba->MBslimaddr = phba->slim_memmap_p; phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; return 0; out_free_slim: dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p.virt, phba->slim2p.phys); out_iounmap: iounmap(phba->ctrl_regs_memmap_p); out_iounmap_slim: iounmap(phba->slim_memmap_p); out: return error; } /** * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to unset the PCI device memory space for device * with SLI-3 interface spec. **/ static void lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) { struct pci_dev *pdev; /* Obtain PCI device reference */ if (!phba->pcidev) return; else pdev = phba->pcidev; /* Free coherent DMA memory allocated */ dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), phba->hbqslimp.virt, phba->hbqslimp.phys); dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p.virt, phba->slim2p.phys); /* I/O memory unmap */ iounmap(phba->ctrl_regs_memmap_p); iounmap(phba->slim_memmap_p); return; } /** * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status * @phba: pointer to lpfc hba data structure. * * This routine is invoked to wait for SLI4 device Power On Self Test (POST) * done and check status. * * Return 0 if successful, otherwise -ENODEV. **/ int lpfc_sli4_post_status_check(struct lpfc_hba *phba) { struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg; struct lpfc_register reg_data; int i, port_error = 0; uint32_t if_type; memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); memset(®_data, 0, sizeof(reg_data)); if (!phba->sli4_hba.PSMPHRregaddr) return -ENODEV; /* Wait up to 30 seconds for the SLI Port POST done and ready */ for (i = 0; i < 3000; i++) { if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, &portsmphr_reg.word0) || (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) { /* Port has a fatal POST error, break out */ port_error = -ENODEV; break; } if (LPFC_POST_STAGE_PORT_READY == bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)) break; msleep(10); } /* * If there was a port error during POST, then don't proceed with * other register reads as the data may not be valid. Just exit. */ if (port_error) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1408 Port Failed POST - portsmphr=0x%x, " "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, " "scr2=x%x, hscratch=x%x, pstatus=x%x\n", portsmphr_reg.word0, bf_get(lpfc_port_smphr_perr, &portsmphr_reg), bf_get(lpfc_port_smphr_sfi, &portsmphr_reg), bf_get(lpfc_port_smphr_nip, &portsmphr_reg), bf_get(lpfc_port_smphr_ipc, &portsmphr_reg), bf_get(lpfc_port_smphr_scr1, &portsmphr_reg), bf_get(lpfc_port_smphr_scr2, &portsmphr_reg), bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg), bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)); } else { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "2534 Device Info: SLIFamily=0x%x, " "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, " "SLIHint_2=0x%x, FT=0x%x\n", bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf), bf_get(lpfc_sli_intf_slirev, &phba->sli4_hba.sli_intf), bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf), bf_get(lpfc_sli_intf_sli_hint1, &phba->sli4_hba.sli_intf), bf_get(lpfc_sli_intf_sli_hint2, &phba->sli4_hba.sli_intf), bf_get(lpfc_sli_intf_func_type, &phba->sli4_hba.sli_intf)); /* * Check for other Port errors during the initialization * process. Fail the load if the port did not come up * correctly. */ if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); switch (if_type) { case LPFC_SLI_INTF_IF_TYPE_0: phba->sli4_hba.ue_mask_lo = readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr); phba->sli4_hba.ue_mask_hi = readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr); uerrlo_reg.word0 = readl(phba->sli4_hba.u.if_type0.UERRLOregaddr); uerrhi_reg.word0 = readl(phba->sli4_hba.u.if_type0.UERRHIregaddr); if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) || (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1422 Unrecoverable Error " "Detected during POST " "uerr_lo_reg=0x%x, " "uerr_hi_reg=0x%x, " "ue_mask_lo_reg=0x%x, " "ue_mask_hi_reg=0x%x\n", uerrlo_reg.word0, uerrhi_reg.word0, phba->sli4_hba.ue_mask_lo, phba->sli4_hba.ue_mask_hi); port_error = -ENODEV; } break; case LPFC_SLI_INTF_IF_TYPE_2: case LPFC_SLI_INTF_IF_TYPE_6: /* Final checks. The port status should be clean. */ if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr, ®_data.word0) || lpfc_sli4_unrecoverable_port(®_data)) { phba->work_status[0] = readl(phba->sli4_hba.u.if_type2. ERR1regaddr); phba->work_status[1] = readl(phba->sli4_hba.u.if_type2. ERR2regaddr); lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2888 Unrecoverable port error " "following POST: port status reg " "0x%x, port_smphr reg 0x%x, " "error 1=0x%x, error 2=0x%x\n", reg_data.word0, portsmphr_reg.word0, phba->work_status[0], phba->work_status[1]); port_error = -ENODEV; break; } if (lpfc_pldv_detect && bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_FAMILY_G6) pci_write_config_byte(phba->pcidev, LPFC_SLI_INTF, CFG_PLD); break; case LPFC_SLI_INTF_IF_TYPE_1: default: break; } } return port_error; } /** * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. * @phba: pointer to lpfc hba data structure. * @if_type: The SLI4 interface type getting configured. * * This routine is invoked to set up SLI4 BAR0 PCI config space register * memory map. **/ static void lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type) { switch (if_type) { case LPFC_SLI_INTF_IF_TYPE_0: phba->sli4_hba.u.if_type0.UERRLOregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO; phba->sli4_hba.u.if_type0.UERRHIregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI; phba->sli4_hba.u.if_type0.UEMASKLOregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO; phba->sli4_hba.u.if_type0.UEMASKHIregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; phba->sli4_hba.SLIINTFregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; break; case LPFC_SLI_INTF_IF_TYPE_2: phba->sli4_hba.u.if_type2.EQDregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_EQ_DELAY_OFFSET; phba->sli4_hba.u.if_type2.ERR1regaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_ER1_OFFSET; phba->sli4_hba.u.if_type2.ERR2regaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_ER2_OFFSET; phba->sli4_hba.u.if_type2.CTRLregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_CTL_OFFSET; phba->sli4_hba.u.if_type2.STATUSregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_STA_OFFSET; phba->sli4_hba.SLIINTFregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_SEM_OFFSET; phba->sli4_hba.RQDBregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_ULP0_RQ_DOORBELL; phba->sli4_hba.WQDBregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_ULP0_WQ_DOORBELL; phba->sli4_hba.CQDBregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL; phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; phba->sli4_hba.MQDBregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL; phba->sli4_hba.BMBXregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; break; case LPFC_SLI_INTF_IF_TYPE_6: phba->sli4_hba.u.if_type2.EQDregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_EQ_DELAY_OFFSET; phba->sli4_hba.u.if_type2.ERR1regaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_ER1_OFFSET; phba->sli4_hba.u.if_type2.ERR2regaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_ER2_OFFSET; phba->sli4_hba.u.if_type2.CTRLregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_CTL_OFFSET; phba->sli4_hba.u.if_type2.STATUSregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_STA_OFFSET; phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PORT_SEM_OFFSET; phba->sli4_hba.BMBXregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; break; case LPFC_SLI_INTF_IF_TYPE_1: default: dev_printk(KERN_ERR, &phba->pcidev->dev, "FATAL - unsupported SLI4 interface type - %d\n", if_type); break; } } /** * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map. * @phba: pointer to lpfc hba data structure. * @if_type: sli if type to operate on. * * This routine is invoked to set up SLI4 BAR1 register memory map. **/ static void lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type) { switch (if_type) { case LPFC_SLI_INTF_IF_TYPE_0: phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + LPFC_SLIPORT_IF0_SMPHR; phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + LPFC_HST_ISR0; phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + LPFC_HST_IMR0; phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + LPFC_HST_ISCR0; break; case LPFC_SLI_INTF_IF_TYPE_6: phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + LPFC_IF6_RQ_DOORBELL; phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + LPFC_IF6_WQ_DOORBELL; phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + LPFC_IF6_CQ_DOORBELL; phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + LPFC_IF6_EQ_DOORBELL; phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + LPFC_IF6_MQ_DOORBELL; break; case LPFC_SLI_INTF_IF_TYPE_2: case LPFC_SLI_INTF_IF_TYPE_1: default: dev_err(&phba->pcidev->dev, "FATAL - unsupported SLI4 interface type - %d\n", if_type); break; } } /** * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map. * @phba: pointer to lpfc hba data structure. * @vf: virtual function number * * This routine is invoked to set up SLI4 BAR2 doorbell register memory map * based on the given viftual function number, @vf. * * Return 0 if successful, otherwise -ENODEV. **/ static int lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf) { if (vf > LPFC_VIR_FUNC_MAX) return -ENODEV; phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + vf * LPFC_VFR_PAGE_SIZE + LPFC_ULP0_RQ_DOORBELL); phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + vf * LPFC_VFR_PAGE_SIZE + LPFC_ULP0_WQ_DOORBELL); phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL); phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL); phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p + vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX); return 0; } /** * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox * @phba: pointer to lpfc hba data structure. * * This routine is invoked to create the bootstrap mailbox * region consistent with the SLI-4 interface spec. This * routine allocates all memory necessary to communicate * mailbox commands to the port and sets up all alignment * needs. No locks are expected to be held when calling * this routine. * * Return codes * 0 - successful * -ENOMEM - could not allocated memory. **/ static int lpfc_create_bootstrap_mbox(struct lpfc_hba *phba) { uint32_t bmbx_size; struct lpfc_dmabuf *dmabuf; struct dma_address *dma_address; uint32_t pa_addr; uint64_t phys_addr; dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); if (!dmabuf) return -ENOMEM; /* * The bootstrap mailbox region is comprised of 2 parts * plus an alignment restriction of 16 bytes. */ bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1); dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size, &dmabuf->phys, GFP_KERNEL); if (!dmabuf->virt) { kfree(dmabuf); return -ENOMEM; } /* * Initialize the bootstrap mailbox pointers now so that the register * operations are simple later. The mailbox dma address is required * to be 16-byte aligned. Also align the virtual memory as each * maibox is copied into the bmbx mailbox region before issuing the * command to the port. */ phba->sli4_hba.bmbx.dmabuf = dmabuf; phba->sli4_hba.bmbx.bmbx_size = bmbx_size; phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt, LPFC_ALIGN_16_BYTE); phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys, LPFC_ALIGN_16_BYTE); /* * Set the high and low physical addresses now. The SLI4 alignment * requirement is 16 bytes and the mailbox is posted to the port * as two 30-bit addresses. The other data is a bit marking whether * the 30-bit address is the high or low address. * Upcast bmbx aphys to 64bits so shift instruction compiles * clean on 32 bit machines. */ dma_address = &phba->sli4_hba.bmbx.dma_address; phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys; pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff); dma_address->addr_hi = (uint32_t) ((pa_addr << 2) | LPFC_BMBX_BIT1_ADDR_HI); pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff); dma_address->addr_lo = (uint32_t) ((pa_addr << 2) | LPFC_BMBX_BIT1_ADDR_LO); return 0; } /** * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources * @phba: pointer to lpfc hba data structure. * * This routine is invoked to teardown the bootstrap mailbox * region and release all host resources. This routine requires * the caller to ensure all mailbox commands recovered, no * additional mailbox comands are sent, and interrupts are disabled * before calling this routine. * **/ static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba) { dma_free_coherent(&phba->pcidev->dev, phba->sli4_hba.bmbx.bmbx_size, phba->sli4_hba.bmbx.dmabuf->virt, phba->sli4_hba.bmbx.dmabuf->phys); kfree(phba->sli4_hba.bmbx.dmabuf); memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx)); } static const char * const lpfc_topo_to_str[] = { "Loop then P2P", "Loopback", "P2P Only", "Unsupported", "Loop Only", "Unsupported", "P2P then Loop", }; #define LINK_FLAGS_DEF 0x0 #define LINK_FLAGS_P2P 0x1 #define LINK_FLAGS_LOOP 0x2 /** * lpfc_map_topology - Map the topology read from READ_CONFIG * @phba: pointer to lpfc hba data structure. * @rd_config: pointer to read config data * * This routine is invoked to map the topology values as read * from the read config mailbox command. If the persistent * topology feature is supported, the firmware will provide the * saved topology information to be used in INIT_LINK **/ static void lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config) { u8 ptv, tf, pt; ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config); tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config); pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config); lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x", ptv, tf, pt); if (!ptv) { lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, "2019 FW does not support persistent topology " "Using driver parameter defined value [%s]", lpfc_topo_to_str[phba->cfg_topology]); return; } /* FW supports persistent topology - override module parameter value */ phba->hba_flag |= HBA_PERSISTENT_TOPO; /* if ASIC_GEN_NUM >= 0xC) */ if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_IF_TYPE_6) || (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_FAMILY_G6)) { if (!tf) { phba->cfg_topology = ((pt == LINK_FLAGS_LOOP) ? FLAGS_TOPOLOGY_MODE_LOOP : FLAGS_TOPOLOGY_MODE_PT_PT); } else { phba->hba_flag &= ~HBA_PERSISTENT_TOPO; } } else { /* G5 */ if (tf) { /* If topology failover set - pt is '0' or '1' */ phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP : FLAGS_TOPOLOGY_MODE_LOOP_PT); } else { phba->cfg_topology = ((pt == LINK_FLAGS_P2P) ? FLAGS_TOPOLOGY_MODE_PT_PT : FLAGS_TOPOLOGY_MODE_LOOP); } } if (phba->hba_flag & HBA_PERSISTENT_TOPO) { lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "2020 Using persistent topology value [%s]", lpfc_topo_to_str[phba->cfg_topology]); } else { lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, "2021 Invalid topology values from FW " "Using driver parameter defined value [%s]", lpfc_topo_to_str[phba->cfg_topology]); } } /** * lpfc_sli4_read_config - Get the config parameters. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to read the configuration parameters from the HBA. * The configuration parameters are used to set the base and maximum values * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource * allocation for the port. * * Return codes * 0 - successful * -ENOMEM - No available memory * -EIO - The mailbox failed to complete successfully. **/ int lpfc_sli4_read_config(struct lpfc_hba *phba) { LPFC_MBOXQ_t *pmb; struct lpfc_mbx_read_config *rd_config; union lpfc_sli4_cfg_shdr *shdr; uint32_t shdr_status, shdr_add_status; struct lpfc_mbx_get_func_cfg *get_func_cfg; struct lpfc_rsrc_desc_fcfcoe *desc; char *pdesc_0; uint16_t forced_link_speed; uint32_t if_type, qmin, fawwpn; int length, i, rc = 0, rc2; pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2011 Unable to allocate memory for issuing " "SLI_CONFIG_SPECIAL mailbox command\n"); return -ENOMEM; } lpfc_read_config(phba, pmb); rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); if (rc != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2012 Mailbox failed , mbxCmd x%x " "READ_CONFIG, mbxStatus x%x\n", bf_get(lpfc_mqe_command, &pmb->u.mqe), bf_get(lpfc_mqe_status, &pmb->u.mqe)); rc = -EIO; } else { rd_config = &pmb->u.mqe.un.rd_config; if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) { phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL; phba->sli4_hba.lnk_info.lnk_tp = bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config); phba->sli4_hba.lnk_info.lnk_no = bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config); lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "3081 lnk_type:%d, lnk_numb:%d\n", phba->sli4_hba.lnk_info.lnk_tp, phba->sli4_hba.lnk_info.lnk_no); } else lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, "3082 Mailbox (x%x) returned ldv:x0\n", bf_get(lpfc_mqe_command, &pmb->u.mqe)); if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) { phba->bbcredit_support = 1; phba->sli4_hba.bbscn_params.word0 = rd_config->word8; } fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config); if (fawwpn) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_DISCOVERY, "2702 READ_CONFIG: FA-PWWN is " "configured on\n"); phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG; } else { /* Clear FW configured flag, preserve driver flag */ phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG; } phba->sli4_hba.conf_trunk = bf_get(lpfc_mbx_rd_conf_trunk, rd_config); phba->sli4_hba.extents_in_use = bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); phba->sli4_hba.max_cfg_param.max_xri = bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); /* Reduce resource usage in kdump environment */ if (is_kdump_kernel() && phba->sli4_hba.max_cfg_param.max_xri > 512) phba->sli4_hba.max_cfg_param.max_xri = 512; phba->sli4_hba.max_cfg_param.xri_base = bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); phba->sli4_hba.max_cfg_param.max_vpi = bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config); /* Limit the max we support */ if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS) phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS; phba->sli4_hba.max_cfg_param.vpi_base = bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config); phba->sli4_hba.max_cfg_param.max_rpi = bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config); phba->sli4_hba.max_cfg_param.rpi_base = bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config); phba->sli4_hba.max_cfg_param.max_vfi = bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config); phba->sli4_hba.max_cfg_param.vfi_base = bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config); phba->sli4_hba.max_cfg_param.max_fcfi = bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config); phba->sli4_hba.max_cfg_param.max_eq = bf_get(lpfc_mbx_rd_conf_eq_count, rd_config); phba->sli4_hba.max_cfg_param.max_rq = bf_get(lpfc_mbx_rd_conf_rq_count, rd_config); phba->sli4_hba.max_cfg_param.max_wq = bf_get(lpfc_mbx_rd_conf_wq_count, rd_config); phba->sli4_hba.max_cfg_param.max_cq = bf_get(lpfc_mbx_rd_conf_cq_count, rd_config); phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config); phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base; phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base; phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base; phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ? (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0; phba->max_vports = phba->max_vpi; /* Next decide on FPIN or Signal E2E CGN support * For congestion alarms and warnings valid combination are: * 1. FPIN alarms / FPIN warnings * 2. Signal alarms / Signal warnings * 3. FPIN alarms / Signal warnings * 4. Signal alarms / FPIN warnings * * Initialize the adapter frequency to 100 mSecs */ phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED; phba->cgn_sig_freq = lpfc_fabric_cgn_frequency; if (lpfc_use_cgn_signal) { if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) { phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY; phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN; } if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) { /* MUST support both alarm and warning * because EDC does not support alarm alone. */ if (phba->cgn_reg_signal != EDC_CG_SIG_WARN_ONLY) { /* Must support both or none */ phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED; } else { phba->cgn_reg_signal = EDC_CG_SIG_WARN_ALARM; phba->cgn_reg_fpin = LPFC_CGN_FPIN_NONE; } } } /* Set the congestion initial signal and fpin values. */ phba->cgn_init_reg_fpin = phba->cgn_reg_fpin; phba->cgn_init_reg_signal = phba->cgn_reg_signal; lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n", phba->cgn_reg_signal, phba->cgn_reg_fpin); lpfc_map_topology(phba, rd_config); lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "2003 cfg params Extents? %d " "XRI(B:%d M:%d), " "VPI(B:%d M:%d) " "VFI(B:%d M:%d) " "RPI(B:%d M:%d) " "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n", phba->sli4_hba.extents_in_use, phba->sli4_hba.max_cfg_param.xri_base, phba->sli4_hba.max_cfg_param.max_xri, phba->sli4_hba.max_cfg_param.vpi_base, phba->sli4_hba.max_cfg_param.max_vpi, phba->sli4_hba.max_cfg_param.vfi_base, phba->sli4_hba.max_cfg_param.max_vfi, phba->sli4_hba.max_cfg_param.rpi_base, phba->sli4_hba.max_cfg_param.max_rpi, phba->sli4_hba.max_cfg_param.max_fcfi, phba->sli4_hba.max_cfg_param.max_eq, phba->sli4_hba.max_cfg_param.max_cq, phba->sli4_hba.max_cfg_param.max_wq, phba->sli4_hba.max_cfg_param.max_rq, phba->lmt); /* * Calculate queue resources based on how * many WQ/CQ/EQs are available. */ qmin = phba->sli4_hba.max_cfg_param.max_wq; if (phba->sli4_hba.max_cfg_param.max_cq < qmin) qmin = phba->sli4_hba.max_cfg_param.max_cq; /* * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and * the remainder can be used for NVME / FCP. */ qmin -= 4; if (phba->sli4_hba.max_cfg_param.max_eq < qmin) qmin = phba->sli4_hba.max_cfg_param.max_eq; /* Check to see if there is enough for default cfg */ if ((phba->cfg_irq_chann > qmin) || (phba->cfg_hdw_queue > qmin)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2005 Reducing Queues - " "FW resource limitation: " "WQ %d CQ %d EQ %d: min %d: " "IRQ %d HDWQ %d\n", phba->sli4_hba.max_cfg_param.max_wq, phba->sli4_hba.max_cfg_param.max_cq, phba->sli4_hba.max_cfg_param.max_eq, qmin, phba->cfg_irq_chann, phba->cfg_hdw_queue); if (phba->cfg_irq_chann > qmin) phba->cfg_irq_chann = qmin; if (phba->cfg_hdw_queue > qmin) phba->cfg_hdw_queue = qmin; } } if (rc) goto read_cfg_out; /* Update link speed if forced link speed is supported */ if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { forced_link_speed = bf_get(lpfc_mbx_rd_conf_link_speed, rd_config); if (forced_link_speed) { phba->hba_flag |= HBA_FORCED_LINK_SPEED; switch (forced_link_speed) { case LINK_SPEED_1G: phba->cfg_link_speed = LPFC_USER_LINK_SPEED_1G; break; case LINK_SPEED_2G: phba->cfg_link_speed = LPFC_USER_LINK_SPEED_2G; break; case LINK_SPEED_4G: phba->cfg_link_speed = LPFC_USER_LINK_SPEED_4G; break; case LINK_SPEED_8G: phba->cfg_link_speed = LPFC_USER_LINK_SPEED_8G; break; case LINK_SPEED_10G: phba->cfg_link_speed = LPFC_USER_LINK_SPEED_10G; break; case LINK_SPEED_16G: phba->cfg_link_speed = LPFC_USER_LINK_SPEED_16G; break; case LINK_SPEED_32G: phba->cfg_link_speed = LPFC_USER_LINK_SPEED_32G; break; case LINK_SPEED_64G: phba->cfg_link_speed = LPFC_USER_LINK_SPEED_64G; break; case 0xffff: phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0047 Unrecognized link " "speed : %d\n", forced_link_speed); phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; } } } /* Reset the DFT_HBA_Q_DEPTH to the max xri */ length = phba->sli4_hba.max_cfg_param.max_xri - lpfc_sli4_get_els_iocb_cnt(phba); if (phba->cfg_hba_queue_depth > length) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "3361 HBA queue depth changed from %d to %d\n", phba->cfg_hba_queue_depth, length); phba->cfg_hba_queue_depth = length; } if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < LPFC_SLI_INTF_IF_TYPE_2) goto read_cfg_out; /* get the pf# and vf# for SLI4 if_type 2 port */ length = (sizeof(struct lpfc_mbx_get_func_cfg) - sizeof(struct lpfc_sli4_cfg_mhdr)); lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON, LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG, length, LPFC_SLI4_MBX_EMBED); rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); shdr = (union lpfc_sli4_cfg_shdr *) &pmb->u.mqe.un.sli4_config.header.cfg_shdr; shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); if (rc2 || shdr_status || shdr_add_status) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3026 Mailbox failed , mbxCmd x%x " "GET_FUNCTION_CONFIG, mbxStatus x%x\n", bf_get(lpfc_mqe_command, &pmb->u.mqe), bf_get(lpfc_mqe_status, &pmb->u.mqe)); goto read_cfg_out; } /* search for fc_fcoe resrouce descriptor */ get_func_cfg = &pmb->u.mqe.un.get_func_cfg; pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0]; desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0; length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc); if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD) length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH; else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH) goto read_cfg_out; for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) { desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i); if (LPFC_RSRC_DESC_TYPE_FCFCOE == bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) { phba->sli4_hba.iov.pf_number = bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc); phba->sli4_hba.iov.vf_number = bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc); break; } } if (i < LPFC_RSRC_DESC_MAX_NUM) lpfc_printf_log(phba, KERN_INFO, LOG_SLI, "3027 GET_FUNCTION_CONFIG: pf_number:%d, " "vf_number:%d\n", phba->sli4_hba.iov.pf_number, phba->sli4_hba.iov.vf_number); else lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3028 GET_FUNCTION_CONFIG: failed to find " "Resource Descriptor:x%x\n", LPFC_RSRC_DESC_TYPE_FCFCOE); read_cfg_out: mempool_free(pmb, phba->mbox_mem_pool); return rc; } /** * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to setup the port-side endian order when * the port if_type is 0. This routine has no function for other * if_types. * * Return codes * 0 - successful * -ENOMEM - No available memory * -EIO - The mailbox failed to complete successfully. **/ static int lpfc_setup_endian_order(struct lpfc_hba *phba) { LPFC_MBOXQ_t *mboxq; uint32_t if_type, rc = 0; uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, HOST_ENDIAN_HIGH_WORD1}; if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); switch (if_type) { case LPFC_SLI_INTF_IF_TYPE_0: mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!mboxq) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0492 Unable to allocate memory for " "issuing SLI_CONFIG_SPECIAL mailbox " "command\n"); return -ENOMEM; } /* * The SLI4_CONFIG_SPECIAL mailbox command requires the first * two words to contain special data values and no other data. */ memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); if (rc != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0493 SLI_CONFIG_SPECIAL mailbox " "failed with status x%x\n", rc); rc = -EIO; } mempool_free(mboxq, phba->mbox_mem_pool); break; case LPFC_SLI_INTF_IF_TYPE_6: case LPFC_SLI_INTF_IF_TYPE_2: case LPFC_SLI_INTF_IF_TYPE_1: default: break; } return rc; } /** * lpfc_sli4_queue_verify - Verify and update EQ counts * @phba: pointer to lpfc hba data structure. * * This routine is invoked to check the user settable queue counts for EQs. * After this routine is called the counts will be set to valid values that * adhere to the constraints of the system's interrupt vectors and the port's * queue resources. * * Return codes * 0 - successful * -ENOMEM - No available memory **/ static int lpfc_sli4_queue_verify(struct lpfc_hba *phba) { /* * Sanity check for configured queue parameters against the run-time * device parameters */ if (phba->nvmet_support) { if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq) phba->cfg_nvmet_mrq = phba->cfg_hdw_queue; if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX) phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX; } lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n", phba->cfg_hdw_queue, phba->cfg_irq_chann, phba->cfg_nvmet_mrq); /* Get EQ depth from module parameter, fake the default for now */ phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; /* Get CQ depth from module parameter, fake the default for now */ phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; return 0; } static int lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx) { struct lpfc_queue *qdesc; u32 wqesize; int cpu; cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); /* Create Fast Path IO CQs */ if (phba->enab_exp_wqcq_pages) /* Increase the CQ size when WQEs contain an embedded cdb */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, phba->sli4_hba.cq_esize, LPFC_CQE_EXP_COUNT, cpu); else qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.cq_esize, phba->sli4_hba.cq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0499 Failed allocate fast-path IO CQ (%d)\n", idx); return 1; } qdesc->qe_valid = 1; qdesc->hdwq = idx; qdesc->chann = cpu; phba->sli4_hba.hdwq[idx].io_cq = qdesc; /* Create Fast Path IO WQs */ if (phba->enab_exp_wqcq_pages) { /* Increase the WQ size when WQEs contain an embedded cdb */ wqesize = (phba->fcp_embed_io) ? LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, wqesize, LPFC_WQE_EXP_COUNT, cpu); } else qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.wq_esize, phba->sli4_hba.wq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0503 Failed allocate fast-path IO WQ (%d)\n", idx); return 1; } qdesc->hdwq = idx; qdesc->chann = cpu; phba->sli4_hba.hdwq[idx].io_wq = qdesc; list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); return 0; } /** * lpfc_sli4_queue_create - Create all the SLI4 queues * @phba: pointer to lpfc hba data structure. * * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA * operation. For each SLI4 queue type, the parameters such as queue entry * count (queue depth) shall be taken from the module parameter. For now, * we just use some constant number as place holder. * * Return codes * 0 - successful * -ENOMEM - No availble memory * -EIO - The mailbox failed to complete successfully. **/ int lpfc_sli4_queue_create(struct lpfc_hba *phba) { struct lpfc_queue *qdesc; int idx, cpu, eqcpu; struct lpfc_sli4_hdw_queue *qp; struct lpfc_vector_map_info *cpup; struct lpfc_vector_map_info *eqcpup; struct lpfc_eq_intr_info *eqi; /* * Create HBA Record arrays. * Both NVME and FCP will share that same vectors / EQs */ phba->sli4_hba.mq_esize = LPFC_MQE_SIZE; phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT; phba->sli4_hba.wq_esize = LPFC_WQE_SIZE; phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT; phba->sli4_hba.rq_esize = LPFC_RQE_SIZE; phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT; phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; if (!phba->sli4_hba.hdwq) { phba->sli4_hba.hdwq = kcalloc( phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue), GFP_KERNEL); if (!phba->sli4_hba.hdwq) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6427 Failed allocate memory for " "fast-path Hardware Queue array\n"); goto out_error; } /* Prepare hardware queues to take IO buffers */ for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { qp = &phba->sli4_hba.hdwq[idx]; spin_lock_init(&qp->io_buf_list_get_lock); spin_lock_init(&qp->io_buf_list_put_lock); INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); qp->get_io_bufs = 0; qp->put_io_bufs = 0; qp->total_io_bufs = 0; spin_lock_init(&qp->abts_io_buf_list_lock); INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list); qp->abts_scsi_io_bufs = 0; qp->abts_nvme_io_bufs = 0; INIT_LIST_HEAD(&qp->sgl_list); INIT_LIST_HEAD(&qp->cmd_rsp_buf_list); spin_lock_init(&qp->hdwq_lock); } } if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { if (phba->nvmet_support) { phba->sli4_hba.nvmet_cqset = kcalloc( phba->cfg_nvmet_mrq, sizeof(struct lpfc_queue *), GFP_KERNEL); if (!phba->sli4_hba.nvmet_cqset) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3121 Fail allocate memory for " "fast-path CQ set array\n"); goto out_error; } phba->sli4_hba.nvmet_mrq_hdr = kcalloc( phba->cfg_nvmet_mrq, sizeof(struct lpfc_queue *), GFP_KERNEL); if (!phba->sli4_hba.nvmet_mrq_hdr) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3122 Fail allocate memory for " "fast-path RQ set hdr array\n"); goto out_error; } phba->sli4_hba.nvmet_mrq_data = kcalloc( phba->cfg_nvmet_mrq, sizeof(struct lpfc_queue *), GFP_KERNEL); if (!phba->sli4_hba.nvmet_mrq_data) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3124 Fail allocate memory for " "fast-path RQ set data array\n"); goto out_error; } } } INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); /* Create HBA Event Queues (EQs) */ for_each_present_cpu(cpu) { /* We only want to create 1 EQ per vector, even though * multiple CPUs might be using that vector. so only * selects the CPUs that are LPFC_CPU_FIRST_IRQ. */ cpup = &phba->sli4_hba.cpu_map[cpu]; if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) continue; /* Get a ptr to the Hardware Queue associated with this CPU */ qp = &phba->sli4_hba.hdwq[cpup->hdwq]; /* Allocate an EQ */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.eq_esize, phba->sli4_hba.eq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0497 Failed allocate EQ (%d)\n", cpup->hdwq); goto out_error; } qdesc->qe_valid = 1; qdesc->hdwq = cpup->hdwq; qdesc->chann = cpu; /* First CPU this EQ is affinitized to */ qdesc->last_cpu = qdesc->chann; /* Save the allocated EQ in the Hardware Queue */ qp->hba_eq = qdesc; eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu); list_add(&qdesc->cpu_list, &eqi->list); } /* Now we need to populate the other Hardware Queues, that share * an IRQ vector, with the associated EQ ptr. */ for_each_present_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; /* Check for EQ already allocated in previous loop */ if (cpup->flag & LPFC_CPU_FIRST_IRQ) continue; /* Check for multiple CPUs per hdwq */ qp = &phba->sli4_hba.hdwq[cpup->hdwq]; if (qp->hba_eq) continue; /* We need to share an EQ for this hdwq */ eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ); eqcpup = &phba->sli4_hba.cpu_map[eqcpu]; qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq; } /* Allocate IO Path SLI4 CQ/WQs */ for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { if (lpfc_alloc_io_wq_cq(phba, idx)) goto out_error; } if (phba->nvmet_support) { for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.cq_esize, phba->sli4_hba.cq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3142 Failed allocate NVME " "CQ Set (%d)\n", idx); goto out_error; } qdesc->qe_valid = 1; qdesc->hdwq = idx; qdesc->chann = cpu; phba->sli4_hba.nvmet_cqset[idx] = qdesc; } } /* * Create Slow Path Completion Queues (CQs) */ cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ); /* Create slow-path Mailbox Command Complete Queue */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.cq_esize, phba->sli4_hba.cq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0500 Failed allocate slow-path mailbox CQ\n"); goto out_error; } qdesc->qe_valid = 1; phba->sli4_hba.mbx_cq = qdesc; /* Create slow-path ELS Complete Queue */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.cq_esize, phba->sli4_hba.cq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0501 Failed allocate slow-path ELS CQ\n"); goto out_error; } qdesc->qe_valid = 1; qdesc->chann = cpu; phba->sli4_hba.els_cq = qdesc; /* * Create Slow Path Work Queues (WQs) */ /* Create Mailbox Command Queue */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.mq_esize, phba->sli4_hba.mq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0505 Failed allocate slow-path MQ\n"); goto out_error; } qdesc->chann = cpu; phba->sli4_hba.mbx_wq = qdesc; /* * Create ELS Work Queues */ /* Create slow-path ELS Work Queue */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.wq_esize, phba->sli4_hba.wq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0504 Failed allocate slow-path ELS WQ\n"); goto out_error; } qdesc->chann = cpu; phba->sli4_hba.els_wq = qdesc; list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { /* Create NVME LS Complete Queue */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.cq_esize, phba->sli4_hba.cq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6079 Failed allocate NVME LS CQ\n"); goto out_error; } qdesc->chann = cpu; qdesc->qe_valid = 1; phba->sli4_hba.nvmels_cq = qdesc; /* Create NVME LS Work Queue */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.wq_esize, phba->sli4_hba.wq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6080 Failed allocate NVME LS WQ\n"); goto out_error; } qdesc->chann = cpu; phba->sli4_hba.nvmels_wq = qdesc; list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); } /* * Create Receive Queue (RQ) */ /* Create Receive Queue for header */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.rq_esize, phba->sli4_hba.rq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0506 Failed allocate receive HRQ\n"); goto out_error; } phba->sli4_hba.hdr_rq = qdesc; /* Create Receive Queue for data */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.rq_esize, phba->sli4_hba.rq_ecount, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0507 Failed allocate receive DRQ\n"); goto out_error; } phba->sli4_hba.dat_rq = qdesc; if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && phba->nvmet_support) { for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); /* Create NVMET Receive Queue for header */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.rq_esize, LPFC_NVMET_RQE_DEF_COUNT, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3146 Failed allocate " "receive HRQ\n"); goto out_error; } qdesc->hdwq = idx; phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc; /* Only needed for header of RQ pair */ qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp), GFP_KERNEL, cpu_to_node(cpu)); if (qdesc->rqbp == NULL) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6131 Failed allocate " "Header RQBP\n"); goto out_error; } /* Put list in known state in case driver load fails. */ INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list); /* Create NVMET Receive Queue for data */ qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, phba->sli4_hba.rq_esize, LPFC_NVMET_RQE_DEF_COUNT, cpu); if (!qdesc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3156 Failed allocate " "receive DRQ\n"); goto out_error; } qdesc->hdwq = idx; phba->sli4_hba.nvmet_mrq_data[idx] = qdesc; } } /* Clear NVME stats */ if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0, sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat)); } } /* Clear SCSI stats */ if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0, sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat)); } } return 0; out_error: lpfc_sli4_queue_destroy(phba); return -ENOMEM; } static inline void __lpfc_sli4_release_queue(struct lpfc_queue **qp) { if (*qp != NULL) { lpfc_sli4_queue_free(*qp); *qp = NULL; } } static inline void lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max) { int idx; if (*qs == NULL) return; for (idx = 0; idx < max; idx++) __lpfc_sli4_release_queue(&(*qs)[idx]); kfree(*qs); *qs = NULL; } static inline void lpfc_sli4_release_hdwq(struct lpfc_hba *phba) { struct lpfc_sli4_hdw_queue *hdwq; struct lpfc_queue *eq; uint32_t idx; hdwq = phba->sli4_hba.hdwq; /* Loop thru all Hardware Queues */ for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { /* Free the CQ/WQ corresponding to the Hardware Queue */ lpfc_sli4_queue_free(hdwq[idx].io_cq); lpfc_sli4_queue_free(hdwq[idx].io_wq); hdwq[idx].hba_eq = NULL; hdwq[idx].io_cq = NULL; hdwq[idx].io_wq = NULL; if (phba->cfg_xpsgl && !phba->nvmet_support) lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]); lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]); } /* Loop thru all IRQ vectors */ for (idx = 0; idx < phba->cfg_irq_chann; idx++) { /* Free the EQ corresponding to the IRQ vector */ eq = phba->sli4_hba.hba_eq_hdl[idx].eq; lpfc_sli4_queue_free(eq); phba->sli4_hba.hba_eq_hdl[idx].eq = NULL; } } /** * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues * @phba: pointer to lpfc hba data structure. * * This routine is invoked to release all the SLI4 queues with the FCoE HBA * operation. * * Return codes * 0 - successful * -ENOMEM - No available memory * -EIO - The mailbox failed to complete successfully. **/ void lpfc_sli4_queue_destroy(struct lpfc_hba *phba) { /* * Set FREE_INIT before beginning to free the queues. * Wait until the users of queues to acknowledge to * release queues by clearing FREE_WAIT. */ spin_lock_irq(&phba->hbalock); phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT; while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) { spin_unlock_irq(&phba->hbalock); msleep(20); spin_lock_irq(&phba->hbalock); } spin_unlock_irq(&phba->hbalock); lpfc_sli4_cleanup_poll_list(phba); /* Release HBA eqs */ if (phba->sli4_hba.hdwq) lpfc_sli4_release_hdwq(phba); if (phba->nvmet_support) { lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset, phba->cfg_nvmet_mrq); lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr, phba->cfg_nvmet_mrq); lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data, phba->cfg_nvmet_mrq); } /* Release mailbox command work queue */ __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq); /* Release ELS work queue */ __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq); /* Release ELS work queue */ __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq); /* Release unsolicited receive queue */ __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq); __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq); /* Release ELS complete queue */ __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq); /* Release NVME LS complete queue */ __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq); /* Release mailbox command complete queue */ __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq); /* Everything on this list has been freed */ INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); /* Done with freeing the queues */ spin_lock_irq(&phba->hbalock); phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT; spin_unlock_irq(&phba->hbalock); } int lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq) { struct lpfc_rqb *rqbp; struct lpfc_dmabuf *h_buf; struct rqb_dmabuf *rqb_buffer; rqbp = rq->rqbp; while (!list_empty(&rqbp->rqb_buffer_list)) { list_remove_head(&rqbp->rqb_buffer_list, h_buf, struct lpfc_dmabuf, list); rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf); (rqbp->rqb_free_buffer)(phba, rqb_buffer); rqbp->buffer_count--; } return 1; } static int lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq, struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map, int qidx, uint32_t qtype) { struct lpfc_sli_ring *pring; int rc; if (!eq || !cq || !wq) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6085 Fast-path %s (%d) not allocated\n", ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx); return -ENOMEM; } /* create the Cq first */ rc = lpfc_cq_create(phba, cq, eq, (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6086 Failed setup of CQ (%d), rc = 0x%x\n", qidx, (uint32_t)rc); return rc; } if (qtype != LPFC_MBOX) { /* Setup cq_map for fast lookup */ if (cq_map) *cq_map = cq->queue_id; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n", qidx, cq->queue_id, qidx, eq->queue_id); /* create the wq */ rc = lpfc_wq_create(phba, wq, cq, qtype); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n", qidx, (uint32_t)rc); /* no need to tear down cq - caller will do so */ return rc; } /* Bind this CQ/WQ to the NVME ring */ pring = wq->pring; pring->sli.sli4.wqp = (void *)wq; cq->pring = pring; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n", qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id); } else { rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0539 Failed setup of slow-path MQ: " "rc = 0x%x\n", rc); /* no need to tear down cq - caller will do so */ return rc; } lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n", phba->sli4_hba.mbx_wq->queue_id, phba->sli4_hba.mbx_cq->queue_id); } return 0; } /** * lpfc_setup_cq_lookup - Setup the CQ lookup table * @phba: pointer to lpfc hba data structure. * * This routine will populate the cq_lookup table by all * available CQ queue_id's. **/ static void lpfc_setup_cq_lookup(struct lpfc_hba *phba) { struct lpfc_queue *eq, *childq; int qidx; memset(phba->sli4_hba.cq_lookup, 0, (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1))); /* Loop thru all IRQ vectors */ for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { /* Get the EQ corresponding to the IRQ vector */ eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; if (!eq) continue; /* Loop through all CQs associated with that EQ */ list_for_each_entry(childq, &eq->child_list, list) { if (childq->queue_id > phba->sli4_hba.cq_max) continue; if (childq->subtype == LPFC_IO) phba->sli4_hba.cq_lookup[childq->queue_id] = childq; } } } /** * lpfc_sli4_queue_setup - Set up all the SLI4 queues * @phba: pointer to lpfc hba data structure. * * This routine is invoked to set up all the SLI4 queues for the FCoE HBA * operation. * * Return codes * 0 - successful * -ENOMEM - No available memory * -EIO - The mailbox failed to complete successfully. **/ int lpfc_sli4_queue_setup(struct lpfc_hba *phba) { uint32_t shdr_status, shdr_add_status; union lpfc_sli4_cfg_shdr *shdr; struct lpfc_vector_map_info *cpup; struct lpfc_sli4_hdw_queue *qp; LPFC_MBOXQ_t *mboxq; int qidx, cpu; uint32_t length, usdelay; int rc = -ENOMEM; /* Check for dual-ULP support */ mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!mboxq) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3249 Unable to allocate memory for " "QUERY_FW_CFG mailbox command\n"); return -ENOMEM; } length = (sizeof(struct lpfc_mbx_query_fw_config) - sizeof(struct lpfc_sli4_cfg_mhdr)); lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, LPFC_MBOX_OPCODE_QUERY_FW_CFG, length, LPFC_SLI4_MBX_EMBED); rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); shdr = (union lpfc_sli4_cfg_shdr *) &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); if (shdr_status || shdr_add_status || rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3250 QUERY_FW_CFG mailbox failed with status " "x%x add_status x%x, mbx status x%x\n", shdr_status, shdr_add_status, rc); mempool_free(mboxq, phba->mbox_mem_pool); rc = -ENXIO; goto out_error; } phba->sli4_hba.fw_func_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode; phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode; phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode; phba->sli4_hba.physical_port = mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, " "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode, phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode); mempool_free(mboxq, phba->mbox_mem_pool); /* * Set up HBA Event Queues (EQs) */ qp = phba->sli4_hba.hdwq; /* Set up HBA event queue */ if (!qp) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3147 Fast-path EQs not allocated\n"); rc = -ENOMEM; goto out_error; } /* Loop thru all IRQ vectors */ for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { /* Create HBA Event Queues (EQs) in order */ for_each_present_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; /* Look for the CPU thats using that vector with * LPFC_CPU_FIRST_IRQ set. */ if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) continue; if (qidx != cpup->eq) continue; /* Create an EQ for that vector */ rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq, phba->cfg_fcp_imax); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0523 Failed setup of fast-path" " EQ (%d), rc = 0x%x\n", cpup->eq, (uint32_t)rc); goto out_destroy; } /* Save the EQ for that vector in the hba_eq_hdl */ phba->sli4_hba.hba_eq_hdl[cpup->eq].eq = qp[cpup->hdwq].hba_eq; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "2584 HBA EQ setup: queue[%d]-id=%d\n", cpup->eq, qp[cpup->hdwq].hba_eq->queue_id); } } /* Loop thru all Hardware Queues */ for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ); cpup = &phba->sli4_hba.cpu_map[cpu]; /* Create the CQ/WQ corresponding to the Hardware Queue */ rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, qp[qidx].io_cq, qp[qidx].io_wq, &phba->sli4_hba.hdwq[qidx].io_cq_map, qidx, LPFC_IO); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0535 Failed to setup fastpath " "IO WQ/CQ (%d), rc = 0x%x\n", qidx, (uint32_t)rc); goto out_destroy; } } /* * Set up Slow Path Complete Queues (CQs) */ /* Set up slow-path MBOX CQ/MQ */ if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0528 %s not allocated\n", phba->sli4_hba.mbx_cq ? "Mailbox WQ" : "Mailbox CQ"); rc = -ENOMEM; goto out_destroy; } rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, phba->sli4_hba.mbx_cq, phba->sli4_hba.mbx_wq, NULL, 0, LPFC_MBOX); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n", (uint32_t)rc); goto out_destroy; } if (phba->nvmet_support) { if (!phba->sli4_hba.nvmet_cqset) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3165 Fast-path NVME CQ Set " "array not allocated\n"); rc = -ENOMEM; goto out_destroy; } if (phba->cfg_nvmet_mrq > 1) { rc = lpfc_cq_create_set(phba, phba->sli4_hba.nvmet_cqset, qp, LPFC_WCQ, LPFC_NVMET); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3164 Failed setup of NVME CQ " "Set, rc = 0x%x\n", (uint32_t)rc); goto out_destroy; } } else { /* Set up NVMET Receive Complete Queue */ rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0], qp[0].hba_eq, LPFC_WCQ, LPFC_NVMET); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6089 Failed setup NVMET CQ: " "rc = 0x%x\n", (uint32_t)rc); goto out_destroy; } phba->sli4_hba.nvmet_cqset[0]->chann = 0; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "6090 NVMET CQ setup: cq-id=%d, " "parent eq-id=%d\n", phba->sli4_hba.nvmet_cqset[0]->queue_id, qp[0].hba_eq->queue_id); } } /* Set up slow-path ELS WQ/CQ */ if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0530 ELS %s not allocated\n", phba->sli4_hba.els_cq ? "WQ" : "CQ"); rc = -ENOMEM; goto out_destroy; } rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, phba->sli4_hba.els_cq, phba->sli4_hba.els_wq, NULL, 0, LPFC_ELS); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n", (uint32_t)rc); goto out_destroy; } lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n", phba->sli4_hba.els_wq->queue_id, phba->sli4_hba.els_cq->queue_id); if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { /* Set up NVME LS Complete Queue */ if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6091 LS %s not allocated\n", phba->sli4_hba.nvmels_cq ? "WQ" : "CQ"); rc = -ENOMEM; goto out_destroy; } rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, phba->sli4_hba.nvmels_cq, phba->sli4_hba.nvmels_wq, NULL, 0, LPFC_NVME_LS); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0526 Failed setup of NVVME LS WQ/CQ: " "rc = 0x%x\n", (uint32_t)rc); goto out_destroy; } lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "6096 ELS WQ setup: wq-id=%d, " "parent cq-id=%d\n", phba->sli4_hba.nvmels_wq->queue_id, phba->sli4_hba.nvmels_cq->queue_id); } /* * Create NVMET Receive Queue (RQ) */ if (phba->nvmet_support) { if ((!phba->sli4_hba.nvmet_cqset) || (!phba->sli4_hba.nvmet_mrq_hdr) || (!phba->sli4_hba.nvmet_mrq_data)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6130 MRQ CQ Queues not " "allocated\n"); rc = -ENOMEM; goto out_destroy; } if (phba->cfg_nvmet_mrq > 1) { rc = lpfc_mrq_create(phba, phba->sli4_hba.nvmet_mrq_hdr, phba->sli4_hba.nvmet_mrq_data, phba->sli4_hba.nvmet_cqset, LPFC_NVMET); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6098 Failed setup of NVMET " "MRQ: rc = 0x%x\n", (uint32_t)rc); goto out_destroy; } } else { rc = lpfc_rq_create(phba, phba->sli4_hba.nvmet_mrq_hdr[0], phba->sli4_hba.nvmet_mrq_data[0], phba->sli4_hba.nvmet_cqset[0], LPFC_NVMET); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6057 Failed setup of NVMET " "Receive Queue: rc = 0x%x\n", (uint32_t)rc); goto out_destroy; } lpfc_printf_log( phba, KERN_INFO, LOG_INIT, "6099 NVMET RQ setup: hdr-rq-id=%d, " "dat-rq-id=%d parent cq-id=%d\n", phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id, phba->sli4_hba.nvmet_mrq_data[0]->queue_id, phba->sli4_hba.nvmet_cqset[0]->queue_id); } } if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0540 Receive Queue not allocated\n"); rc = -ENOMEM; goto out_destroy; } rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq, phba->sli4_hba.els_cq, LPFC_USOL); if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0541 Failed setup of Receive Queue: " "rc = 0x%x\n", (uint32_t)rc); goto out_destroy; } lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d " "parent cq-id=%d\n", phba->sli4_hba.hdr_rq->queue_id, phba->sli4_hba.dat_rq->queue_id, phba->sli4_hba.els_cq->queue_id); if (phba->cfg_fcp_imax) usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax; else usdelay = 0; for (qidx = 0; qidx < phba->cfg_irq_chann; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT, usdelay); if (phba->sli4_hba.cq_max) { kfree(phba->sli4_hba.cq_lookup); phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1), sizeof(struct lpfc_queue *), GFP_KERNEL); if (!phba->sli4_hba.cq_lookup) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0549 Failed setup of CQ Lookup table: " "size 0x%x\n", phba->sli4_hba.cq_max); rc = -ENOMEM; goto out_destroy; } lpfc_setup_cq_lookup(phba); } return 0; out_destroy: lpfc_sli4_queue_unset(phba); out_error: return rc; } /** * lpfc_sli4_queue_unset - Unset all the SLI4 queues * @phba: pointer to lpfc hba data structure. * * This routine is invoked to unset all the SLI4 queues with the FCoE HBA * operation. * * Return codes * 0 - successful * -ENOMEM - No available memory * -EIO - The mailbox failed to complete successfully. **/ void lpfc_sli4_queue_unset(struct lpfc_hba *phba) { struct lpfc_sli4_hdw_queue *qp; struct lpfc_queue *eq; int qidx; /* Unset mailbox command work queue */ if (phba->sli4_hba.mbx_wq) lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq); /* Unset NVME LS work queue */ if (phba->sli4_hba.nvmels_wq) lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq); /* Unset ELS work queue */ if (phba->sli4_hba.els_wq) lpfc_wq_destroy(phba, phba->sli4_hba.els_wq); /* Unset unsolicited receive queue */ if (phba->sli4_hba.hdr_rq) lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq); /* Unset mailbox command complete queue */ if (phba->sli4_hba.mbx_cq) lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq); /* Unset ELS complete queue */ if (phba->sli4_hba.els_cq) lpfc_cq_destroy(phba, phba->sli4_hba.els_cq); /* Unset NVME LS complete queue */ if (phba->sli4_hba.nvmels_cq) lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq); if (phba->nvmet_support) { /* Unset NVMET MRQ queue */ if (phba->sli4_hba.nvmet_mrq_hdr) { for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) lpfc_rq_destroy( phba, phba->sli4_hba.nvmet_mrq_hdr[qidx], phba->sli4_hba.nvmet_mrq_data[qidx]); } /* Unset NVMET CQ Set complete queue */ if (phba->sli4_hba.nvmet_cqset) { for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) lpfc_cq_destroy( phba, phba->sli4_hba.nvmet_cqset[qidx]); } } /* Unset fast-path SLI4 queues */ if (phba->sli4_hba.hdwq) { /* Loop thru all Hardware Queues */ for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { /* Destroy the CQ/WQ corresponding to Hardware Queue */ qp = &phba->sli4_hba.hdwq[qidx]; lpfc_wq_destroy(phba, qp->io_wq); lpfc_cq_destroy(phba, qp->io_cq); } /* Loop thru all IRQ vectors */ for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { /* Destroy the EQ corresponding to the IRQ vector */ eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; lpfc_eq_destroy(phba, eq); } } kfree(phba->sli4_hba.cq_lookup); phba->sli4_hba.cq_lookup = NULL; phba->sli4_hba.cq_max = 0; } /** * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool * @phba: pointer to lpfc hba data structure. * * This routine is invoked to allocate and set up a pool of completion queue * events. The body of the completion queue event is a completion queue entry * CQE. For now, this pool is used for the interrupt service routine to queue * the following HBA completion queue events for the worker thread to process: * - Mailbox asynchronous events * - Receive queue completion unsolicited events * Later, this can be used for all the slow-path events. * * Return codes * 0 - successful * -ENOMEM - No available memory **/ static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba) { struct lpfc_cq_event *cq_event; int i; for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) { cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL); if (!cq_event) goto out_pool_create_fail; list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); } return 0; out_pool_create_fail: lpfc_sli4_cq_event_pool_destroy(phba); return -ENOMEM; } /** * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool * @phba: pointer to lpfc hba data structure. * * This routine is invoked to free the pool of completion queue events at * driver unload time. Note that, it is the responsibility of the driver * cleanup routine to free all the outstanding completion-queue events * allocated from this pool back into the pool before invoking this routine * to destroy the pool. **/ static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba) { struct lpfc_cq_event *cq_event, *next_cq_event; list_for_each_entry_safe(cq_event, next_cq_event, &phba->sli4_hba.sp_cqe_event_pool, list) { list_del(&cq_event->list); kfree(cq_event); } } /** * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool * @phba: pointer to lpfc hba data structure. * * This routine is the lock free version of the API invoked to allocate a * completion-queue event from the free pool. * * Return: Pointer to the newly allocated completion-queue event if successful * NULL otherwise. **/ struct lpfc_cq_event * __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) { struct lpfc_cq_event *cq_event = NULL; list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event, struct lpfc_cq_event, list); return cq_event; } /** * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool * @phba: pointer to lpfc hba data structure. * * This routine is the lock version of the API invoked to allocate a * completion-queue event from the free pool. * * Return: Pointer to the newly allocated completion-queue event if successful * NULL otherwise. **/ struct lpfc_cq_event * lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) { struct lpfc_cq_event *cq_event; unsigned long iflags; spin_lock_irqsave(&phba->hbalock, iflags); cq_event = __lpfc_sli4_cq_event_alloc(phba); spin_unlock_irqrestore(&phba->hbalock, iflags); return cq_event; } /** * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool * @phba: pointer to lpfc hba data structure. * @cq_event: pointer to the completion queue event to be freed. * * This routine is the lock free version of the API invoked to release a * completion-queue event back into the free pool. **/ void __lpfc_sli4_cq_event_release(struct lpfc_hba *phba, struct lpfc_cq_event *cq_event) { list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); } /** * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool * @phba: pointer to lpfc hba data structure. * @cq_event: pointer to the completion queue event to be freed. * * This routine is the lock version of the API invoked to release a * completion-queue event back into the free pool. **/ void lpfc_sli4_cq_event_release(struct lpfc_hba *phba, struct lpfc_cq_event *cq_event) { unsigned long iflags; spin_lock_irqsave(&phba->hbalock, iflags); __lpfc_sli4_cq_event_release(phba, cq_event); spin_unlock_irqrestore(&phba->hbalock, iflags); } /** * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool * @phba: pointer to lpfc hba data structure. * * This routine is to free all the pending completion-queue events to the * back into the free pool for device reset. **/ static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) { LIST_HEAD(cq_event_list); struct lpfc_cq_event *cq_event; unsigned long iflags; /* Retrieve all the pending WCQEs from pending WCQE lists */ /* Pending ELS XRI abort events */ spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, &cq_event_list); spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); /* Pending asynnc events */ spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, &cq_event_list); spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); while (!list_empty(&cq_event_list)) { list_remove_head(&cq_event_list, cq_event, struct lpfc_cq_event, list); lpfc_sli4_cq_event_release(phba, cq_event); } } /** * lpfc_pci_function_reset - Reset pci function. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to request a PCI function reset. It will destroys * all resources assigned to the PCI function which originates this request. * * Return codes * 0 - successful * -ENOMEM - No available memory * -EIO - The mailbox failed to complete successfully. **/ int lpfc_pci_function_reset(struct lpfc_hba *phba) { LPFC_MBOXQ_t *mboxq; uint32_t rc = 0, if_type; uint32_t shdr_status, shdr_add_status; uint32_t rdy_chk; uint32_t port_reset = 0; union lpfc_sli4_cfg_shdr *shdr; struct lpfc_register reg_data; uint16_t devid; if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); switch (if_type) { case LPFC_SLI_INTF_IF_TYPE_0: mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!mboxq) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0494 Unable to allocate memory for " "issuing SLI_FUNCTION_RESET mailbox " "command\n"); return -ENOMEM; } /* Setup PCI function reset mailbox-ioctl command */ lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, LPFC_SLI4_MBX_EMBED); rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); shdr = (union lpfc_sli4_cfg_shdr *) &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); mempool_free(mboxq, phba->mbox_mem_pool); if (shdr_status || shdr_add_status || rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0495 SLI_FUNCTION_RESET mailbox " "failed with status x%x add_status x%x," " mbx status x%x\n", shdr_status, shdr_add_status, rc); rc = -ENXIO; } break; case LPFC_SLI_INTF_IF_TYPE_2: case LPFC_SLI_INTF_IF_TYPE_6: wait: /* * Poll the Port Status Register and wait for RDY for * up to 30 seconds. If the port doesn't respond, treat * it as an error. */ for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) { if (lpfc_readl(phba->sli4_hba.u.if_type2. STATUSregaddr, ®_data.word0)) { rc = -ENODEV; goto out; } if (bf_get(lpfc_sliport_status_rdy, ®_data)) break; msleep(20); } if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { phba->work_status[0] = readl( phba->sli4_hba.u.if_type2.ERR1regaddr); phba->work_status[1] = readl( phba->sli4_hba.u.if_type2.ERR2regaddr); lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2890 Port not ready, port status reg " "0x%x error 1=0x%x, error 2=0x%x\n", reg_data.word0, phba->work_status[0], phba->work_status[1]); rc = -ENODEV; goto out; } if (bf_get(lpfc_sliport_status_pldv, ®_data)) lpfc_pldv_detect = true; if (!port_reset) { /* * Reset the port now */ reg_data.word0 = 0; bf_set(lpfc_sliport_ctrl_end, ®_data, LPFC_SLIPORT_LITTLE_ENDIAN); bf_set(lpfc_sliport_ctrl_ip, ®_data, LPFC_SLIPORT_INIT_PORT); writel(reg_data.word0, phba->sli4_hba.u.if_type2. CTRLregaddr); /* flush */ pci_read_config_word(phba->pcidev, PCI_DEVICE_ID, &devid); port_reset = 1; msleep(20); goto wait; } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { rc = -ENODEV; goto out; } break; case LPFC_SLI_INTF_IF_TYPE_1: default: break; } out: /* Catch the not-ready port failure after a port reset. */ if (rc) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3317 HBA not functional: IP Reset Failed " "try: echo fw_reset > board_mode\n"); rc = -ENODEV; } return rc; } /** * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to set up the PCI device memory space for device * with SLI-4 interface spec. * * Return codes * 0 - successful * other values - error **/ static int lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) { struct pci_dev *pdev = phba->pcidev; unsigned long bar0map_len, bar1map_len, bar2map_len; int error; uint32_t if_type; if (!pdev) return -ENODEV; /* Set the device DMA mask size */ error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); if (error) error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); if (error) return error; /* * The BARs and register set definitions and offset locations are * dependent on the if_type. */ if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &phba->sli4_hba.sli_intf.word0)) { return -ENODEV; } /* There is no SLI3 failback for SLI4 devices. */ if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) != LPFC_SLI_INTF_VALID) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "2894 SLI_INTF reg contents invalid " "sli_intf reg 0x%x\n", phba->sli4_hba.sli_intf.word0); return -ENODEV; } if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); /* * Get the bus address of SLI4 device Bar regions and the * number of bytes required by each mapping. The mapping of the * particular PCI BARs regions is dependent on the type of * SLI4 device. */ if (pci_resource_start(pdev, PCI_64BIT_BAR0)) { phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0); bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0); /* * Map SLI4 PCI Config Space Register base to a kernel virtual * addr */ phba->sli4_hba.conf_regs_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); if (!phba->sli4_hba.conf_regs_memmap_p) { dev_printk(KERN_ERR, &pdev->dev, "ioremap failed for SLI4 PCI config " "registers.\n"); return -ENODEV; } phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p; /* Set up BAR0 PCI config space register memory map */ lpfc_sli4_bar0_register_memmap(phba, if_type); } else { phba->pci_bar0_map = pci_resource_start(pdev, 1); bar0map_len = pci_resource_len(pdev, 1); if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { dev_printk(KERN_ERR, &pdev->dev, "FATAL - No BAR0 mapping for SLI4, if_type 2\n"); return -ENODEV; } phba->sli4_hba.conf_regs_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); if (!phba->sli4_hba.conf_regs_memmap_p) { dev_printk(KERN_ERR, &pdev->dev, "ioremap failed for SLI4 PCI config " "registers.\n"); return -ENODEV; } lpfc_sli4_bar0_register_memmap(phba, if_type); } if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { if (pci_resource_start(pdev, PCI_64BIT_BAR2)) { /* * Map SLI4 if type 0 HBA Control Register base to a * kernel virtual address and setup the registers. */ phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); phba->sli4_hba.ctrl_regs_memmap_p = ioremap(phba->pci_bar1_map, bar1map_len); if (!phba->sli4_hba.ctrl_regs_memmap_p) { dev_err(&pdev->dev, "ioremap failed for SLI4 HBA " "control registers.\n"); error = -ENOMEM; goto out_iounmap_conf; } phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p; lpfc_sli4_bar1_register_memmap(phba, if_type); } else { error = -ENOMEM; goto out_iounmap_conf; } } if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) && (pci_resource_start(pdev, PCI_64BIT_BAR2))) { /* * Map SLI4 if type 6 HBA Doorbell Register base to a kernel * virtual address and setup the registers. */ phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); phba->sli4_hba.drbl_regs_memmap_p = ioremap(phba->pci_bar1_map, bar1map_len); if (!phba->sli4_hba.drbl_regs_memmap_p) { dev_err(&pdev->dev, "ioremap failed for SLI4 HBA doorbell registers.\n"); error = -ENOMEM; goto out_iounmap_conf; } phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; lpfc_sli4_bar1_register_memmap(phba, if_type); } if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { if (pci_resource_start(pdev, PCI_64BIT_BAR4)) { /* * Map SLI4 if type 0 HBA Doorbell Register base to * a kernel virtual address and setup the registers. */ phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); phba->sli4_hba.drbl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); if (!phba->sli4_hba.drbl_regs_memmap_p) { dev_err(&pdev->dev, "ioremap failed for SLI4 HBA" " doorbell registers.\n"); error = -ENOMEM; goto out_iounmap_ctrl; } phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0); if (error) goto out_iounmap_all; } else { error = -ENOMEM; goto out_iounmap_ctrl; } } if (if_type == LPFC_SLI_INTF_IF_TYPE_6 && pci_resource_start(pdev, PCI_64BIT_BAR4)) { /* * Map SLI4 if type 6 HBA DPP Register base to a kernel * virtual address and setup the registers. */ phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); phba->sli4_hba.dpp_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); if (!phba->sli4_hba.dpp_regs_memmap_p) { dev_err(&pdev->dev, "ioremap failed for SLI4 HBA dpp registers.\n"); error = -ENOMEM; goto out_iounmap_all; } phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p; } /* Set up the EQ/CQ register handeling functions now */ switch (if_type) { case LPFC_SLI_INTF_IF_TYPE_0: case LPFC_SLI_INTF_IF_TYPE_2: phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db; phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db; break; case LPFC_SLI_INTF_IF_TYPE_6: phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db; phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db; break; default: break; } return 0; out_iounmap_all: if (phba->sli4_hba.drbl_regs_memmap_p) iounmap(phba->sli4_hba.drbl_regs_memmap_p); out_iounmap_ctrl: if (phba->sli4_hba.ctrl_regs_memmap_p) iounmap(phba->sli4_hba.ctrl_regs_memmap_p); out_iounmap_conf: iounmap(phba->sli4_hba.conf_regs_memmap_p); return error; } /** * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to unset the PCI device memory space for device * with SLI-4 interface spec. **/ static void lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) { uint32_t if_type; if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); switch (if_type) { case LPFC_SLI_INTF_IF_TYPE_0: iounmap(phba->sli4_hba.drbl_regs_memmap_p); iounmap(phba->sli4_hba.ctrl_regs_memmap_p); iounmap(phba->sli4_hba.conf_regs_memmap_p); break; case LPFC_SLI_INTF_IF_TYPE_2: iounmap(phba->sli4_hba.conf_regs_memmap_p); break; case LPFC_SLI_INTF_IF_TYPE_6: iounmap(phba->sli4_hba.drbl_regs_memmap_p); iounmap(phba->sli4_hba.conf_regs_memmap_p); if (phba->sli4_hba.dpp_regs_memmap_p) iounmap(phba->sli4_hba.dpp_regs_memmap_p); break; case LPFC_SLI_INTF_IF_TYPE_1: break; default: dev_printk(KERN_ERR, &phba->pcidev->dev, "FATAL - unsupported SLI4 interface type - %d\n", if_type); break; } } /** * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device * @phba: pointer to lpfc hba data structure. * * This routine is invoked to enable the MSI-X interrupt vectors to device * with SLI-3 interface specs. * * Return codes * 0 - successful * other values - error **/ static int lpfc_sli_enable_msix(struct lpfc_hba *phba) { int rc; LPFC_MBOXQ_t *pmb; /* Set up MSI-X multi-message vectors */ rc = pci_alloc_irq_vectors(phba->pcidev, LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX); if (rc < 0) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0420 PCI enable MSI-X failed (%d)\n", rc); goto vec_fail_out; } /* * Assign MSI-X vectors to interrupt handlers */ /* vector-0 is associated to slow-path handler */ rc = request_irq(pci_irq_vector(phba->pcidev, 0), &lpfc_sli_sp_intr_handler, 0, LPFC_SP_DRIVER_HANDLER_NAME, phba); if (rc) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0421 MSI-X slow-path request_irq failed " "(%d)\n", rc); goto msi_fail_out; } /* vector-1 is associated to fast-path handler */ rc = request_irq(pci_irq_vector(phba->pcidev, 1), &lpfc_sli_fp_intr_handler, 0, LPFC_FP_DRIVER_HANDLER_NAME, phba); if (rc) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0429 MSI-X fast-path request_irq failed " "(%d)\n", rc); goto irq_fail_out; } /* * Configure HBA MSI-X attention conditions to messages */ pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { rc = -ENOMEM; lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0474 Unable to allocate memory for issuing " "MBOX_CONFIG_MSI command\n"); goto mem_fail_out; } rc = lpfc_config_msi(phba, pmb); if (rc) goto mbx_fail_out; rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); if (rc != MBX_SUCCESS) { lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, "0351 Config MSI mailbox command failed, " "mbxCmd x%x, mbxStatus x%x\n", pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); goto mbx_fail_out; } /* Free memory allocated for mailbox command */ mempool_free(pmb, phba->mbox_mem_pool); return rc; mbx_fail_out: /* Free memory allocated for mailbox command */ mempool_free(pmb, phba->mbox_mem_pool); mem_fail_out: /* free the irq already requested */ free_irq(pci_irq_vector(phba->pcidev, 1), phba); irq_fail_out: /* free the irq already requested */ free_irq(pci_irq_vector(phba->pcidev, 0), phba); msi_fail_out: /* Unconfigure MSI-X capability structure */ pci_free_irq_vectors(phba->pcidev); vec_fail_out: return rc; } /** * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to enable the MSI interrupt mode to device with * SLI-3 interface spec. The kernel function pci_enable_msi() is called to * enable the MSI vector. The device driver is responsible for calling the * request_irq() to register MSI vector with a interrupt the handler, which * is done in this function. * * Return codes * 0 - successful * other values - error */ static int lpfc_sli_enable_msi(struct lpfc_hba *phba) { int rc; rc = pci_enable_msi(phba->pcidev); if (!rc) lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0012 PCI enable MSI mode success.\n"); else { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0471 PCI enable MSI mode failed (%d)\n", rc); return rc; } rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 0, LPFC_DRIVER_NAME, phba); if (rc) { pci_disable_msi(phba->pcidev); lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0478 MSI request_irq failed (%d)\n", rc); } return rc; } /** * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device. * @phba: pointer to lpfc hba data structure. * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). * * This routine is invoked to enable device interrupt and associate driver's * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface * spec. Depends on the interrupt mode configured to the driver, the driver * will try to fallback from the configured interrupt mode to an interrupt * mode which is supported by the platform, kernel, and device in the order * of: * MSI-X -> MSI -> IRQ. * * Return codes * 0 - successful * other values - error **/ static uint32_t lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) { uint32_t intr_mode = LPFC_INTR_ERROR; int retval; /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */ retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3); if (retval) return intr_mode; phba->hba_flag &= ~HBA_NEEDS_CFG_PORT; if (cfg_mode == 2) { /* Now, try to enable MSI-X interrupt mode */ retval = lpfc_sli_enable_msix(phba); if (!retval) { /* Indicate initialization to MSI-X mode */ phba->intr_type = MSIX; intr_mode = 2; } } /* Fallback to MSI if MSI-X initialization failed */ if (cfg_mode >= 1 && phba->intr_type == NONE) { retval = lpfc_sli_enable_msi(phba); if (!retval) { /* Indicate initialization to MSI mode */ phba->intr_type = MSI; intr_mode = 1; } } /* Fallback to INTx if both MSI-X/MSI initalization failed */ if (phba->intr_type == NONE) { retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, IRQF_SHARED, LPFC_DRIVER_NAME, phba); if (!retval) { /* Indicate initialization to INTx mode */ phba->intr_type = INTx; intr_mode = 0; } } return intr_mode; } /** * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device. * @phba: pointer to lpfc hba data structure. * * This routine is invoked to disable device interrupt and disassociate the * driver's interrupt handler(s) from interrupt vector(s) to device with * SLI-3 interface spec. Depending on the interrupt mode, the driver will * release the interrupt vector(s) for the message signaled interrupt. **/ static void lpfc_sli_disable_intr(struct lpfc_hba *phba) { int nr_irqs, i; if (phba->intr_type == MSIX) nr_irqs = LPFC_MSIX_VECTORS; else nr_irqs = 1; for (i = 0; i < nr_irqs; i++) free_irq(pci_irq_vector(phba->pcidev, i), phba); pci_free_irq_vectors(phba->pcidev); /* Reset interrupt management states */ phba->intr_type = NONE; phba->sli.slistat.sli_intr = 0; } /** * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue * @phba: pointer to lpfc hba data structure. * @id: EQ vector index or Hardware Queue index * @match: LPFC_FIND_BY_EQ = match by EQ * LPFC_FIND_BY_HDWQ = match by Hardware Queue * Return the CPU that matches the selection criteria */ static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match) { struct lpfc_vector_map_info *cpup; int cpu; /* Loop through all CPUs */ for_each_present_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; /* If we are matching by EQ, there may be multiple CPUs using * using the same vector, so select the one with * LPFC_CPU_FIRST_IRQ set. */ if ((match == LPFC_FIND_BY_EQ) && (cpup->flag & LPFC_CPU_FIRST_IRQ) && (cpup->eq == id)) return cpu; /* If matching by HDWQ, select the first CPU that matches */ if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id)) return cpu; } return 0; } #ifdef CONFIG_X86 /** * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded * @phba: pointer to lpfc hba data structure. * @cpu: CPU map index * @phys_id: CPU package physical id * @core_id: CPU core id */ static int lpfc_find_hyper(struct lpfc_hba *phba, int cpu, uint16_t phys_id, uint16_t core_id) { struct lpfc_vector_map_info *cpup; int idx; for_each_present_cpu(idx) { cpup = &phba->sli4_hba.cpu_map[idx]; /* Does the cpup match the one we are looking for */ if ((cpup->phys_id == phys_id) && (cpup->core_id == core_id) && (cpu != idx)) return 1; } return 0; } #endif /* * lpfc_assign_eq_map_info - Assigns eq for vector_map structure * @phba: pointer to lpfc hba data structure. * @eqidx: index for eq and irq vector * @flag: flags to set for vector_map structure * @cpu: cpu used to index vector_map structure * * The routine assigns eq info into vector_map structure */ static inline void lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag, unsigned int cpu) { struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu]; struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx); cpup->eq = eqidx; cpup->flag |= flag; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n", cpu, eqhdl->irq, cpup->eq, cpup->flag); } /** * lpfc_cpu_map_array_init - Initialize cpu_map structure * @phba: pointer to lpfc hba data structure. * * The routine initializes the cpu_map array structure */ static void lpfc_cpu_map_array_init(struct lpfc_hba *phba) { struct lpfc_vector_map_info *cpup; struct lpfc_eq_intr_info *eqi; int cpu; for_each_possible_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; cpup->phys_id = LPFC_VECTOR_MAP_EMPTY; cpup->core_id = LPFC_VECTOR_MAP_EMPTY; cpup->hdwq = LPFC_VECTOR_MAP_EMPTY; cpup->eq = LPFC_VECTOR_MAP_EMPTY; cpup->flag = 0; eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu); INIT_LIST_HEAD(&eqi->list); eqi->icnt = 0; } } /** * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure * @phba: pointer to lpfc hba data structure. * * The routine initializes the hba_eq_hdl array structure */ static void lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba) { struct lpfc_hba_eq_hdl *eqhdl; int i; for (i = 0; i < phba->cfg_irq_chann; i++) { eqhdl = lpfc_get_eq_hdl(i); eqhdl->irq = LPFC_IRQ_EMPTY; eqhdl->phba = phba; } } /** * lpfc_cpu_affinity_check - Check vector CPU affinity mappings * @phba: pointer to lpfc hba data structure. * @vectors: number of msix vectors allocated. * * The routine will figure out the CPU affinity assignment for every * MSI-X vector allocated for the HBA. * In addition, the CPU to IO channel mapping will be calculated * and the phba->sli4_hba.cpu_map array will reflect this. */ static void lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) { int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu; int max_phys_id, min_phys_id; int max_core_id, min_core_id; struct lpfc_vector_map_info *cpup; struct lpfc_vector_map_info *new_cpup; #ifdef CONFIG_SCSI_LPFC_DEBUG_FS struct lpfc_hdwq_stat *c_stat; #endif max_phys_id = 0; min_phys_id = LPFC_VECTOR_MAP_EMPTY; max_core_id = 0; min_core_id = LPFC_VECTOR_MAP_EMPTY; /* Update CPU map with physical id and core id of each CPU */ for_each_present_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; #ifdef CONFIG_X86 cpup->phys_id = topology_physical_package_id(cpu); cpup->core_id = topology_core_id(cpu); if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id)) cpup->flag |= LPFC_CPU_MAP_HYPER; #else /* No distinction between CPUs for other platforms */ cpup->phys_id = 0; cpup->core_id = cpu; #endif lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "3328 CPU %d physid %d coreid %d flag x%x\n", cpu, cpup->phys_id, cpup->core_id, cpup->flag); if (cpup->phys_id > max_phys_id) max_phys_id = cpup->phys_id; if (cpup->phys_id < min_phys_id) min_phys_id = cpup->phys_id; if (cpup->core_id > max_core_id) max_core_id = cpup->core_id; if (cpup->core_id < min_core_id) min_core_id = cpup->core_id; } /* After looking at each irq vector assigned to this pcidev, its * possible to see that not ALL CPUs have been accounted for. * Next we will set any unassigned (unaffinitized) cpu map * entries to a IRQ on the same phys_id. */ first_cpu = cpumask_first(cpu_present_mask); start_cpu = first_cpu; for_each_present_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; /* Is this CPU entry unassigned */ if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { /* Mark CPU as IRQ not assigned by the kernel */ cpup->flag |= LPFC_CPU_MAP_UNASSIGN; /* If so, find a new_cpup that is on the SAME * phys_id as cpup. start_cpu will start where we * left off so all unassigned entries don't get assgined * the IRQ of the first entry. */ new_cpu = start_cpu; for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) && (new_cpup->phys_id == cpup->phys_id)) goto found_same; new_cpu = lpfc_next_present_cpu(new_cpu); } /* At this point, we leave the CPU as unassigned */ continue; found_same: /* We found a matching phys_id, so copy the IRQ info */ cpup->eq = new_cpup->eq; /* Bump start_cpu to the next slot to minmize the * chance of having multiple unassigned CPU entries * selecting the same IRQ. */ start_cpu = lpfc_next_present_cpu(new_cpu); lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "3337 Set Affinity: CPU %d " "eq %d from peer cpu %d same " "phys_id (%d)\n", cpu, cpup->eq, new_cpu, cpup->phys_id); } } /* Set any unassigned cpu map entries to a IRQ on any phys_id */ start_cpu = first_cpu; for_each_present_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; /* Is this entry unassigned */ if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { /* Mark it as IRQ not assigned by the kernel */ cpup->flag |= LPFC_CPU_MAP_UNASSIGN; /* If so, find a new_cpup thats on ANY phys_id * as the cpup. start_cpu will start where we * left off so all unassigned entries don't get * assigned the IRQ of the first entry. */ new_cpu = start_cpu; for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY)) goto found_any; new_cpu = lpfc_next_present_cpu(new_cpu); } /* We should never leave an entry unassigned */ lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "3339 Set Affinity: CPU %d " "eq %d UNASSIGNED\n", cpup->hdwq, cpup->eq); continue; found_any: /* We found an available entry, copy the IRQ info */ cpup->eq = new_cpup->eq; /* Bump start_cpu to the next slot to minmize the * chance of having multiple unassigned CPU entries * selecting the same IRQ. */ start_cpu = lpfc_next_present_cpu(new_cpu); lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "3338 Set Affinity: CPU %d " "eq %d from peer cpu %d (%d/%d)\n", cpu, cpup->eq, new_cpu, new_cpup->phys_id, new_cpup->core_id); } } /* Assign hdwq indices that are unique across all cpus in the map * that are also FIRST_CPUs. */ idx = 0; for_each_present_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; /* Only FIRST IRQs get a hdwq index assignment. */ if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) continue; /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */ cpup->hdwq = idx; idx++; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "3333 Set Affinity: CPU %d (phys %d core %d): " "hdwq %d eq %d flg x%x\n", cpu, cpup->phys_id, cpup->core_id, cpup->hdwq, cpup->eq, cpup->flag); } /* Associate a hdwq with each cpu_map entry * This will be 1 to 1 - hdwq to cpu, unless there are less * hardware queues then CPUs. For that case we will just round-robin * the available hardware queues as they get assigned to CPUs. * The next_idx is the idx from the FIRST_CPU loop above to account * for irq_chann < hdwq. The idx is used for round-robin assignments * and needs to start at 0. */ next_idx = idx; start_cpu = 0; idx = 0; for_each_present_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; /* FIRST cpus are already mapped. */ if (cpup->flag & LPFC_CPU_FIRST_IRQ) continue; /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq * of the unassigned cpus to the next idx so that all * hdw queues are fully utilized. */ if (next_idx < phba->cfg_hdw_queue) { cpup->hdwq = next_idx; next_idx++; continue; } /* Not a First CPU and all hdw_queues are used. Reuse a * Hardware Queue for another CPU, so be smart about it * and pick one that has its IRQ/EQ mapped to the same phys_id * (CPU package) and core_id. */ new_cpu = start_cpu; for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && new_cpup->phys_id == cpup->phys_id && new_cpup->core_id == cpup->core_id) { goto found_hdwq; } new_cpu = lpfc_next_present_cpu(new_cpu); } /* If we can't match both phys_id and core_id, * settle for just a phys_id match. */ new_cpu = start_cpu; for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && new_cpup->phys_id == cpup->phys_id) goto found_hdwq; new_cpu = lpfc_next_present_cpu(new_cpu); } /* Otherwise just round robin on cfg_hdw_queue */ cpup->hdwq = idx % phba->cfg_hdw_queue; idx++; goto logit; found_hdwq: /* We found an available entry, copy the IRQ info */ start_cpu = lpfc_next_present_cpu(new_cpu); cpup->hdwq = new_cpup->hdwq; logit: lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "3335 Set Affinity: CPU %d (phys %d core %d): " "hdwq %d eq %d flg x%x\n", cpu, cpup->phys_id, cpup->core_id, cpup->hdwq, cpup->eq, cpup->flag); } /* * Initialize the cpu_map slots for not-present cpus in case * a cpu is hot-added. Perform a simple hdwq round robin assignment. */ idx = 0; for_each_possible_cpu(cpu) { cpup = &phba->sli4_hba.cpu_map[cpu]; #ifdef CONFIG_SCSI_LPFC_DEBUG_FS c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu); c_stat->hdwq_no = cpup->hdwq; #endif if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) continue; cpup->hdwq = idx++ % phba->cfg_hdw_queue; #ifdef CONFIG_SCSI_LPFC_DEBUG_FS c_stat->hdwq_no = cpup->hdwq; #endif lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "3340 Set Affinity: not present " "CPU %d hdwq %d\n", cpu, cpup->hdwq); } /* The cpu_map array will be used later during initialization * when EQ / CQ / WQs are allocated and configured. */ return; } /** * lpfc_cpuhp_get_eq * * @phba: pointer to lpfc hba data structure. * @cpu: cpu going offline * @eqlist: eq list to append to */ static int lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu, struct list_head *eqlist) { const struct cpumask *maskp; struct lpfc_queue *eq; struct cpumask *tmp; u16 idx; tmp = kzalloc(cpumask_size(), GFP_KERNEL); if (!tmp) return -ENOMEM; for (idx = 0; idx < phba->cfg_irq_chann; idx++) { maskp = pci_irq_get_affinity(phba->pcidev, idx); if (!maskp) continue; /* * if irq is not affinitized to the cpu going * then we don't need to poll the eq attached * to it. */ if (!cpumask_and(tmp, maskp, cpumask_of(cpu))) continue; /* get the cpus that are online and are affini- * tized to this irq vector. If the count is * more than 1 then cpuhp is not going to shut- * down this vector. Since this cpu has not * gone offline yet, we need >1. */ cpumask_and(tmp, maskp, cpu_online_mask); if (cpumask_weight(tmp) > 1) continue; /* Now that we have an irq to shutdown, get the eq * mapped to this irq. Note: multiple hdwq's in * the software can share an eq, but eventually * only eq will be mapped to this vector */ eq = phba->sli4_hba.hba_eq_hdl[idx].eq; list_add(&eq->_poll_list, eqlist); } kfree(tmp); return 0; } static void __lpfc_cpuhp_remove(struct lpfc_hba *phba) { if (phba->sli_rev != LPFC_SLI_REV4) return; cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp); /* * unregistering the instance doesn't stop the polling * timer. Wait for the poll timer to retire. */ synchronize_rcu(); del_timer_sync(&phba->cpuhp_poll_timer); } static void lpfc_cpuhp_remove(struct lpfc_hba *phba) { if (phba->pport && (phba->pport->fc_flag & FC_OFFLINE_MODE)) return; __lpfc_cpuhp_remove(phba); } static void lpfc_cpuhp_add(struct lpfc_hba *phba) { if (phba->sli_rev != LPFC_SLI_REV4) return; rcu_read_lock(); if (!list_empty(&phba->poll_list)) mod_timer(&phba->cpuhp_poll_timer, jiffies + msecs_to_jiffies(LPFC_POLL_HB)); rcu_read_unlock(); cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp); } static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval) { if (phba->pport->load_flag & FC_UNLOADING) { *retval = -EAGAIN; return true; } if (phba->sli_rev != LPFC_SLI_REV4) { *retval = 0; return true; } /* proceed with the hotplug */ return false; } /** * lpfc_irq_set_aff - set IRQ affinity * @eqhdl: EQ handle * @cpu: cpu to set affinity * **/ static inline void lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu) { cpumask_clear(&eqhdl->aff_mask); cpumask_set_cpu(cpu, &eqhdl->aff_mask); irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING); irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask); } /** * lpfc_irq_clear_aff - clear IRQ affinity * @eqhdl: EQ handle * **/ static inline void lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl) { cpumask_clear(&eqhdl->aff_mask); irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING); } /** * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event * @phba: pointer to HBA context object. * @cpu: cpu going offline/online * @offline: true, cpu is going offline. false, cpu is coming online. * * If cpu is going offline, we'll try our best effort to find the next * online cpu on the phba's original_mask and migrate all offlining IRQ * affinities. * * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu. * * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on * PCI_IRQ_AFFINITY to auto-manage IRQ affinity. * **/ static void lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline) { struct lpfc_vector_map_info *cpup; struct cpumask *aff_mask; unsigned int cpu_select, cpu_next, idx; const struct cpumask *orig_mask; if (phba->irq_chann_mode == NORMAL_MODE) return; orig_mask = &phba->sli4_hba.irq_aff_mask; if (!cpumask_test_cpu(cpu, orig_mask)) return; cpup = &phba->sli4_hba.cpu_map[cpu]; if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) return; if (offline) { /* Find next online CPU on original mask */ cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true); cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next); /* Found a valid CPU */ if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) { /* Go through each eqhdl and ensure offlining * cpu aff_mask is migrated */ for (idx = 0; idx < phba->cfg_irq_chann; idx++) { aff_mask = lpfc_get_aff_mask(idx); /* Migrate affinity */ if (cpumask_test_cpu(cpu, aff_mask)) lpfc_irq_set_aff(lpfc_get_eq_hdl(idx), cpu_select); } } else { /* Rely on irqbalance if no online CPUs left on NUMA */ for (idx = 0; idx < phba->cfg_irq_chann; idx++) lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx)); } } else { /* Migrate affinity back to this CPU */ lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu); } } static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node) { struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); struct lpfc_queue *eq, *next; LIST_HEAD(eqlist); int retval; if (!phba) { WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); return 0; } if (__lpfc_cpuhp_checks(phba, &retval)) return retval; lpfc_irq_rebalance(phba, cpu, true); retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist); if (retval) return retval; /* start polling on these eq's */ list_for_each_entry_safe(eq, next, &eqlist, _poll_list) { list_del_init(&eq->_poll_list); lpfc_sli4_start_polling(eq); } return 0; } static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node) { struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); struct lpfc_queue *eq, *next; unsigned int n; int retval; if (!phba) { WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); return 0; } if (__lpfc_cpuhp_checks(phba, &retval)) return retval; lpfc_irq_rebalance(phba, cpu, false); list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) { n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ); if (n == cpu) lpfc_sli4_stop_polling(eq); } return 0; } /** * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device * @phba: pointer to lpfc hba data structure. * * This routine is invoked to enable the MSI-X interrupt vectors to device * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them * to cpus on the system. * * When cfg_irq_numa is enabled, the adapter will only allocate vectors for * the number of cpus on the same numa node as this adapter. The vectors are * allocated without requesting OS affinity mapping. A vector will be * allocated and assigned to each online and offline cpu. If the cpu is * online, then affinity will be set to that cpu. If the cpu is offline, then * affinity will be set to the nearest peer cpu within the numa node that is * online. If there are no online cpus within the numa node, affinity is not * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping * is consistent with the way cpu online/offline is handled when cfg_irq_numa is * configured. * * If numa mode is not enabled and there is more than 1 vector allocated, then * the driver relies on the managed irq interface where the OS assigns vector to * cpu affinity. The driver will then use that affinity mapping to setup its * cpu mapping table. * * Return codes * 0 - successful * other values - error **/ static int lpfc_sli4_enable_msix(struct lpfc_hba *phba) { int vectors, rc, index; char *name; const struct cpumask *aff_mask = NULL; unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids; struct lpfc_vector_map_info *cpup; struct lpfc_hba_eq_hdl *eqhdl; const struct cpumask *maskp; unsigned int flags = PCI_IRQ_MSIX; /* Set up MSI-X multi-message vectors */ vectors = phba->cfg_irq_chann; if (phba->irq_chann_mode != NORMAL_MODE) aff_mask = &phba->sli4_hba.irq_aff_mask; if (aff_mask) { cpu_cnt = cpumask_weight(aff_mask); vectors = min(phba->cfg_irq_chann, cpu_cnt); /* cpu: iterates over aff_mask including offline or online * cpu_select: iterates over online aff_mask to set affinity */ cpu = cpumask_first(aff_mask); cpu_select = lpfc_next_online_cpu(aff_mask, cpu); } else { flags |= PCI_IRQ_AFFINITY; } rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags); if (rc < 0) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0484 PCI enable MSI-X failed (%d)\n", rc); goto vec_fail_out; } vectors = rc; /* Assign MSI-X vectors to interrupt handlers */ for (index = 0; index < vectors; index++) { eqhdl = lpfc_get_eq_hdl(index); name = eqhdl->handler_name; memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ); snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ, LPFC_DRIVER_HANDLER_NAME"%d", index); eqhdl->idx = index; rc = pci_irq_vector(phba->pcidev, index); if (rc < 0) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0489 MSI-X fast-path (%d) " "pci_irq_vec failed (%d)\n", index, rc); goto cfg_fail_out; } eqhdl->irq = rc; rc = request_threaded_irq(eqhdl->irq, &lpfc_sli4_hba_intr_handler, &lpfc_sli4_hba_intr_handler_th, IRQF_ONESHOT, name, eqhdl); if (rc) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0486 MSI-X fast-path (%d) " "request_irq failed (%d)\n", index, rc); goto cfg_fail_out; } if (aff_mask) { /* If found a neighboring online cpu, set affinity */ if (cpu_select < nr_cpu_ids) lpfc_irq_set_aff(eqhdl, cpu_select); /* Assign EQ to cpu_map */ lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ, cpu); /* Iterate to next offline or online cpu in aff_mask */ cpu = cpumask_next(cpu, aff_mask); /* Find next online cpu in aff_mask to set affinity */ cpu_select = lpfc_next_online_cpu(aff_mask, cpu); } else if (vectors == 1) { cpu = cpumask_first(cpu_present_mask); lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ, cpu); } else { maskp = pci_irq_get_affinity(phba->pcidev, index); /* Loop through all CPUs associated with vector index */ for_each_cpu_and(cpu, maskp, cpu_present_mask) { cpup = &phba->sli4_hba.cpu_map[cpu]; /* If this is the first CPU thats assigned to * this vector, set LPFC_CPU_FIRST_IRQ. * * With certain platforms its possible that irq * vectors are affinitized to all the cpu's. * This can result in each cpu_map.eq to be set * to the last vector, resulting in overwrite * of all the previous cpu_map.eq. Ensure that * each vector receives a place in cpu_map. * Later call to lpfc_cpu_affinity_check will * ensure we are nicely balanced out. */ if (cpup->eq != LPFC_VECTOR_MAP_EMPTY) continue; lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ, cpu); break; } } } if (vectors != phba->cfg_irq_chann) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3238 Reducing IO channels to match number of " "MSI-X vectors, requested %d got %d\n", phba->cfg_irq_chann, vectors); if (phba->cfg_irq_chann > vectors) phba->cfg_irq_chann = vectors; } return rc; cfg_fail_out: /* free the irq already requested */ for (--index; index >= 0; index--) { eqhdl = lpfc_get_eq_hdl(index); lpfc_irq_clear_aff(eqhdl); free_irq(eqhdl->irq, eqhdl); } /* Unconfigure MSI-X capability structure */ pci_free_irq_vectors(phba->pcidev); vec_fail_out: return rc; } /** * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device * @phba: pointer to lpfc hba data structure. * * This routine is invoked to enable the MSI interrupt mode to device with * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is * called to enable the MSI vector. The device driver is responsible for * calling the request_irq() to register MSI vector with a interrupt the * handler, which is done in this function. * * Return codes * 0 - successful * other values - error **/ static int lpfc_sli4_enable_msi(struct lpfc_hba *phba) { int rc, index; unsigned int cpu; struct lpfc_hba_eq_hdl *eqhdl; rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1, PCI_IRQ_MSI | PCI_IRQ_AFFINITY); if (rc > 0) lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0487 PCI enable MSI mode success.\n"); else { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0488 PCI enable MSI mode failed (%d)\n", rc); return rc ? rc : -1; } rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 0, LPFC_DRIVER_NAME, phba); if (rc) { pci_free_irq_vectors(phba->pcidev); lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0490 MSI request_irq failed (%d)\n", rc); return rc; } eqhdl = lpfc_get_eq_hdl(0); rc = pci_irq_vector(phba->pcidev, 0); if (rc < 0) { pci_free_irq_vectors(phba->pcidev); lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0496 MSI pci_irq_vec failed (%d)\n", rc); return rc; } eqhdl->irq = rc; cpu = cpumask_first(cpu_present_mask); lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu); for (index = 0; index < phba->cfg_irq_chann; index++) { eqhdl = lpfc_get_eq_hdl(index); eqhdl->idx = index; } return 0; } /** * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device * @phba: pointer to lpfc hba data structure. * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). * * This routine is invoked to enable device interrupt and associate driver's * interrupt handler(s) to interrupt vector(s) to device with SLI-4 * interface spec. Depends on the interrupt mode configured to the driver, * the driver will try to fallback from the configured interrupt mode to an * interrupt mode which is supported by the platform, kernel, and device in * the order of: * MSI-X -> MSI -> IRQ. * * Return codes * Interrupt mode (2, 1, 0) - successful * LPFC_INTR_ERROR - error **/ static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) { uint32_t intr_mode = LPFC_INTR_ERROR; int retval, idx; if (cfg_mode == 2) { /* Preparation before conf_msi mbox cmd */ retval = 0; if (!retval) { /* Now, try to enable MSI-X interrupt mode */ retval = lpfc_sli4_enable_msix(phba); if (!retval) { /* Indicate initialization to MSI-X mode */ phba->intr_type = MSIX; intr_mode = 2; } } } /* Fallback to MSI if MSI-X initialization failed */ if (cfg_mode >= 1 && phba->intr_type == NONE) { retval = lpfc_sli4_enable_msi(phba); if (!retval) { /* Indicate initialization to MSI mode */ phba->intr_type = MSI; intr_mode = 1; } } /* Fallback to INTx if both MSI-X/MSI initalization failed */ if (phba->intr_type == NONE) { retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, IRQF_SHARED, LPFC_DRIVER_NAME, phba); if (!retval) { struct lpfc_hba_eq_hdl *eqhdl; unsigned int cpu; /* Indicate initialization to INTx mode */ phba->intr_type = INTx; intr_mode = 0; eqhdl = lpfc_get_eq_hdl(0); retval = pci_irq_vector(phba->pcidev, 0); if (retval < 0) { lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, "0502 INTR pci_irq_vec failed (%d)\n", retval); return LPFC_INTR_ERROR; } eqhdl->irq = retval; cpu = cpumask_first(cpu_present_mask); lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu); for (idx = 0; idx < phba->cfg_irq_chann; idx++) { eqhdl = lpfc_get_eq_hdl(idx); eqhdl->idx = idx; } } } return intr_mode; } /** * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device * @phba: pointer to lpfc hba data structure. * * This routine is invoked to disable device interrupt and disassociate * the driver's interrupt handler(s) from interrupt vector(s) to device * with SLI-4 interface spec. Depending on the interrupt mode, the driver * will release the interrupt vector(s) for the message signaled interrupt. **/ static void lpfc_sli4_disable_intr(struct lpfc_hba *phba) { /* Disable the currently initialized interrupt mode */ if (phba->intr_type == MSIX) { int index; struct lpfc_hba_eq_hdl *eqhdl; /* Free up MSI-X multi-message vectors */ for (index = 0; index < phba->cfg_irq_chann; index++) { eqhdl = lpfc_get_eq_hdl(index); lpfc_irq_clear_aff(eqhdl); free_irq(eqhdl->irq, eqhdl); } } else { free_irq(phba->pcidev->irq, phba); } pci_free_irq_vectors(phba->pcidev); /* Reset interrupt management states */ phba->intr_type = NONE; phba->sli.slistat.sli_intr = 0; } /** * lpfc_unset_hba - Unset SLI3 hba device initialization * @phba: pointer to lpfc hba data structure. * * This routine is invoked to unset the HBA device initialization steps to * a device with SLI-3 interface spec. **/ static void lpfc_unset_hba(struct lpfc_hba *phba) { struct lpfc_vport *vport = phba->pport; struct Scsi_Host *shost = lpfc_shost_from_vport(vport); spin_lock_irq(shost->host_lock); vport->load_flag |= FC_UNLOADING; spin_unlock_irq(shost->host_lock); kfree(phba->vpi_bmask); kfree(phba->vpi_ids); lpfc_stop_hba_timers(phba); phba->pport->work_port_events = 0; lpfc_sli_hba_down(phba); lpfc_sli_brdrestart(phba); lpfc_sli_disable_intr(phba); return; } /** * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy * @phba: Pointer to HBA context object. * * This function is called in the SLI4 code path to wait for completion * of device's XRIs exchange busy. It will check the XRI exchange busy * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after * that, it will check the XRI exchange busy on outstanding FCP and ELS * I/Os every 30 seconds, log error message, and wait forever. Only when * all XRI exchange busy complete, the driver unload shall proceed with * invoking the function reset ioctl mailbox command to the CNA and the * the rest of the driver unload resource release. **/ static void lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) { struct lpfc_sli4_hdw_queue *qp; int idx, ccnt; int wait_time = 0; int io_xri_cmpl = 1; int nvmet_xri_cmpl = 1; int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); /* Driver just aborted IOs during the hba_unset process. Pause * here to give the HBA time to complete the IO and get entries * into the abts lists. */ msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5); /* Wait for NVME pending IO to flush back to transport. */ if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) lpfc_nvme_wait_for_io_drain(phba); ccnt = 0; for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { qp = &phba->sli4_hba.hdwq[idx]; io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list); if (!io_xri_cmpl) /* if list is NOT empty */ ccnt++; } if (ccnt) io_xri_cmpl = 0; if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { nvmet_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); } while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) { if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { if (!nvmet_xri_cmpl) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6424 NVMET XRI exchange busy " "wait time: %d seconds.\n", wait_time/1000); if (!io_xri_cmpl) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6100 IO XRI exchange busy " "wait time: %d seconds.\n", wait_time/1000); if (!els_xri_cmpl) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2878 ELS XRI exchange busy " "wait time: %d seconds.\n", wait_time/1000); msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2); wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2; } else { msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1); wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1; } ccnt = 0; for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { qp = &phba->sli4_hba.hdwq[idx]; io_xri_cmpl = list_empty( &qp->lpfc_abts_io_buf_list); if (!io_xri_cmpl) /* if list is NOT empty */ ccnt++; } if (ccnt) io_xri_cmpl = 0; if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { nvmet_xri_cmpl = list_empty( &phba->sli4_hba.lpfc_abts_nvmet_ctx_list); } els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); } } /** * lpfc_sli4_hba_unset - Unset the fcoe hba * @phba: Pointer to HBA context object. * * This function is called in the SLI4 code path to reset the HBA's FCoE * function. The caller is not required to hold any lock. This routine * issues PCI function reset mailbox command to reset the FCoE function. * At the end of the function, it calls lpfc_hba_down_post function to * free any pending commands. **/ static void lpfc_sli4_hba_unset(struct lpfc_hba *phba) { int wait_cnt = 0; LPFC_MBOXQ_t *mboxq; struct pci_dev *pdev = phba->pcidev; lpfc_stop_hba_timers(phba); hrtimer_cancel(&phba->cmf_stats_timer); hrtimer_cancel(&phba->cmf_timer); if (phba->pport) phba->sli4_hba.intr_enable = 0; /* * Gracefully wait out the potential current outstanding asynchronous * mailbox command. */ /* First, block any pending async mailbox command from posted */ spin_lock_irq(&phba->hbalock); phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK; spin_unlock_irq(&phba->hbalock); /* Now, trying to wait it out if we can */ while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { msleep(10); if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT) break; } /* Forcefully release the outstanding mailbox command if timed out */ if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { spin_lock_irq(&phba->hbalock); mboxq = phba->sli.mbox_active; mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; __lpfc_mbox_cmpl_put(phba, mboxq); phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; phba->sli.mbox_active = NULL; spin_unlock_irq(&phba->hbalock); } /* Abort all iocbs associated with the hba */ lpfc_sli_hba_iocb_abort(phba); if (!pci_channel_offline(phba->pcidev)) /* Wait for completion of device XRI exchange busy */ lpfc_sli4_xri_exchange_busy_wait(phba); /* per-phba callback de-registration for hotplug event */ if (phba->pport) lpfc_cpuhp_remove(phba); /* Disable PCI subsystem interrupt */ lpfc_sli4_disable_intr(phba); /* Disable SR-IOV if enabled */ if (phba->cfg_sriov_nr_virtfn) pci_disable_sriov(pdev); /* Stop kthread signal shall trigger work_done one more time */ kthread_stop(phba->worker_thread); /* Disable FW logging to host memory */ lpfc_ras_stop_fwlog(phba); /* Reset SLI4 HBA FCoE function */ lpfc_pci_function_reset(phba); /* release all queue allocated resources. */ lpfc_sli4_queue_destroy(phba); /* Free RAS DMA memory */ if (phba->ras_fwlog.ras_enabled) lpfc_sli4_ras_dma_free(phba); /* Stop the SLI4 device port */ if (phba->pport) phba->pport->work_port_events = 0; } static uint32_t lpfc_cgn_crc32(uint32_t crc, u8 byte) { uint32_t msb = 0; uint32_t bit; for (bit = 0; bit < 8; bit++) { msb = (crc >> 31) & 1; crc <<= 1; if (msb ^ (byte & 1)) { crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER; crc |= 1; } byte >>= 1; } return crc; } static uint32_t lpfc_cgn_reverse_bits(uint32_t wd) { uint32_t result = 0; uint32_t i; for (i = 0; i < 32; i++) { result <<= 1; result |= (1 & (wd >> i)); } return result; } /* * The routine corresponds with the algorithm the HBA firmware * uses to validate the data integrity. */ uint32_t lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc) { uint32_t i; uint32_t result; uint8_t *data = (uint8_t *)ptr; for (i = 0; i < byteLen; ++i) crc = lpfc_cgn_crc32(crc, data[i]); result = ~lpfc_cgn_reverse_bits(crc); return result; } void lpfc_init_congestion_buf(struct lpfc_hba *phba) { struct lpfc_cgn_info *cp; uint16_t size; uint32_t crc; lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "6235 INIT Congestion Buffer %p\n", phba->cgn_i); if (!phba->cgn_i) return; cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; atomic_set(&phba->cgn_fabric_warn_cnt, 0); atomic_set(&phba->cgn_fabric_alarm_cnt, 0); atomic_set(&phba->cgn_sync_alarm_cnt, 0); atomic_set(&phba->cgn_sync_warn_cnt, 0); atomic_set(&phba->cgn_driver_evt_cnt, 0); atomic_set(&phba->cgn_latency_evt_cnt, 0); atomic64_set(&phba->cgn_latency_evt, 0); phba->cgn_evt_minute = 0; memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat)); cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ); cp->cgn_info_version = LPFC_CGN_INFO_V4; /* cgn parameters */ cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; lpfc_cgn_update_tstamp(phba, &cp->base_time); /* Fill in default LUN qdepth */ if (phba->pport) { size = (uint16_t)(phba->pport->cfg_lun_queue_depth); cp->cgn_lunq = cpu_to_le16(size); } /* last used Index initialized to 0xff already */ cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); cp->cgn_info_crc = cpu_to_le32(crc); phba->cgn_evt_timestamp = jiffies + msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); } void lpfc_init_congestion_stat(struct lpfc_hba *phba) { struct lpfc_cgn_info *cp; uint32_t crc; lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, "6236 INIT Congestion Stat %p\n", phba->cgn_i); if (!phba->cgn_i) return; cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat)); lpfc_cgn_update_tstamp(phba, &cp->stat_start); crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); cp->cgn_info_crc = cpu_to_le32(crc); } /** * __lpfc_reg_congestion_buf - register congestion info buffer with HBA * @phba: Pointer to hba context object. * @reg: flag to determine register or unregister. */ static int __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg) { struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf; union lpfc_sli4_cfg_shdr *shdr; uint32_t shdr_status, shdr_add_status; LPFC_MBOXQ_t *mboxq; int length, rc; if (!phba->cgn_i) return -ENXIO; mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!mboxq) { lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, "2641 REG_CONGESTION_BUF mbox allocation fail: " "HBA state x%x reg %d\n", phba->pport->port_state, reg); return -ENOMEM; } length = (sizeof(struct lpfc_mbx_reg_congestion_buf) - sizeof(struct lpfc_sli4_cfg_mhdr)); lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length, LPFC_SLI4_MBX_EMBED); reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf; bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1); if (reg > 0) bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1); else bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0); reg_congestion_buf->length = sizeof(struct lpfc_cgn_info); reg_congestion_buf->addr_lo = putPaddrLow(phba->cgn_i->phys); reg_congestion_buf->addr_hi = putPaddrHigh(phba->cgn_i->phys); rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); shdr = (union lpfc_sli4_cfg_shdr *) &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); mempool_free(mboxq, phba->mbox_mem_pool); if (shdr_status || shdr_add_status || rc) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "2642 REG_CONGESTION_BUF mailbox " "failed with status x%x add_status x%x," " mbx status x%x reg %d\n", shdr_status, shdr_add_status, rc, reg); return -ENXIO; } return 0; } int lpfc_unreg_congestion_buf(struct lpfc_hba *phba) { lpfc_cmf_stop(phba); return __lpfc_reg_congestion_buf(phba, 0); } int lpfc_reg_congestion_buf(struct lpfc_hba *phba) { return __lpfc_reg_congestion_buf(phba, 1); } /** * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS. * @phba: Pointer to HBA context object. * @mboxq: Pointer to the mailboxq memory for the mailbox command response. * * This function is called in the SLI4 code path to read the port's * sli4 capabilities. * * This function may be be called from any context that can block-wait * for the completion. The expectation is that this routine is called * typically from probe_one or from the online routine. **/ int lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) { int rc; struct lpfc_mqe *mqe = &mboxq->u.mqe; struct lpfc_pc_sli4_params *sli4_params; uint32_t mbox_tmo; int length; bool exp_wqcq_pages = true; struct lpfc_sli4_parameters *mbx_sli4_parameters; /* * By default, the driver assumes the SLI4 port requires RPI * header postings. The SLI4_PARAM response will correct this * assumption. */ phba->sli4_hba.rpi_hdrs_in_use = 1; /* Read the port's SLI4 Config Parameters */ length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - sizeof(struct lpfc_sli4_cfg_mhdr)); lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, length, LPFC_SLI4_MBX_EMBED); if (!phba->sli4_hba.intr_enable) rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); else { mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); } if (unlikely(rc)) return rc; sli4_params = &phba->sli4_hba.pc_sli4_params; mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters); sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters); sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters); sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1, mbx_sli4_parameters); sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2, mbx_sli4_parameters); if (bf_get(cfg_phwq, mbx_sli4_parameters)) phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED; else phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED; sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len; sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope, mbx_sli4_parameters); sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters); sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters); sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters); sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters); sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters); sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters); sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters); sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters); sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters); sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters); sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt, mbx_sli4_parameters); sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters); sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align, mbx_sli4_parameters); phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters); /* Check for Extended Pre-Registered SGL support */ phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters); /* Check for firmware nvme support */ rc = (bf_get(cfg_nvme, mbx_sli4_parameters) && bf_get(cfg_xib, mbx_sli4_parameters)); if (rc) { /* Save this to indicate the Firmware supports NVME */ sli4_params->nvme = 1; /* Firmware NVME support, check driver FC4 NVME support */ if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, "6133 Disabling NVME support: " "FC4 type not supported: x%x\n", phba->cfg_enable_fc4_type); goto fcponly; } } else { /* No firmware NVME support, check driver FC4 NVME support */ sli4_params->nvme = 0; if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, "6101 Disabling NVME support: Not " "supported by firmware (%d %d) x%x\n", bf_get(cfg_nvme, mbx_sli4_parameters), bf_get(cfg_xib, mbx_sli4_parameters), phba->cfg_enable_fc4_type); fcponly: phba->nvmet_support = 0; phba->cfg_nvmet_mrq = 0; phba->cfg_nvme_seg_cnt = 0; /* If no FC4 type support, move to just SCSI support */ if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) return -ENODEV; phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; } } /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to * accommodate 512K and 1M IOs in a single nvme buf. */ if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; /* Enable embedded Payload BDE if support is indicated */ if (bf_get(cfg_pbde, mbx_sli4_parameters)) phba->cfg_enable_pbde = 1; else phba->cfg_enable_pbde = 0; /* * To support Suppress Response feature we must satisfy 3 conditions. * lpfc_suppress_rsp module parameter must be set (default). * In SLI4-Parameters Descriptor: * Extended Inline Buffers (XIB) must be supported. * Suppress Response IU Not Supported (SRIUNS) must NOT be supported * (double negative). */ if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) && !(bf_get(cfg_nosr, mbx_sli4_parameters))) phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP; else phba->cfg_suppress_rsp = 0; if (bf_get(cfg_eqdr, mbx_sli4_parameters)) phba->sli.sli_flag |= LPFC_SLI_USE_EQDR; /* Make sure that sge_supp_len can be handled by the driver */ if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; rc = dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len); if (unlikely(rc)) { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "6400 Can't set dma maximum segment size\n"); return rc; } /* * Check whether the adapter supports an embedded copy of the * FCP CMD IU within the WQE for FCP_Ixxx commands. In order * to use this option, 128-byte WQEs must be used. */ if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters)) phba->fcp_embed_io = 1; else phba->fcp_embed_io = 0; lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n", bf_get(cfg_xib, mbx_sli4_parameters), phba->cfg_enable_pbde, phba->fcp_embed_io, sli4_params->nvme, phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp); if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_IF_TYPE_2) && (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_FAMILY_LNCR_A0)) exp_wqcq_pages = false; if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) && (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) && exp_wqcq_pages && (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT)) phba->enab_exp_wqcq_pages = 1; else phba->enab_exp_wqcq_pages = 0; /* * Check if the SLI port supports MDS Diagnostics */ if (bf_get(cfg_mds_diags, mbx_sli4_parameters)) phba->mds_diags_support = 1; else phba->mds_diags_support = 0; /* * Check if the SLI port supports NSLER */ if (bf_get(cfg_nsler, mbx_sli4_parameters)) phba->nsler = 1; else phba->nsler = 0; return 0; } /** * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. * @pdev: pointer to PCI device * @pid: pointer to PCI device identifier * * This routine is to be called to attach a device with SLI-3 interface spec * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific * information of the device and driver to see if the driver state that it can * support this kind of device. If the match is successful, the driver core * invokes this routine. If this routine determines it can claim the HBA, it * does all the initialization that it needs to do to handle the HBA properly. * * Return code * 0 - driver can claim the device * negative value - driver can not claim the device **/ static int lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid) { struct lpfc_hba *phba; struct lpfc_vport *vport = NULL; struct Scsi_Host *shost = NULL; int error; uint32_t cfg_mode, intr_mode; /* Allocate memory for HBA structure */ phba = lpfc_hba_alloc(pdev); if (!phba) return -ENOMEM; /* Perform generic PCI device enabling operation */ error = lpfc_enable_pci_dev(phba); if (error) goto out_free_phba; /* Set up SLI API function jump table for PCI-device group-0 HBAs */ error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP); if (error) goto out_disable_pci_dev; /* Set up SLI-3 specific device PCI memory space */ error = lpfc_sli_pci_mem_setup(phba); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1402 Failed to set up pci memory space.\n"); goto out_disable_pci_dev; } /* Set up SLI-3 specific device driver resources */ error = lpfc_sli_driver_resource_setup(phba); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1404 Failed to set up driver resource.\n"); goto out_unset_pci_mem_s3; } /* Initialize and populate the iocb list per host */ error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1405 Failed to initialize iocb list.\n"); goto out_unset_driver_resource_s3; } /* Set up common device driver resources */ error = lpfc_setup_driver_resource_phase2(phba); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1406 Failed to set up driver resource.\n"); goto out_free_iocb_list; } /* Get the default values for Model Name and Description */ lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); /* Create SCSI host to the physical port */ error = lpfc_create_shost(phba); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1407 Failed to create scsi host.\n"); goto out_unset_driver_resource; } /* Configure sysfs attributes */ vport = phba->pport; error = lpfc_alloc_sysfs_attr(vport); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1476 Failed to allocate sysfs attr\n"); goto out_destroy_shost; } shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ /* Now, trying to enable interrupt and bring up the device */ cfg_mode = phba->cfg_use_msi; while (true) { /* Put device to a known state before enabling interrupt */ lpfc_stop_port(phba); /* Configure and enable interrupt */ intr_mode = lpfc_sli_enable_intr(phba, cfg_mode); if (intr_mode == LPFC_INTR_ERROR) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0431 Failed to enable interrupt.\n"); error = -ENODEV; goto out_free_sysfs_attr; } /* SLI-3 HBA setup */ if (lpfc_sli_hba_setup(phba)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1477 Failed to set up hba\n"); error = -ENODEV; goto out_remove_device; } /* Wait 50ms for the interrupts of previous mailbox commands */ msleep(50); /* Check active interrupts on message signaled interrupts */ if (intr_mode == 0 || phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) { /* Log the current active interrupt mode */ phba->intr_mode = intr_mode; lpfc_log_intr_mode(phba, intr_mode); break; } else { lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0447 Configure interrupt mode (%d) " "failed active interrupt test.\n", intr_mode); /* Disable the current interrupt mode */ lpfc_sli_disable_intr(phba); /* Try next level of interrupt mode */ cfg_mode = --intr_mode; } } /* Perform post initialization setup */ lpfc_post_init_setup(phba); /* Check if there are static vports to be created. */ lpfc_create_static_vport(phba); return 0; out_remove_device: lpfc_unset_hba(phba); out_free_sysfs_attr: lpfc_free_sysfs_attr(vport); out_destroy_shost: lpfc_destroy_shost(phba); out_unset_driver_resource: lpfc_unset_driver_resource_phase2(phba); out_free_iocb_list: lpfc_free_iocb_list(phba); out_unset_driver_resource_s3: lpfc_sli_driver_resource_unset(phba); out_unset_pci_mem_s3: lpfc_sli_pci_mem_unset(phba); out_disable_pci_dev: lpfc_disable_pci_dev(phba); if (shost) scsi_host_put(shost); out_free_phba: lpfc_hba_free(phba); return error; } /** * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem. * @pdev: pointer to PCI device * * This routine is to be called to disattach a device with SLI-3 interface * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is * removed from PCI bus, it performs all the necessary cleanup for the HBA * device to be removed from the PCI subsystem properly. **/ static void lpfc_pci_remove_one_s3(struct pci_dev *pdev) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; struct lpfc_vport **vports; struct lpfc_hba *phba = vport->phba; int i; spin_lock_irq(&phba->hbalock); vport->load_flag |= FC_UNLOADING; spin_unlock_irq(&phba->hbalock); lpfc_free_sysfs_attr(vport); /* Release all the vports against this physical port */ vports = lpfc_create_vport_work_array(phba); if (vports != NULL) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { if (vports[i]->port_type == LPFC_PHYSICAL_PORT) continue; fc_vport_terminate(vports[i]->fc_vport); } lpfc_destroy_vport_work_array(phba, vports); /* Remove FC host with the physical port */ fc_remove_host(shost); scsi_remove_host(shost); /* Clean up all nodes, mailboxes and IOs. */ lpfc_cleanup(vport); /* * Bring down the SLI Layer. This step disable all interrupts, * clears the rings, discards all mailbox commands, and resets * the HBA. */ /* HBA interrupt will be disabled after this call */ lpfc_sli_hba_down(phba); /* Stop kthread signal shall trigger work_done one more time */ kthread_stop(phba->worker_thread); /* Final cleanup of txcmplq and reset the HBA */ lpfc_sli_brdrestart(phba); kfree(phba->vpi_bmask); kfree(phba->vpi_ids); lpfc_stop_hba_timers(phba); spin_lock_irq(&phba->port_list_lock); list_del_init(&vport->listentry); spin_unlock_irq(&phba->port_list_lock); lpfc_debugfs_terminate(vport); /* Disable SR-IOV if enabled */ if (phba->cfg_sriov_nr_virtfn) pci_disable_sriov(pdev); /* Disable interrupt */ lpfc_sli_disable_intr(phba); scsi_host_put(shost); /* * Call scsi_free before mem_free since scsi bufs are released to their * corresponding pools here. */ lpfc_scsi_free(phba); lpfc_free_iocb_list(phba); lpfc_mem_free_all(phba); dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), phba->hbqslimp.virt, phba->hbqslimp.phys); /* Free resources associated with SLI2 interface */ dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p.virt, phba->slim2p.phys); /* unmap adapter SLIM and Control Registers */ iounmap(phba->ctrl_regs_memmap_p); iounmap(phba->slim_memmap_p); lpfc_hba_free(phba); pci_release_mem_regions(pdev); pci_disable_device(pdev); } /** * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt * @dev_d: pointer to device * * This routine is to be called from the kernel's PCI subsystem to support * system Power Management (PM) to device with SLI-3 interface spec. When * PM invokes this method, it quiesces the device by stopping the driver's * worker thread for the device, turning off device's interrupt and DMA, * and bring the device offline. Note that as the driver implements the * minimum PM requirements to a power-aware driver's PM support for the * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) * to the suspend() method call will be treated as SUSPEND and the driver will * fully reinitialize its device during resume() method call, the driver will * set device to PCI_D3hot state in PCI config space instead of setting it * according to the @msg provided by the PM. * * Return code * 0 - driver suspended the device * Error otherwise **/ static int __maybe_unused lpfc_pci_suspend_one_s3(struct device *dev_d) { struct Scsi_Host *shost = dev_get_drvdata(dev_d); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0473 PCI device Power Management suspend.\n"); /* Bring down the device */ lpfc_offline_prep(phba, LPFC_MBX_WAIT); lpfc_offline(phba); kthread_stop(phba->worker_thread); /* Disable interrupt from device */ lpfc_sli_disable_intr(phba); return 0; } /** * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt * @dev_d: pointer to device * * This routine is to be called from the kernel's PCI subsystem to support * system Power Management (PM) to device with SLI-3 interface spec. When PM * invokes this method, it restores the device's PCI config space state and * fully reinitializes the device and brings it online. Note that as the * driver implements the minimum PM requirements to a power-aware driver's * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, * FREEZE) to the suspend() method call will be treated as SUSPEND and the * driver will fully reinitialize its device during resume() method call, * the device will be set to PCI_D0 directly in PCI config space before * restoring the state. * * Return code * 0 - driver suspended the device * Error otherwise **/ static int __maybe_unused lpfc_pci_resume_one_s3(struct device *dev_d) { struct Scsi_Host *shost = dev_get_drvdata(dev_d); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; uint32_t intr_mode; int error; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0452 PCI device Power Management resume.\n"); /* Startup the kernel thread for this host adapter. */ phba->worker_thread = kthread_run(lpfc_do_work, phba, "lpfc_worker_%d", phba->brd_no); if (IS_ERR(phba->worker_thread)) { error = PTR_ERR(phba->worker_thread); lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0434 PM resume failed to start worker " "thread: error=x%x.\n", error); return error; } /* Init cpu_map array */ lpfc_cpu_map_array_init(phba); /* Init hba_eq_hdl array */ lpfc_hba_eq_hdl_array_init(phba); /* Configure and enable interrupt */ intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); if (intr_mode == LPFC_INTR_ERROR) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0430 PM resume Failed to enable interrupt\n"); return -EIO; } else phba->intr_mode = intr_mode; /* Restart HBA and bring it online */ lpfc_sli_brdrestart(phba); lpfc_online(phba); /* Log the current active interrupt mode */ lpfc_log_intr_mode(phba, phba->intr_mode); return 0; } /** * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover * @phba: pointer to lpfc hba data structure. * * This routine is called to prepare the SLI3 device for PCI slot recover. It * aborts all the outstanding SCSI I/Os to the pci device. **/ static void lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2723 PCI channel I/O abort preparing for recovery\n"); /* * There may be errored I/Os through HBA, abort all I/Os on txcmplq * and let the SCSI mid-layer to retry them to recover. */ lpfc_sli_abort_fcp_rings(phba); } /** * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset * @phba: pointer to lpfc hba data structure. * * This routine is called to prepare the SLI3 device for PCI slot reset. It * disables the device interrupt and pci device, and aborts the internal FCP * pending I/Os. **/ static void lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2710 PCI channel disable preparing for reset\n"); /* Block any management I/Os to the device */ lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); /* Block all SCSI devices' I/Os on the host */ lpfc_scsi_dev_block(phba); /* Flush all driver's outstanding SCSI I/Os as we are to reset */ lpfc_sli_flush_io_rings(phba); /* stop all timers */ lpfc_stop_hba_timers(phba); /* Disable interrupt and pci device */ lpfc_sli_disable_intr(phba); pci_disable_device(phba->pcidev); } /** * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable * @phba: pointer to lpfc hba data structure. * * This routine is called to prepare the SLI3 device for PCI slot permanently * disabling. It blocks the SCSI transport layer traffic and flushes the FCP * pending I/Os. **/ static void lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2711 PCI channel permanent disable for failure\n"); /* Block all SCSI devices' I/Os on the host */ lpfc_scsi_dev_block(phba); lpfc_sli4_prep_dev_for_reset(phba); /* stop all timers */ lpfc_stop_hba_timers(phba); /* Clean up all driver's outstanding SCSI I/Os */ lpfc_sli_flush_io_rings(phba); } /** * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error * @pdev: pointer to PCI device. * @state: the current PCI connection state. * * This routine is called from the PCI subsystem for I/O error handling to * device with SLI-3 interface spec. This function is called by the PCI * subsystem after a PCI bus error affecting this device has been detected. * When this function is invoked, it will need to stop all the I/Os and * interrupt(s) to the device. Once that is done, it will return * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery * as desired. * * Return codes * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery * PCI_ERS_RESULT_DISCONNECT - device could not be recovered **/ static pci_ers_result_t lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; switch (state) { case pci_channel_io_normal: /* Non-fatal error, prepare for recovery */ lpfc_sli_prep_dev_for_recover(phba); return PCI_ERS_RESULT_CAN_RECOVER; case pci_channel_io_frozen: /* Fatal error, prepare for slot reset */ lpfc_sli_prep_dev_for_reset(phba); return PCI_ERS_RESULT_NEED_RESET; case pci_channel_io_perm_failure: /* Permanent failure, prepare for device down */ lpfc_sli_prep_dev_for_perm_failure(phba); return PCI_ERS_RESULT_DISCONNECT; default: /* Unknown state, prepare and request slot reset */ lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0472 Unknown PCI error state: x%x\n", state); lpfc_sli_prep_dev_for_reset(phba); return PCI_ERS_RESULT_NEED_RESET; } } /** * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch. * @pdev: pointer to PCI device. * * This routine is called from the PCI subsystem for error handling to * device with SLI-3 interface spec. This is called after PCI bus has been * reset to restart the PCI card from scratch, as if from a cold-boot. * During the PCI subsystem error recovery, after driver returns * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error * recovery and then call this routine before calling the .resume method * to recover the device. This function will initialize the HBA device, * enable the interrupt, but it will just put the HBA to offline state * without passing any I/O traffic. * * Return codes * PCI_ERS_RESULT_RECOVERED - the device has been recovered * PCI_ERS_RESULT_DISCONNECT - device could not be recovered */ static pci_ers_result_t lpfc_io_slot_reset_s3(struct pci_dev *pdev) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; struct lpfc_sli *psli = &phba->sli; uint32_t intr_mode; dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); if (pci_enable_device_mem(pdev)) { printk(KERN_ERR "lpfc: Cannot re-enable " "PCI device after reset.\n"); return PCI_ERS_RESULT_DISCONNECT; } pci_restore_state(pdev); /* * As the new kernel behavior of pci_restore_state() API call clears * device saved_state flag, need to save the restored state again. */ pci_save_state(pdev); if (pdev->is_busmaster) pci_set_master(pdev); spin_lock_irq(&phba->hbalock); psli->sli_flag &= ~LPFC_SLI_ACTIVE; spin_unlock_irq(&phba->hbalock); /* Configure and enable interrupt */ intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); if (intr_mode == LPFC_INTR_ERROR) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0427 Cannot re-enable interrupt after " "slot reset.\n"); return PCI_ERS_RESULT_DISCONNECT; } else phba->intr_mode = intr_mode; /* Take device offline, it will perform cleanup */ lpfc_offline_prep(phba, LPFC_MBX_WAIT); lpfc_offline(phba); lpfc_sli_brdrestart(phba); /* Log the current active interrupt mode */ lpfc_log_intr_mode(phba, phba->intr_mode); return PCI_ERS_RESULT_RECOVERED; } /** * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device. * @pdev: pointer to PCI device * * This routine is called from the PCI subsystem for error handling to device * with SLI-3 interface spec. It is called when kernel error recovery tells * the lpfc driver that it is ok to resume normal PCI operation after PCI bus * error recovery. After this call, traffic can start to flow from this device * again. */ static void lpfc_io_resume_s3(struct pci_dev *pdev) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; /* Bring device online, it will be no-op for non-fatal error resume */ lpfc_online(phba); } /** * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve * @phba: pointer to lpfc hba data structure. * * returns the number of ELS/CT IOCBs to reserve **/ int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba) { int max_xri = phba->sli4_hba.max_cfg_param.max_xri; if (phba->sli_rev == LPFC_SLI_REV4) { if (max_xri <= 100) return 10; else if (max_xri <= 256) return 25; else if (max_xri <= 512) return 50; else if (max_xri <= 1024) return 100; else if (max_xri <= 1536) return 150; else if (max_xri <= 2048) return 200; else return 250; } else return 0; } /** * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve * @phba: pointer to lpfc hba data structure. * * returns the number of ELS/CT + NVMET IOCBs to reserve **/ int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba) { int max_xri = lpfc_sli4_get_els_iocb_cnt(phba); if (phba->nvmet_support) max_xri += LPFC_NVMET_BUF_POST; return max_xri; } static int lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset, uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize, const struct firmware *fw) { int rc; u8 sli_family; sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf); /* Three cases: (1) FW was not supported on the detected adapter. * (2) FW update has been locked out administratively. * (3) Some other error during FW update. * In each case, an unmaskable message is written to the console * for admin diagnosis. */ if (offset == ADD_STATUS_FW_NOT_SUPPORTED || (sli_family == LPFC_SLI_INTF_FAMILY_G6 && magic_number != MAGIC_NUMBER_G6) || (sli_family == LPFC_SLI_INTF_FAMILY_G7 && magic_number != MAGIC_NUMBER_G7) || (sli_family == LPFC_SLI_INTF_FAMILY_G7P && magic_number != MAGIC_NUMBER_G7P)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3030 This firmware version is not supported on" " this HBA model. Device:%x Magic:%x Type:%x " "ID:%x Size %d %zd\n", phba->pcidev->device, magic_number, ftype, fid, fsize, fw->size); rc = -EINVAL; } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3021 Firmware downloads have been prohibited " "by a system configuration setting on " "Device:%x Magic:%x Type:%x ID:%x Size %d " "%zd\n", phba->pcidev->device, magic_number, ftype, fid, fsize, fw->size); rc = -EACCES; } else { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "3022 FW Download failed. Add Status x%x " "Device:%x Magic:%x Type:%x ID:%x Size %d " "%zd\n", offset, phba->pcidev->device, magic_number, ftype, fid, fsize, fw->size); rc = -EIO; } return rc; } /** * lpfc_write_firmware - attempt to write a firmware image to the port * @fw: pointer to firmware image returned from request_firmware. * @context: pointer to firmware image returned from request_firmware. * **/ static void lpfc_write_firmware(const struct firmware *fw, void *context) { struct lpfc_hba *phba = (struct lpfc_hba *)context; char fwrev[FW_REV_STR_SIZE]; struct lpfc_grp_hdr *image; struct list_head dma_buffer_list; int i, rc = 0; struct lpfc_dmabuf *dmabuf, *next; uint32_t offset = 0, temp_offset = 0; uint32_t magic_number, ftype, fid, fsize; /* It can be null in no-wait mode, sanity check */ if (!fw) { rc = -ENXIO; goto out; } image = (struct lpfc_grp_hdr *)fw->data; magic_number = be32_to_cpu(image->magic_number); ftype = bf_get_be32(lpfc_grp_hdr_file_type, image); fid = bf_get_be32(lpfc_grp_hdr_id, image); fsize = be32_to_cpu(image->size); INIT_LIST_HEAD(&dma_buffer_list); lpfc_decode_firmware_rev(phba, fwrev, 1); if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) { lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI, "3023 Updating Firmware, Current Version:%s " "New Version:%s\n", fwrev, image->revision); for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) { dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); if (!dmabuf) { rc = -ENOMEM; goto release_out; } dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, &dmabuf->phys, GFP_KERNEL); if (!dmabuf->virt) { kfree(dmabuf); rc = -ENOMEM; goto release_out; } list_add_tail(&dmabuf->list, &dma_buffer_list); } while (offset < fw->size) { temp_offset = offset; list_for_each_entry(dmabuf, &dma_buffer_list, list) { if (temp_offset + SLI4_PAGE_SIZE > fw->size) { memcpy(dmabuf->virt, fw->data + temp_offset, fw->size - temp_offset); temp_offset = fw->size; break; } memcpy(dmabuf->virt, fw->data + temp_offset, SLI4_PAGE_SIZE); temp_offset += SLI4_PAGE_SIZE; } rc = lpfc_wr_object(phba, &dma_buffer_list, (fw->size - offset), &offset); if (rc) { rc = lpfc_log_write_firmware_error(phba, offset, magic_number, ftype, fid, fsize, fw); goto release_out; } } rc = offset; } else lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI, "3029 Skipped Firmware update, Current " "Version:%s New Version:%s\n", fwrev, image->revision); release_out: list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) { list_del(&dmabuf->list); dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, dmabuf->virt, dmabuf->phys); kfree(dmabuf); } release_firmware(fw); out: if (rc < 0) lpfc_log_msg(phba, KERN_ERR, LOG_INIT | LOG_SLI, "3062 Firmware update error, status %d.\n", rc); else lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI, "3024 Firmware update success: size %d.\n", rc); } /** * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade * @phba: pointer to lpfc hba data structure. * @fw_upgrade: which firmware to update. * * This routine is called to perform Linux generic firmware upgrade on device * that supports such feature. **/ int lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade) { uint8_t file_name[ELX_MODEL_NAME_SIZE]; int ret; const struct firmware *fw; /* Only supported on SLI4 interface type 2 for now */ if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < LPFC_SLI_INTF_IF_TYPE_2) return -EPERM; snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName); if (fw_upgrade == INT_FW_UPGRADE) { ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, file_name, &phba->pcidev->dev, GFP_KERNEL, (void *)phba, lpfc_write_firmware); } else if (fw_upgrade == RUN_FW_UPGRADE) { ret = request_firmware(&fw, file_name, &phba->pcidev->dev); if (!ret) lpfc_write_firmware(fw, (void *)phba); } else { ret = -EINVAL; } return ret; } /** * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys * @pdev: pointer to PCI device * @pid: pointer to PCI device identifier * * This routine is called from the kernel's PCI subsystem to device with * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific * information of the device and driver to see if the driver state that it * can support this kind of device. If the match is successful, the driver * core invokes this routine. If this routine determines it can claim the HBA, * it does all the initialization that it needs to do to handle the HBA * properly. * * Return code * 0 - driver can claim the device * negative value - driver can not claim the device **/ static int lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid) { struct lpfc_hba *phba; struct lpfc_vport *vport = NULL; struct Scsi_Host *shost = NULL; int error; uint32_t cfg_mode, intr_mode; /* Allocate memory for HBA structure */ phba = lpfc_hba_alloc(pdev); if (!phba) return -ENOMEM; INIT_LIST_HEAD(&phba->poll_list); /* Perform generic PCI device enabling operation */ error = lpfc_enable_pci_dev(phba); if (error) goto out_free_phba; /* Set up SLI API function jump table for PCI-device group-1 HBAs */ error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC); if (error) goto out_disable_pci_dev; /* Set up SLI-4 specific device PCI memory space */ error = lpfc_sli4_pci_mem_setup(phba); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1410 Failed to set up pci memory space.\n"); goto out_disable_pci_dev; } /* Set up SLI-4 Specific device driver resources */ error = lpfc_sli4_driver_resource_setup(phba); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1412 Failed to set up driver resource.\n"); goto out_unset_pci_mem_s4; } INIT_LIST_HEAD(&phba->active_rrq_list); INIT_LIST_HEAD(&phba->fcf.fcf_pri_list); /* Set up common device driver resources */ error = lpfc_setup_driver_resource_phase2(phba); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1414 Failed to set up driver resource.\n"); goto out_unset_driver_resource_s4; } /* Get the default values for Model Name and Description */ lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); /* Now, trying to enable interrupt and bring up the device */ cfg_mode = phba->cfg_use_msi; /* Put device to a known state before enabling interrupt */ phba->pport = NULL; lpfc_stop_port(phba); /* Init cpu_map array */ lpfc_cpu_map_array_init(phba); /* Init hba_eq_hdl array */ lpfc_hba_eq_hdl_array_init(phba); /* Configure and enable interrupt */ intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode); if (intr_mode == LPFC_INTR_ERROR) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0426 Failed to enable interrupt.\n"); error = -ENODEV; goto out_unset_driver_resource; } /* Default to single EQ for non-MSI-X */ if (phba->intr_type != MSIX) { phba->cfg_irq_chann = 1; if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { if (phba->nvmet_support) phba->cfg_nvmet_mrq = 1; } } lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); /* Create SCSI host to the physical port */ error = lpfc_create_shost(phba); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1415 Failed to create scsi host.\n"); goto out_disable_intr; } vport = phba->pport; shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ /* Configure sysfs attributes */ error = lpfc_alloc_sysfs_attr(vport); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "1416 Failed to allocate sysfs attr\n"); goto out_destroy_shost; } /* Set up SLI-4 HBA */ if (lpfc_sli4_hba_setup(phba)) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1421 Failed to set up hba\n"); error = -ENODEV; goto out_free_sysfs_attr; } /* Log the current active interrupt mode */ phba->intr_mode = intr_mode; lpfc_log_intr_mode(phba, intr_mode); /* Perform post initialization setup */ lpfc_post_init_setup(phba); /* NVME support in FW earlier in the driver load corrects the * FC4 type making a check for nvme_support unnecessary. */ if (phba->nvmet_support == 0) { if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { /* Create NVME binding with nvme_fc_transport. This * ensures the vport is initialized. If the localport * create fails, it should not unload the driver to * support field issues. */ error = lpfc_nvme_create_localport(vport); if (error) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "6004 NVME registration " "failed, error x%x\n", error); } } } /* check for firmware upgrade or downgrade */ if (phba->cfg_request_firmware_upgrade) lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE); /* Check if there are static vports to be created. */ lpfc_create_static_vport(phba); timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0); cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp); return 0; out_free_sysfs_attr: lpfc_free_sysfs_attr(vport); out_destroy_shost: lpfc_destroy_shost(phba); out_disable_intr: lpfc_sli4_disable_intr(phba); out_unset_driver_resource: lpfc_unset_driver_resource_phase2(phba); out_unset_driver_resource_s4: lpfc_sli4_driver_resource_unset(phba); out_unset_pci_mem_s4: lpfc_sli4_pci_mem_unset(phba); out_disable_pci_dev: lpfc_disable_pci_dev(phba); if (shost) scsi_host_put(shost); out_free_phba: lpfc_hba_free(phba); return error; } /** * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem * @pdev: pointer to PCI device * * This routine is called from the kernel's PCI subsystem to device with * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is * removed from PCI bus, it performs all the necessary cleanup for the HBA * device to be removed from the PCI subsystem properly. **/ static void lpfc_pci_remove_one_s4(struct pci_dev *pdev) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; struct lpfc_vport **vports; struct lpfc_hba *phba = vport->phba; int i; /* Mark the device unloading flag */ spin_lock_irq(&phba->hbalock); vport->load_flag |= FC_UNLOADING; spin_unlock_irq(&phba->hbalock); if (phba->cgn_i) lpfc_unreg_congestion_buf(phba); lpfc_free_sysfs_attr(vport); /* Release all the vports against this physical port */ vports = lpfc_create_vport_work_array(phba); if (vports != NULL) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { if (vports[i]->port_type == LPFC_PHYSICAL_PORT) continue; fc_vport_terminate(vports[i]->fc_vport); } lpfc_destroy_vport_work_array(phba, vports); /* Remove FC host with the physical port */ fc_remove_host(shost); scsi_remove_host(shost); /* Perform ndlp cleanup on the physical port. The nvme and nvmet * localports are destroyed after to cleanup all transport memory. */ lpfc_cleanup(vport); lpfc_nvmet_destroy_targetport(phba); lpfc_nvme_destroy_localport(vport); /* De-allocate multi-XRI pools */ if (phba->cfg_xri_rebalancing) lpfc_destroy_multixri_pools(phba); /* * Bring down the SLI Layer. This step disables all interrupts, * clears the rings, discards all mailbox commands, and resets * the HBA FCoE function. */ lpfc_debugfs_terminate(vport); lpfc_stop_hba_timers(phba); spin_lock_irq(&phba->port_list_lock); list_del_init(&vport->listentry); spin_unlock_irq(&phba->port_list_lock); /* Perform scsi free before driver resource_unset since scsi * buffers are released to their corresponding pools here. */ lpfc_io_free(phba); lpfc_free_iocb_list(phba); lpfc_sli4_hba_unset(phba); lpfc_unset_driver_resource_phase2(phba); lpfc_sli4_driver_resource_unset(phba); /* Unmap adapter Control and Doorbell registers */ lpfc_sli4_pci_mem_unset(phba); /* Release PCI resources and disable device's PCI function */ scsi_host_put(shost); lpfc_disable_pci_dev(phba); /* Finally, free the driver's device data structure */ lpfc_hba_free(phba); return; } /** * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt * @dev_d: pointer to device * * This routine is called from the kernel's PCI subsystem to support system * Power Management (PM) to device with SLI-4 interface spec. When PM invokes * this method, it quiesces the device by stopping the driver's worker * thread for the device, turning off device's interrupt and DMA, and bring * the device offline. Note that as the driver implements the minimum PM * requirements to a power-aware driver's PM support for suspend/resume -- all * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend() * method call will be treated as SUSPEND and the driver will fully * reinitialize its device during resume() method call, the driver will set * device to PCI_D3hot state in PCI config space instead of setting it * according to the @msg provided by the PM. * * Return code * 0 - driver suspended the device * Error otherwise **/ static int __maybe_unused lpfc_pci_suspend_one_s4(struct device *dev_d) { struct Scsi_Host *shost = dev_get_drvdata(dev_d); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "2843 PCI device Power Management suspend.\n"); /* Bring down the device */ lpfc_offline_prep(phba, LPFC_MBX_WAIT); lpfc_offline(phba); kthread_stop(phba->worker_thread); /* Disable interrupt from device */ lpfc_sli4_disable_intr(phba); lpfc_sli4_queue_destroy(phba); return 0; } /** * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt * @dev_d: pointer to device * * This routine is called from the kernel's PCI subsystem to support system * Power Management (PM) to device with SLI-4 interface spac. When PM invokes * this method, it restores the device's PCI config space state and fully * reinitializes the device and brings it online. Note that as the driver * implements the minimum PM requirements to a power-aware driver's PM for * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) * to the suspend() method call will be treated as SUSPEND and the driver * will fully reinitialize its device during resume() method call, the device * will be set to PCI_D0 directly in PCI config space before restoring the * state. * * Return code * 0 - driver suspended the device * Error otherwise **/ static int __maybe_unused lpfc_pci_resume_one_s4(struct device *dev_d) { struct Scsi_Host *shost = dev_get_drvdata(dev_d); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; uint32_t intr_mode; int error; lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "0292 PCI device Power Management resume.\n"); /* Startup the kernel thread for this host adapter. */ phba->worker_thread = kthread_run(lpfc_do_work, phba, "lpfc_worker_%d", phba->brd_no); if (IS_ERR(phba->worker_thread)) { error = PTR_ERR(phba->worker_thread); lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0293 PM resume failed to start worker " "thread: error=x%x.\n", error); return error; } /* Configure and enable interrupt */ intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); if (intr_mode == LPFC_INTR_ERROR) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "0294 PM resume Failed to enable interrupt\n"); return -EIO; } else phba->intr_mode = intr_mode; /* Restart HBA and bring it online */ lpfc_sli_brdrestart(phba); lpfc_online(phba); /* Log the current active interrupt mode */ lpfc_log_intr_mode(phba, phba->intr_mode); return 0; } /** * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover * @phba: pointer to lpfc hba data structure. * * This routine is called to prepare the SLI4 device for PCI slot recover. It * aborts all the outstanding SCSI I/Os to the pci device. **/ static void lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2828 PCI channel I/O abort preparing for recovery\n"); /* * There may be errored I/Os through HBA, abort all I/Os on txcmplq * and let the SCSI mid-layer to retry them to recover. */ lpfc_sli_abort_fcp_rings(phba); } /** * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset * @phba: pointer to lpfc hba data structure. * * This routine is called to prepare the SLI4 device for PCI slot reset. It * disables the device interrupt and pci device, and aborts the internal FCP * pending I/Os. **/ static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba) { int offline = pci_channel_offline(phba->pcidev); lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "2826 PCI channel disable preparing for reset offline" " %d\n", offline); /* Block any management I/Os to the device */ lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT); /* HBA_PCI_ERR was set in io_error_detect */ lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); /* Flush all driver's outstanding I/Os as we are to reset */ lpfc_sli_flush_io_rings(phba); lpfc_offline(phba); /* stop all timers */ lpfc_stop_hba_timers(phba); lpfc_sli4_queue_destroy(phba); /* Disable interrupt and pci device */ lpfc_sli4_disable_intr(phba); pci_disable_device(phba->pcidev); } /** * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable * @phba: pointer to lpfc hba data structure. * * This routine is called to prepare the SLI4 device for PCI slot permanently * disabling. It blocks the SCSI transport layer traffic and flushes the FCP * pending I/Os. **/ static void lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2827 PCI channel permanent disable for failure\n"); /* Block all SCSI devices' I/Os on the host */ lpfc_scsi_dev_block(phba); /* stop all timers */ lpfc_stop_hba_timers(phba); /* Clean up all driver's outstanding I/Os */ lpfc_sli_flush_io_rings(phba); } /** * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device * @pdev: pointer to PCI device. * @state: the current PCI connection state. * * This routine is called from the PCI subsystem for error handling to device * with SLI-4 interface spec. This function is called by the PCI subsystem * after a PCI bus error affecting this device has been detected. When this * function is invoked, it will need to stop all the I/Os and interrupt(s) * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET * for the PCI subsystem to perform proper recovery as desired. * * Return codes * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery * PCI_ERS_RESULT_DISCONNECT - device could not be recovered **/ static pci_ers_result_t lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; bool hba_pci_err; switch (state) { case pci_channel_io_normal: /* Non-fatal error, prepare for recovery */ lpfc_sli4_prep_dev_for_recover(phba); return PCI_ERS_RESULT_CAN_RECOVER; case pci_channel_io_frozen: hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); /* Fatal error, prepare for slot reset */ if (!hba_pci_err) lpfc_sli4_prep_dev_for_reset(phba); else lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "2832 Already handling PCI error " "state: x%x\n", state); return PCI_ERS_RESULT_NEED_RESET; case pci_channel_io_perm_failure: set_bit(HBA_PCI_ERR, &phba->bit_flags); /* Permanent failure, prepare for device down */ lpfc_sli4_prep_dev_for_perm_failure(phba); return PCI_ERS_RESULT_DISCONNECT; default: hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); if (!hba_pci_err) lpfc_sli4_prep_dev_for_reset(phba); /* Unknown state, prepare and request slot reset */ lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2825 Unknown PCI error state: x%x\n", state); lpfc_sli4_prep_dev_for_reset(phba); return PCI_ERS_RESULT_NEED_RESET; } } /** * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch * @pdev: pointer to PCI device. * * This routine is called from the PCI subsystem for error handling to device * with SLI-4 interface spec. It is called after PCI bus has been reset to * restart the PCI card from scratch, as if from a cold-boot. During the * PCI subsystem error recovery, after the driver returns * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error * recovery and then call this routine before calling the .resume method to * recover the device. This function will initialize the HBA device, enable * the interrupt, but it will just put the HBA to offline state without * passing any I/O traffic. * * Return codes * PCI_ERS_RESULT_RECOVERED - the device has been recovered * PCI_ERS_RESULT_DISCONNECT - device could not be recovered */ static pci_ers_result_t lpfc_io_slot_reset_s4(struct pci_dev *pdev) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; struct lpfc_sli *psli = &phba->sli; uint32_t intr_mode; bool hba_pci_err; dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); if (pci_enable_device_mem(pdev)) { printk(KERN_ERR "lpfc: Cannot re-enable " "PCI device after reset.\n"); return PCI_ERS_RESULT_DISCONNECT; } pci_restore_state(pdev); hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags); if (!hba_pci_err) dev_info(&pdev->dev, "hba_pci_err was not set, recovering slot reset.\n"); /* * As the new kernel behavior of pci_restore_state() API call clears * device saved_state flag, need to save the restored state again. */ pci_save_state(pdev); if (pdev->is_busmaster) pci_set_master(pdev); spin_lock_irq(&phba->hbalock); psli->sli_flag &= ~LPFC_SLI_ACTIVE; spin_unlock_irq(&phba->hbalock); /* Init cpu_map array */ lpfc_cpu_map_array_init(phba); /* Configure and enable interrupt */ intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); if (intr_mode == LPFC_INTR_ERROR) { lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "2824 Cannot re-enable interrupt after " "slot reset.\n"); return PCI_ERS_RESULT_DISCONNECT; } else phba->intr_mode = intr_mode; lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); /* Log the current active interrupt mode */ lpfc_log_intr_mode(phba, phba->intr_mode); return PCI_ERS_RESULT_RECOVERED; } /** * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device * @pdev: pointer to PCI device * * This routine is called from the PCI subsystem for error handling to device * with SLI-4 interface spec. It is called when kernel error recovery tells * the lpfc driver that it is ok to resume normal PCI operation after PCI bus * error recovery. After this call, traffic can start to flow from this device * again. **/ static void lpfc_io_resume_s4(struct pci_dev *pdev) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; /* * In case of slot reset, as function reset is performed through * mailbox command which needs DMA to be enabled, this operation * has to be moved to the io resume phase. Taking device offline * will perform the necessary cleanup. */ if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { /* Perform device reset */ lpfc_sli_brdrestart(phba); /* Bring the device back online */ lpfc_online(phba); } } /** * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem * @pdev: pointer to PCI device * @pid: pointer to PCI device identifier * * This routine is to be registered to the kernel's PCI subsystem. When an * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks * at PCI device-specific information of the device and driver to see if the * driver state that it can support this kind of device. If the match is * successful, the driver core invokes this routine. This routine dispatches * the action to the proper SLI-3 or SLI-4 device probing routine, which will * do all the initialization that it needs to do to handle the HBA device * properly. * * Return code * 0 - driver can claim the device * negative value - driver can not claim the device **/ static int lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) { int rc; struct lpfc_sli_intf intf; if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) return -ENODEV; if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) rc = lpfc_pci_probe_one_s4(pdev, pid); else rc = lpfc_pci_probe_one_s3(pdev, pid); return rc; } /** * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem * @pdev: pointer to PCI device * * This routine is to be registered to the kernel's PCI subsystem. When an * Emulex HBA is removed from PCI bus, the driver core invokes this routine. * This routine dispatches the action to the proper SLI-3 or SLI-4 device * remove routine, which will perform all the necessary cleanup for the * device to be removed from the PCI subsystem properly. **/ static void lpfc_pci_remove_one(struct pci_dev *pdev) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; switch (phba->pci_dev_grp) { case LPFC_PCI_DEV_LP: lpfc_pci_remove_one_s3(pdev); break; case LPFC_PCI_DEV_OC: lpfc_pci_remove_one_s4(pdev); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1424 Invalid PCI device group: 0x%x\n", phba->pci_dev_grp); break; } return; } /** * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management * @dev: pointer to device * * This routine is to be registered to the kernel's PCI subsystem to support * system Power Management (PM). When PM invokes this method, it dispatches * the action to the proper SLI-3 or SLI-4 device suspend routine, which will * suspend the device. * * Return code * 0 - driver suspended the device * Error otherwise **/ static int __maybe_unused lpfc_pci_suspend_one(struct device *dev) { struct Scsi_Host *shost = dev_get_drvdata(dev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; int rc = -ENODEV; switch (phba->pci_dev_grp) { case LPFC_PCI_DEV_LP: rc = lpfc_pci_suspend_one_s3(dev); break; case LPFC_PCI_DEV_OC: rc = lpfc_pci_suspend_one_s4(dev); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1425 Invalid PCI device group: 0x%x\n", phba->pci_dev_grp); break; } return rc; } /** * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management * @dev: pointer to device * * This routine is to be registered to the kernel's PCI subsystem to support * system Power Management (PM). When PM invokes this method, it dispatches * the action to the proper SLI-3 or SLI-4 device resume routine, which will * resume the device. * * Return code * 0 - driver suspended the device * Error otherwise **/ static int __maybe_unused lpfc_pci_resume_one(struct device *dev) { struct Scsi_Host *shost = dev_get_drvdata(dev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; int rc = -ENODEV; switch (phba->pci_dev_grp) { case LPFC_PCI_DEV_LP: rc = lpfc_pci_resume_one_s3(dev); break; case LPFC_PCI_DEV_OC: rc = lpfc_pci_resume_one_s4(dev); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1426 Invalid PCI device group: 0x%x\n", phba->pci_dev_grp); break; } return rc; } /** * lpfc_io_error_detected - lpfc method for handling PCI I/O error * @pdev: pointer to PCI device. * @state: the current PCI connection state. * * This routine is registered to the PCI subsystem for error handling. This * function is called by the PCI subsystem after a PCI bus error affecting * this device has been detected. When this routine is invoked, it dispatches * the action to the proper SLI-3 or SLI-4 device error detected handling * routine, which will perform the proper error detected operation. * * Return codes * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery * PCI_ERS_RESULT_DISCONNECT - device could not be recovered **/ static pci_ers_result_t lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; if (phba->link_state == LPFC_HBA_ERROR && phba->hba_flag & HBA_IOQ_FLUSH) return PCI_ERS_RESULT_NEED_RESET; switch (phba->pci_dev_grp) { case LPFC_PCI_DEV_LP: rc = lpfc_io_error_detected_s3(pdev, state); break; case LPFC_PCI_DEV_OC: rc = lpfc_io_error_detected_s4(pdev, state); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1427 Invalid PCI device group: 0x%x\n", phba->pci_dev_grp); break; } return rc; } /** * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch * @pdev: pointer to PCI device. * * This routine is registered to the PCI subsystem for error handling. This * function is called after PCI bus has been reset to restart the PCI card * from scratch, as if from a cold-boot. When this routine is invoked, it * dispatches the action to the proper SLI-3 or SLI-4 device reset handling * routine, which will perform the proper device reset. * * Return codes * PCI_ERS_RESULT_RECOVERED - the device has been recovered * PCI_ERS_RESULT_DISCONNECT - device could not be recovered **/ static pci_ers_result_t lpfc_io_slot_reset(struct pci_dev *pdev) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; switch (phba->pci_dev_grp) { case LPFC_PCI_DEV_LP: rc = lpfc_io_slot_reset_s3(pdev); break; case LPFC_PCI_DEV_OC: rc = lpfc_io_slot_reset_s4(pdev); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1428 Invalid PCI device group: 0x%x\n", phba->pci_dev_grp); break; } return rc; } /** * lpfc_io_resume - lpfc method for resuming PCI I/O operation * @pdev: pointer to PCI device * * This routine is registered to the PCI subsystem for error handling. It * is called when kernel error recovery tells the lpfc driver that it is * OK to resume normal PCI operation after PCI bus error recovery. When * this routine is invoked, it dispatches the action to the proper SLI-3 * or SLI-4 device io_resume routine, which will resume the device operation. **/ static void lpfc_io_resume(struct pci_dev *pdev) { struct Scsi_Host *shost = pci_get_drvdata(pdev); struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; switch (phba->pci_dev_grp) { case LPFC_PCI_DEV_LP: lpfc_io_resume_s3(pdev); break; case LPFC_PCI_DEV_OC: lpfc_io_resume_s4(pdev); break; default: lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, "1429 Invalid PCI device group: 0x%x\n", phba->pci_dev_grp); break; } return; } /** * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter * @phba: pointer to lpfc hba data structure. * * This routine checks to see if OAS is supported for this adapter. If * supported, the configure Flash Optimized Fabric flag is set. Otherwise, * the enable oas flag is cleared and the pool created for OAS device data * is destroyed. * **/ static void lpfc_sli4_oas_verify(struct lpfc_hba *phba) { if (!phba->cfg_EnableXLane) return; if (phba->sli4_hba.pc_sli4_params.oas_supported) { phba->cfg_fof = 1; } else { phba->cfg_fof = 0; mempool_destroy(phba->device_data_mem_pool); phba->device_data_mem_pool = NULL; } return; } /** * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter * @phba: pointer to lpfc hba data structure. * * This routine checks to see if RAS is supported by the adapter. Check the * function through which RAS support enablement is to be done. **/ void lpfc_sli4_ras_init(struct lpfc_hba *phba) { /* if ASIC_GEN_NUM >= 0xC) */ if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_IF_TYPE_6) || (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_FAMILY_G6)) { phba->ras_fwlog.ras_hwsupport = true; if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) && phba->cfg_ras_fwlog_buffsize) phba->ras_fwlog.ras_enabled = true; else phba->ras_fwlog.ras_enabled = false; } else { phba->ras_fwlog.ras_hwsupport = false; } } MODULE_DEVICE_TABLE(pci, lpfc_id_table); static const struct pci_error_handlers lpfc_err_handler = { .error_detected = lpfc_io_error_detected, .slot_reset = lpfc_io_slot_reset, .resume = lpfc_io_resume, }; static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one, lpfc_pci_suspend_one, lpfc_pci_resume_one); static struct pci_driver lpfc_driver = { .name = LPFC_DRIVER_NAME, .id_table = lpfc_id_table, .probe = lpfc_pci_probe_one, .remove = lpfc_pci_remove_one, .shutdown = lpfc_pci_remove_one, .driver.pm = &lpfc_pci_pm_ops_one, .err_handler = &lpfc_err_handler, }; static const struct file_operations lpfc_mgmt_fop = { .owner = THIS_MODULE, }; static struct miscdevice lpfc_mgmt_dev = { .minor = MISC_DYNAMIC_MINOR, .name = "lpfcmgmt", .fops = &lpfc_mgmt_fop, }; /** * lpfc_init - lpfc module initialization routine * * This routine is to be invoked when the lpfc module is loaded into the * kernel. The special kernel macro module_init() is used to indicate the * role of this routine to the kernel as lpfc module entry point. * * Return codes * 0 - successful * -ENOMEM - FC attach transport failed * all others - failed */ static int __init lpfc_init(void) { int error = 0; pr_info(LPFC_MODULE_DESC "\n"); pr_info(LPFC_COPYRIGHT "\n"); error = misc_register(&lpfc_mgmt_dev); if (error) printk(KERN_ERR "Could not register lpfcmgmt device, " "misc_register returned with status %d", error); error = -ENOMEM; lpfc_transport_functions.vport_create = lpfc_vport_create; lpfc_transport_functions.vport_delete = lpfc_vport_delete; lpfc_transport_template = fc_attach_transport(&lpfc_transport_functions); if (lpfc_transport_template == NULL) goto unregister; lpfc_vport_transport_template = fc_attach_transport(&lpfc_vport_transport_functions); if (lpfc_vport_transport_template == NULL) { fc_release_transport(lpfc_transport_template); goto unregister; } lpfc_wqe_cmd_template(); lpfc_nvmet_cmd_template(); /* Initialize in case vector mapping is needed */ lpfc_present_cpu = num_present_cpus(); lpfc_pldv_detect = false; error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, "lpfc/sli4:online", lpfc_cpu_online, lpfc_cpu_offline); if (error < 0) goto cpuhp_failure; lpfc_cpuhp_state = error; error = pci_register_driver(&lpfc_driver); if (error) goto unwind; return error; unwind: cpuhp_remove_multi_state(lpfc_cpuhp_state); cpuhp_failure: fc_release_transport(lpfc_transport_template); fc_release_transport(lpfc_vport_transport_template); unregister: misc_deregister(&lpfc_mgmt_dev); return error; } void lpfc_dmp_dbg(struct lpfc_hba *phba) { unsigned int start_idx; unsigned int dbg_cnt; unsigned int temp_idx; int i; int j = 0; unsigned long rem_nsec; if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0) return; start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ; dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt); if (!dbg_cnt) goto out; temp_idx = start_idx; if (dbg_cnt >= DBG_LOG_SZ) { dbg_cnt = DBG_LOG_SZ; temp_idx -= 1; } else { if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) { temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ; } else { if (start_idx < dbg_cnt) start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx); else start_idx -= dbg_cnt; } } dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n", start_idx, temp_idx, dbg_cnt); for (i = 0; i < dbg_cnt; i++) { if ((start_idx + i) < DBG_LOG_SZ) temp_idx = (start_idx + i) % DBG_LOG_SZ; else temp_idx = j++; rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC); dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s", temp_idx, (unsigned long)phba->dbg_log[temp_idx].t_ns, rem_nsec / 1000, phba->dbg_log[temp_idx].log); } out: atomic_set(&phba->dbg_log_cnt, 0); atomic_set(&phba->dbg_log_dmping, 0); } __printf(2, 3) void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...) { unsigned int idx; va_list args; int dbg_dmping = atomic_read(&phba->dbg_log_dmping); struct va_format vaf; va_start(args, fmt); if (unlikely(dbg_dmping)) { vaf.fmt = fmt; vaf.va = &args; dev_info(&phba->pcidev->dev, "%pV", &vaf); va_end(args); return; } idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) % DBG_LOG_SZ; atomic_inc(&phba->dbg_log_cnt); vscnprintf(phba->dbg_log[idx].log, sizeof(phba->dbg_log[idx].log), fmt, args); va_end(args); phba->dbg_log[idx].t_ns = local_clock(); } /** * lpfc_exit - lpfc module removal routine * * This routine is invoked when the lpfc module is removed from the kernel. * The special kernel macro module_exit() is used to indicate the role of * this routine to the kernel as lpfc module exit point. */ static void __exit lpfc_exit(void) { misc_deregister(&lpfc_mgmt_dev); pci_unregister_driver(&lpfc_driver); cpuhp_remove_multi_state(lpfc_cpuhp_state); fc_release_transport(lpfc_transport_template); fc_release_transport(lpfc_vport_transport_template); idr_destroy(&lpfc_hba_index); } module_init(lpfc_init); module_exit(lpfc_exit); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION(LPFC_MODULE_DESC); MODULE_AUTHOR("Broadcom"); MODULE_VERSION("0:" LPFC_DRIVER_VERSION); |