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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries %YAML 1.2 --- $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART) maintainers: - Richard Genoud <richard.genoud@gmail.com> properties: compatible: oneOf: - enum: - atmel,at91rm9200-usart - atmel,at91sam9260-usart - items: - const: atmel,at91rm9200-dbgu - const: atmel,at91rm9200-usart - items: - const: atmel,at91sam9260-dbgu - const: atmel,at91sam9260-usart - items: - const: microchip,sam9x60-usart - const: atmel,at91sam9260-usart - items: - const: microchip,sam9x60-dbgu - const: microchip,sam9x60-usart - const: atmel,at91sam9260-dbgu - const: atmel,at91sam9260-usart reg: maxItems: 1 interrupts: maxItems: 1 clock-names: minItems: 1 items: - const: usart - const: gclk clocks: minItems: 1 items: - description: USART Peripheral Clock - description: USART Generic Clock dmas: items: - description: TX DMA Channel - description: RX DMA Channel dma-names: items: - const: tx - const: rx atmel,usart-mode: $ref: /schemas/types.yaml#/definitions/uint32 description: Must be either <AT91_USART_MODE_SPI> for SPI or <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h). enum: [ 0, 1 ] atmel,use-dma-rx: type: boolean description: use of PDC or DMA for receiving data atmel,use-dma-tx: type: boolean description: use of PDC or DMA for transmitting data atmel,fifo-size: $ref: /schemas/types.yaml#/definitions/uint32 description: Maximum number of data the RX and TX FIFOs can store for FIFO capable USARTS. enum: [ 16, 32 ] required: - compatible - reg - interrupts - clock-names - clocks - atmel,usart-mode allOf: - if: properties: atmel,usart-mode: const: 1 then: allOf: - $ref: /schemas/spi/spi-controller.yaml# properties: atmel,use-dma-rx: false atmel,use-dma-tx: false atmel,fifo-size: false "#size-cells": const: 0 "#address-cells": const: 1 required: - "#size-cells" - "#address-cells" else: allOf: - $ref: /schemas/serial/serial.yaml# - $ref: /schemas/serial/rs485.yaml# unevaluatedProperties: false examples: - | #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/mfd/at91-usart.h> #include <dt-bindings/dma/at91.h> /* use PDC */ usart0: serial@fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x4000>; atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <7>; clocks = <&usart0_clk>; clock-names = "usart"; atmel,use-dma-rx; atmel,use-dma-tx; rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>; cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>; dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>; dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>; dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>; rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>; }; - | #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/mfd/at91-usart.h> #include <dt-bindings/dma/at91.h> /* use DMA */ usart1: serial@f001c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf001c000 0x100>; atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; clocks = <&usart0_clk>; clock-names = "usart"; atmel,use-dma-rx; atmel,use-dma-tx; dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; atmel,fifo-size = <32>; }; - | #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/mfd/at91-usart.h> #include <dt-bindings/dma/at91.h> /* SPI mode */ spi0: spi@f001c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf001c000 0x100>; #address-cells = <1>; #size-cells = <0>; atmel,usart-mode = <AT91_USART_MODE_SPI>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; clocks = <&usart0_clk>; clock-names = "usart"; dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>; }; |