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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/ata/ahci-platform.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: AHCI SATA Controller description: | SATA nodes are defined to describe on-chip Serial ATA controllers. Each SATA controller should have its own node. It is possible, but not required, to represent each port as a sub-node. It allows to enable each port independently when dealing with multiple PHYs. maintainers: - Hans de Goede <hdegoede@redhat.com> - Jens Axboe <axboe@kernel.dk> select: properties: compatible: contains: enum: - brcm,iproc-ahci - cavium,octeon-7130-ahci - hisilicon,hisi-ahci - ibm,476gtr-ahci - marvell,armada-3700-ahci - marvell,armada-8k-ahci - marvell,berlin2q-ahci - socionext,uniphier-pro4-ahci - socionext,uniphier-pxs2-ahci - socionext,uniphier-pxs3-ahci required: - compatible properties: compatible: oneOf: - items: - enum: - brcm,iproc-ahci - marvell,armada-8k-ahci - marvell,berlin2-ahci - marvell,berlin2q-ahci - socionext,uniphier-pro4-ahci - socionext,uniphier-pxs2-ahci - socionext,uniphier-pxs3-ahci - const: generic-ahci - enum: - cavium,octeon-7130-ahci - hisilicon,hisi-ahci - ibm,476gtr-ahci - marvell,armada-3700-ahci reg: minItems: 1 maxItems: 2 reg-names: maxItems: 1 clocks: minItems: 1 maxItems: 3 clock-names: minItems: 1 maxItems: 3 interrupts: maxItems: 1 power-domains: maxItems: 1 resets: minItems: 1 maxItems: 3 patternProperties: "^sata-port@[0-9a-f]+$": $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port anyOf: - required: [ phys ] - required: [ target-supply ] unevaluatedProperties: false required: - compatible - reg - interrupts allOf: - $ref: ahci-common.yaml# - if: properties: compatible: contains: const: socionext,uniphier-pro4-ahci then: properties: resets: items: - description: reset line for the parent - description: reset line for the glue logic - description: reset line for the controller required: - resets else: if: properties: compatible: contains: enum: - socionext,uniphier-pxs2-ahci - socionext,uniphier-pxs3-ahci then: properties: resets: items: - description: reset for the glue logic - description: reset for the controller required: - resets else: properties: resets: maxItems: 1 unevaluatedProperties: false examples: - | sata@ffe08000 { compatible = "snps,spear-ahci"; reg = <0xffe08000 0x1000>; interrupts = <115>; }; - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/berlin2q.h> #include <dt-bindings/ata/ahci.h> sata@f7e90000 { compatible = "marvell,berlin2q-ahci", "generic-ahci"; reg = <0xf7e90000 0x1000>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&chip CLKID_SATA>; #address-cells = <1>; #size-cells = <0>; hba-cap = <HBA_SMPS>; sata0: sata-port@0 { reg = <0>; phys = <&sata_phy 0>; target-supply = <®_sata0>; hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>; }; sata1: sata-port@1 { reg = <1>; phys = <&sata_phy 1>; target-supply = <®_sata1>; hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>; }; }; |