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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 | /* * Copyright 2013 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #include "nv50.h" #include <subdev/bios.h> #include <subdev/bios/init.h> #include <subdev/bios/pll.h> #include <subdev/clk/pll.h> int gt215_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 freq) { struct nvkm_subdev *subdev = &init->subdev; struct nvkm_device *device = subdev->device; struct nvbios_pll info; int N, fN, M, P; int ret; ret = nvbios_pll_parse(device->bios, type, &info); if (ret) return ret; ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P); if (ret < 0) return ret; switch (info.type) { case PLL_VPLL0: case PLL_VPLL1: nvkm_wr32(device, info.reg + 0, 0x50000610); nvkm_mask(device, info.reg + 4, 0x003fffff, (P << 16) | (M << 8) | N); nvkm_wr32(device, info.reg + 8, fN); break; default: nvkm_warn(subdev, "%08x/%dKhz unimplemented\n", type, freq); ret = -EINVAL; break; } return ret; } static void gt215_devinit_disable(struct nvkm_devinit *init) { struct nvkm_device *device = init->subdev.device; u32 r001540 = nvkm_rd32(device, 0x001540); u32 r00154c = nvkm_rd32(device, 0x00154c); if (!(r001540 & 0x40000000)) { nvkm_subdev_disable(device, NVKM_ENGINE_MSPDEC, 0); nvkm_subdev_disable(device, NVKM_ENGINE_MSPPP, 0); } if (!(r00154c & 0x00000004)) nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0); if (!(r00154c & 0x00000020)) nvkm_subdev_disable(device, NVKM_ENGINE_MSVLD, 0); if (!(r00154c & 0x00000200)) nvkm_subdev_disable(device, NVKM_ENGINE_CE, 0); } static u32 gt215_devinit_mmio_part[] = { 0x100720, 0x1008bc, 4, 0x100a20, 0x100adc, 4, 0x100d80, 0x100ddc, 4, 0x110000, 0x110f9c, 4, 0x111000, 0x11103c, 8, 0x111080, 0x1110fc, 4, 0x111120, 0x1111fc, 4, 0x111300, 0x1114bc, 4, 0, }; static u32 gt215_devinit_mmio(struct nvkm_devinit *base, u32 addr) { struct nv50_devinit *init = nv50_devinit(base); struct nvkm_device *device = init->base.subdev.device; u32 *mmio = gt215_devinit_mmio_part; /* the init tables on some boards have INIT_RAM_RESTRICT_ZM_REG_GROUP * instructions which touch registers that may not even exist on * some configurations (Quadro 400), which causes the register * interface to screw up for some amount of time after attempting to * write to one of these, and results in all sorts of things going * horribly wrong. * * the binary driver avoids touching these registers at all, however, * the video bios doesn't care and does what the scripts say. it's * presumed that the io-port access to init registers isn't effected * by the screw-up bug mentioned above. * * really, a new opcode should've been invented to handle these * requirements, but whatever, it's too late for that now. */ while (mmio[0]) { if (addr >= mmio[0] && addr <= mmio[1]) { u32 part = (addr / mmio[2]) & 7; if (!init->r001540) init->r001540 = nvkm_rd32(device, 0x001540); if (part >= hweight8((init->r001540 >> 16) & 0xff)) return ~0; return addr; } mmio += 3; } return addr; } static const struct nvkm_devinit_func gt215_devinit = { .preinit = nv50_devinit_preinit, .init = nv50_devinit_init, .post = nv04_devinit_post, .mmio = gt215_devinit_mmio, .pll_set = gt215_devinit_pll_set, .disable = gt215_devinit_disable, }; int gt215_devinit_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_devinit **pinit) { return nv50_devinit_new_(>215_devinit, device, type, inst, pinit); } |