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Defined in 10 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h, line 4821 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h, line 4484 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h, line 2482 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h, line 2759 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h, line 2697 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h, line 455 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h, line 255 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h, line 257 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h, line 289 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h, line 289 (as a macro)