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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...) maintainers: - Rob Herring <robh@kernel.org> description: | Flash chips (Memory Technology Devices) are often used for solid state file systems on embedded devices. allOf: - $ref: mtd.yaml# - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# properties: compatible: oneOf: - items: - enum: - amd,s29gl01gp - amd,s29gl032a - amd,s29gl256n - amd,s29gl512n - arm,versatile-flash - arm,vexpress-flash - cortina,gemini-flash - cypress,hyperflash - ge,imp3a-firmware-mirror - ge,imp3a-paged-flash - gef,ppc9a-firmware-mirror - gef,ppc9a-paged-flash - gef,sbc310-firmware-mirror - gef,sbc310-paged-flash - gef,sbc610-firmware-mirror - gef,sbc610-paged-flash - intel,28f128j3 - intel,dt28f160 - intel,ixp4xx-flash - intel,JS28F128 - intel,JS28F640 - intel,PC28F640P30T85 - numonyx,js28f00a - numonyx,js28f128 - sst,sst39vf320 - xlnx,xps-mch-emc-2.00.a - enum: - cfi-flash - jedec-flash - items: - enum: - cypress,cy7c1019dv33-10zsxi - arm,vexpress-psram - const: mtd-ram - enum: - cfi-flash - jedec-flash - mtd-ram - mtd-rom reg: description: | It's possible to (optionally) define multiple "reg" tuples so that non-identical chips can be described in one node. minItems: 1 maxItems: 8 bank-width: description: Width (in bytes) of the bank. Equal to the device width times the number of interleaved chips. $ref: /schemas/types.yaml#/definitions/uint32 enum: [ 1, 2, 4 ] device-width: description: Width of a single mtd chip. If omitted, assumed to be equal to 'bank-width'. $ref: /schemas/types.yaml#/definitions/uint32 enum: [ 1, 2 ] no-unaligned-direct-access: type: boolean description: | Disables the default direct mapping of the flash. On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause problems with JFFS2 usage, as the local bus (LPB) doesn't support unaligned accesses as implemented in the JFFS2 code via memcpy(). By defining "no-unaligned-direct-access", the flash will not be exposed directly to the MTD users (e.g. JFFS2) any more. linux,mtd-name: description: Allows specifying the mtd name for retro capability with physmap-flash drivers as boot loader pass the mtd partition via the old device name physmap-flash. $ref: /schemas/types.yaml#/definitions/string use-advanced-sector-protection: type: boolean description: | Enables support for the advanced sector protection (Spansion: PPB - Persistent Protection Bits) locking. erase-size: description: The chip's physical erase block size in bytes. $ref: /schemas/types.yaml#/definitions/uint32 addr-gpios: description: List of GPIO descriptors that will be used to address the MSBs address lines. The order goes from LSB to MSB. minItems: 1 maxItems: 8 '#address-cells': const: 1 '#size-cells': const: 1 big-endian: true little-endian: true required: - compatible - reg if: properties: compatible: contains: const: cortina,gemini-flash then: properties: syscon: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to the syscon controller required: - syscon # FIXME: A parent bus may define timing properties additionalProperties: true examples: - | flash@ff000000 { compatible = "cfi-flash"; reg = <0xff000000 0x01000000>; bank-width = <4>; device-width = <1>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0xff000000 0x01000000>; fs@0 { label = "fs"; reg = <0 0xf80000>; }; firmware@f80000 { label = "firmware"; reg = <0xf80000 0x80000>; read-only; }; }; - | /* An example with multiple "reg" tuples */ flash@0 { compatible = "intel,PC28F640P30T85", "cfi-flash"; reg = <0x00000000 0x02000000>, <0x02000000 0x02000000>; bank-width = <2>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0x04000000>; partition@0 { label = "test-part1"; reg = <0 0x04000000>; }; }; - | /* An example using SRAM */ bus { #address-cells = <2>; #size-cells = <1>; sram@2,0 { compatible = "mtd-ram"; reg = <2 0 0x00200000>; bank-width = <2>; }; }; - | /* An example using addr-gpios */ #include <dt-bindings/gpio/gpio.h> flash@20000000 { compatible = "cfi-flash"; reg = <0x20000000 0x02000000>; bank-width = <2>; addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x00000000 0x02000000>, <1 0x02000000 0x02000000>; partition@0 { label = "test-part1"; reg = <0 0x04000000>; }; }; ... |