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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 | [ { "BriefDescription": "DTLB load misses", "EventCode": "0x8", "EventName": "DTLB_LOAD_MISSES.ANY", "SampleAfterValue": "200000", "UMask": "0x1" }, { "BriefDescription": "DTLB load miss caused by low part of address", "EventCode": "0x8", "EventName": "DTLB_LOAD_MISSES.PDE_MISS", "SampleAfterValue": "200000", "UMask": "0x20" }, { "BriefDescription": "DTLB second level hit", "EventCode": "0x8", "EventName": "DTLB_LOAD_MISSES.STLB_HIT", "SampleAfterValue": "2000000", "UMask": "0x10" }, { "BriefDescription": "DTLB load miss page walks complete", "EventCode": "0x8", "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED", "SampleAfterValue": "200000", "UMask": "0x2" }, { "BriefDescription": "DTLB load miss page walk cycles", "EventCode": "0x8", "EventName": "DTLB_LOAD_MISSES.WALK_CYCLES", "SampleAfterValue": "200000", "UMask": "0x4" }, { "BriefDescription": "DTLB misses", "EventCode": "0x49", "EventName": "DTLB_MISSES.ANY", "SampleAfterValue": "200000", "UMask": "0x1" }, { "BriefDescription": "DTLB miss large page walks", "EventCode": "0x49", "EventName": "DTLB_MISSES.LARGE_WALK_COMPLETED", "SampleAfterValue": "200000", "UMask": "0x80" }, { "BriefDescription": "DTLB first level misses but second level hit", "EventCode": "0x49", "EventName": "DTLB_MISSES.STLB_HIT", "SampleAfterValue": "200000", "UMask": "0x10" }, { "BriefDescription": "DTLB miss page walks", "EventCode": "0x49", "EventName": "DTLB_MISSES.WALK_COMPLETED", "SampleAfterValue": "200000", "UMask": "0x2" }, { "BriefDescription": "DTLB miss page walk cycles", "EventCode": "0x49", "EventName": "DTLB_MISSES.WALK_CYCLES", "SampleAfterValue": "2000000", "UMask": "0x4" }, { "BriefDescription": "Extended Page Table walk cycles", "EventCode": "0x4F", "EventName": "EPT.WALK_CYCLES", "SampleAfterValue": "2000000", "UMask": "0x10" }, { "BriefDescription": "ITLB flushes", "EventCode": "0xAE", "EventName": "ITLB_FLUSH", "SampleAfterValue": "2000000", "UMask": "0x1" }, { "BriefDescription": "ITLB miss", "EventCode": "0x85", "EventName": "ITLB_MISSES.ANY", "SampleAfterValue": "200000", "UMask": "0x1" }, { "BriefDescription": "ITLB miss page walks", "EventCode": "0x85", "EventName": "ITLB_MISSES.WALK_COMPLETED", "SampleAfterValue": "200000", "UMask": "0x2" }, { "BriefDescription": "ITLB miss page walk cycles", "EventCode": "0x85", "EventName": "ITLB_MISSES.WALK_CYCLES", "SampleAfterValue": "2000000", "UMask": "0x4" }, { "BriefDescription": "Retired instructions that missed the ITLB (Precise Event)", "EventCode": "0xC8", "EventName": "ITLB_MISS_RETIRED", "PEBS": "1", "SampleAfterValue": "200000", "UMask": "0x20" }, { "BriefDescription": "Retired loads that miss the DTLB (Precise Event)", "EventCode": "0xCB", "EventName": "MEM_LOAD_RETIRED.DTLB_MISS", "PEBS": "1", "SampleAfterValue": "200000", "UMask": "0x80" }, { "BriefDescription": "Retired stores that miss the DTLB (Precise Event)", "EventCode": "0xC", "EventName": "MEM_STORE_RETIRED.DTLB_MISS", "PEBS": "1", "SampleAfterValue": "200000", "UMask": "0x1" } ] |