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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP i.MX8 DSP core maintainers: - Daniel Baluta <daniel.baluta@nxp.com> - Shengjiu Wang <shengjiu.wang@nxp.com> description: | Some boards from i.MX8 family contain a DSP core used for advanced pre- and post- audio processing. properties: compatible: enum: - fsl,imx8qxp-dsp - fsl,imx8qm-dsp - fsl,imx8mp-dsp - fsl,imx8ulp-dsp - fsl,imx8qxp-hifi4 - fsl,imx8qm-hifi4 - fsl,imx8mp-hifi4 - fsl,imx8ulp-hifi4 reg: maxItems: 1 clocks: items: - description: ipg clock - description: ocram clock - description: core clock - description: debug interface clock - description: message unit clock minItems: 3 clock-names: items: - const: ipg - const: ocram - const: core - const: debug - const: mu minItems: 3 power-domains: description: List of phandle and PM domain specifier as documented in Documentation/devicetree/bindings/power/power_domain.txt minItems: 1 maxItems: 4 mboxes: description: List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB (see mailbox/fsl,mu.txt) minItems: 3 maxItems: 4 mbox-names: minItems: 3 maxItems: 4 memory-region: description: phandle to a node describing reserved memory (System RAM memory) used by DSP (see bindings/reserved-memory/reserved-memory.txt) minItems: 1 maxItems: 4 firmware-name: description: | Default name of the firmware to load to the remote processor. fsl,dsp-ctrl: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to syscon block which provide access for processor enablement required: - compatible - reg - clocks - clock-names - power-domains - mboxes - mbox-names - memory-region allOf: - if: properties: compatible: contains: enum: - fsl,imx8qxp-dsp - fsl,imx8qm-dsp - fsl,imx8qxp-hifi4 - fsl,imx8qm-hifi4 then: properties: power-domains: minItems: 4 else: properties: power-domains: maxItems: 1 - if: properties: compatible: contains: enum: - fsl,imx8qxp-hifi4 - fsl,imx8qm-hifi4 - fsl,imx8mp-hifi4 - fsl,imx8ulp-hifi4 then: properties: memory-region: minItems: 4 mboxes: maxItems: 3 mbox-names: items: - const: tx - const: rx - const: rxdb else: properties: memory-region: maxItems: 1 mboxes: minItems: 4 mbox-names: items: - const: txdb0 - const: txdb1 - const: rxdb0 - const: rxdb1 additionalProperties: false examples: - | #include <dt-bindings/firmware/imx/rsrc.h> #include <dt-bindings/clock/imx8-clock.h> dsp@596e8000 { compatible = "fsl,imx8qxp-dsp"; reg = <0x596e8000 0x88000>; clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>, <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>, <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>; clock-names = "ipg", "ocram", "core"; power-domains = <&pd IMX_SC_R_MU_13A>, <&pd IMX_SC_R_MU_13B>, <&pd IMX_SC_R_DSP>, <&pd IMX_SC_R_DSP_RAM>; mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; memory-region = <&dsp_reserved>; }; - | #include <dt-bindings/clock/imx8mp-clock.h> dsp_reserved: dsp@92400000 { reg = <0x92400000 0x1000000>; no-map; }; dsp_vdev0vring0: vdev0vring0@942f0000 { reg = <0x942f0000 0x8000>; no-map; }; dsp_vdev0vring1: vdev0vring1@942f8000 { reg = <0x942f8000 0x8000>; no-map; }; dsp_vdev0buffer: vdev0buffer@94300000 { compatible = "shared-dma-pool"; reg = <0x94300000 0x100000>; no-map; }; dsp: dsp@3b6e8000 { compatible = "fsl,imx8mp-hifi4"; reg = <0x3b6e8000 0x88000>; clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>, <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>; clock-names = "ipg", "ocram", "core", "debug"; firmware-name = "imx/dsp/hifi4.bin"; power-domains = <&audiomix_pd>; mbox-names = "tx", "rx", "rxdb"; mboxes = <&mu2 0 0>, <&mu2 1 0>, <&mu2 3 0>; memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, <&dsp_vdev0vring1>, <&dsp_reserved>; fsl,dsp-ctrl = <&audio_blk_ctrl>; }; |