Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 | /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2016 Maxime Ripard. All rights reserved. */ #ifndef _CCU_GATE_H_ #define _CCU_GATE_H_ #include <linux/clk-provider.h> #include "ccu_common.h" struct ccu_gate { u32 enable; struct ccu_common common; }; #define SUNXI_CCU_GATE(_struct, _name, _parent, _reg, _gate, _flags) \ struct ccu_gate _struct = { \ .enable = _gate, \ .common = { \ .reg = _reg, \ .hw.init = CLK_HW_INIT(_name, \ _parent, \ &ccu_gate_ops, \ _flags), \ } \ } #define SUNXI_CCU_GATE_HW(_struct, _name, _parent, _reg, _gate, _flags) \ struct ccu_gate _struct = { \ .enable = _gate, \ .common = { \ .reg = _reg, \ .hw.init = CLK_HW_INIT_HW(_name, \ _parent, \ &ccu_gate_ops, \ _flags), \ } \ } #define SUNXI_CCU_GATE_FW(_struct, _name, _parent, _reg, _gate, _flags) \ struct ccu_gate _struct = { \ .enable = _gate, \ .common = { \ .reg = _reg, \ .hw.init = CLK_HW_INIT_FW_NAME(_name, \ _parent, \ &ccu_gate_ops, \ _flags), \ } \ } /* * The following macros allow the re-use of the data structure * holding the parent info. */ #define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \ struct ccu_gate _struct = { \ .enable = _gate, \ .common = { \ .reg = _reg, \ .hw.init = CLK_HW_INIT_HWS(_name, \ _parent, \ &ccu_gate_ops, \ _flags), \ } \ } #define SUNXI_CCU_GATE_HWS_WITH_PREDIV(_struct, _name, _parent, _reg, \ _gate, _prediv, _flags) \ struct ccu_gate _struct = { \ .enable = _gate, \ .common = { \ .reg = _reg, \ .prediv = _prediv, \ .features = CCU_FEATURE_ALL_PREDIV, \ .hw.init = CLK_HW_INIT_HWS(_name, \ _parent, \ &ccu_gate_ops, \ _flags), \ } \ } #define SUNXI_CCU_GATE_DATA(_struct, _name, _data, _reg, _gate, _flags) \ struct ccu_gate _struct = { \ .enable = _gate, \ .common = { \ .reg = _reg, \ .hw.init = \ CLK_HW_INIT_PARENTS_DATA(_name, \ _data, \ &ccu_gate_ops, \ _flags), \ } \ } #define SUNXI_CCU_GATE_DATA_WITH_PREDIV(_struct, _name, _parent, _reg, \ _gate, _prediv, _flags) \ struct ccu_gate _struct = { \ .enable = _gate, \ .common = { \ .reg = _reg, \ .prediv = _prediv, \ .features = CCU_FEATURE_ALL_PREDIV, \ .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \ _parent, \ &ccu_gate_ops, \ _flags), \ } \ } static inline struct ccu_gate *hw_to_ccu_gate(struct clk_hw *hw) { struct ccu_common *common = hw_to_ccu_common(hw); return container_of(common, struct ccu_gate, common); } void ccu_gate_helper_disable(struct ccu_common *common, u32 gate); int ccu_gate_helper_enable(struct ccu_common *common, u32 gate); int ccu_gate_helper_is_enabled(struct ccu_common *common, u32 gate); extern const struct clk_ops ccu_gate_ops; #endif /* _CCU_GATE_H_ */ |