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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 | /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_SH_BITOPS_LLSC_H #define __ASM_SH_BITOPS_LLSC_H static inline void set_bit(int nr, volatile void *addr) { int mask; volatile unsigned int *a = addr; unsigned long tmp; a += nr >> 5; mask = 1 << (nr & 0x1f); __asm__ __volatile__ ( "1: \n\t" "movli.l @%1, %0 ! set_bit \n\t" "or %2, %0 \n\t" "movco.l %0, @%1 \n\t" "bf 1b \n\t" : "=&z" (tmp) : "r" (a), "r" (mask) : "t", "memory" ); } static inline void clear_bit(int nr, volatile void *addr) { int mask; volatile unsigned int *a = addr; unsigned long tmp; a += nr >> 5; mask = 1 << (nr & 0x1f); __asm__ __volatile__ ( "1: \n\t" "movli.l @%1, %0 ! clear_bit \n\t" "and %2, %0 \n\t" "movco.l %0, @%1 \n\t" "bf 1b \n\t" : "=&z" (tmp) : "r" (a), "r" (~mask) : "t", "memory" ); } static inline void change_bit(int nr, volatile void *addr) { int mask; volatile unsigned int *a = addr; unsigned long tmp; a += nr >> 5; mask = 1 << (nr & 0x1f); __asm__ __volatile__ ( "1: \n\t" "movli.l @%1, %0 ! change_bit \n\t" "xor %2, %0 \n\t" "movco.l %0, @%1 \n\t" "bf 1b \n\t" : "=&z" (tmp) : "r" (a), "r" (mask) : "t", "memory" ); } static inline int test_and_set_bit(int nr, volatile void *addr) { int mask, retval; volatile unsigned int *a = addr; unsigned long tmp; a += nr >> 5; mask = 1 << (nr & 0x1f); __asm__ __volatile__ ( "1: \n\t" "movli.l @%2, %0 ! test_and_set_bit \n\t" "mov %0, %1 \n\t" "or %3, %0 \n\t" "movco.l %0, @%2 \n\t" "bf 1b \n\t" "and %3, %1 \n\t" : "=&z" (tmp), "=&r" (retval) : "r" (a), "r" (mask) : "t", "memory" ); return retval != 0; } static inline int test_and_clear_bit(int nr, volatile void *addr) { int mask, retval; volatile unsigned int *a = addr; unsigned long tmp; a += nr >> 5; mask = 1 << (nr & 0x1f); __asm__ __volatile__ ( "1: \n\t" "movli.l @%2, %0 ! test_and_clear_bit \n\t" "mov %0, %1 \n\t" "and %4, %0 \n\t" "movco.l %0, @%2 \n\t" "bf 1b \n\t" "and %3, %1 \n\t" "synco \n\t" : "=&z" (tmp), "=&r" (retval) : "r" (a), "r" (mask), "r" (~mask) : "t", "memory" ); return retval != 0; } static inline int test_and_change_bit(int nr, volatile void *addr) { int mask, retval; volatile unsigned int *a = addr; unsigned long tmp; a += nr >> 5; mask = 1 << (nr & 0x1f); __asm__ __volatile__ ( "1: \n\t" "movli.l @%2, %0 ! test_and_change_bit \n\t" "mov %0, %1 \n\t" "xor %3, %0 \n\t" "movco.l %0, @%2 \n\t" "bf 1b \n\t" "and %3, %1 \n\t" "synco \n\t" : "=&z" (tmp), "=&r" (retval) : "r" (a), "r" (mask) : "t", "memory" ); return retval != 0; } #include <asm-generic/bitops/non-atomic.h> #endif /* __ASM_SH_BITOPS_LLSC_H */ |