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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright (C) 2020 Texas Instruments Incorporated # Author: Peter Ujfalusi <peter.ujfalusi@ti.com> %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Texas Instruments J721e Common Processor Board Audio Support maintainers: - Peter Ujfalusi <peter.ujfalusi@gmail.com> description: | The audio support on the board is using pcm3168a codec connected to McASP10 serializers in parallel setup. The pcm3168a SCKI clock is sourced from j721e AUDIO_REFCLK2 pin. In order to support 48KHz and 44.1KHz family of sampling rates the parent clock for AUDIO_REFCLK2 needs to be changed between PLL4 (for 48KHz) and PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via different HSDIVIDER. Clocking setup for j721e: 48KHz family: PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI 44.1KHz family: PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI Clocking setup for j7200: 48KHz family: PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI properties: compatible: enum: - ti,j721e-cpb-audio - ti,j7200-cpb-audio model: $ref: /schemas/types.yaml#/definitions/string description: User specified audio sound card name ti,cpb-mcasp: description: phandle to McASP used on CPB $ref: /schemas/types.yaml#/definitions/phandle ti,cpb-codec: description: phandle to the pcm3168a codec used on the CPB $ref: /schemas/types.yaml#/definitions/phandle clocks: minItems: 4 maxItems: 6 clock-names: minItems: 4 maxItems: 6 required: - compatible - model - ti,cpb-mcasp - ti,cpb-codec - clocks - clock-names additionalProperties: false allOf: - if: properties: compatible: contains: const: ti,j721e-cpb-audio then: properties: clocks: items: - description: AUXCLK clock for McASP used by CPB audio - description: Parent for CPB_McASP auxclk (for 48KHz) - description: Parent for CPB_McASP auxclk (for 44.1KHz) - description: SCKI clock for the pcm3168a codec on CPB - description: Parent for CPB_SCKI clock (for 48KHz) - description: Parent for CPB_SCKI clock (for 44.1KHz) clock-names: items: - const: cpb-mcasp-auxclk - const: cpb-mcasp-auxclk-48000 - const: cpb-mcasp-auxclk-44100 - const: cpb-codec-scki - const: cpb-codec-scki-48000 - const: cpb-codec-scki-44100 - if: properties: compatible: contains: const: ti,j7200-cpb-audio then: properties: clocks: items: - description: AUXCLK clock for McASP used by CPB audio - description: Parent for CPB_McASP auxclk (for 48KHz) - description: SCKI clock for the pcm3168a codec on CPB - description: Parent for CPB_SCKI clock (for 48KHz) clock-names: items: - const: cpb-mcasp-auxclk - const: cpb-mcasp-auxclk-48000 - const: cpb-codec-scki - const: cpb-codec-scki-48000 examples: - |+ sound { compatible = "ti,j721e-cpb-audio"; model = "j721e-cpb"; ti,cpb-mcasp = <&mcasp10>; ti,cpb-codec = <&pcm3168a_1>; clocks = <&k3_clks 184 1>, <&k3_clks 184 2>, <&k3_clks 184 4>, <&k3_clks 157 371>, <&k3_clks 157 400>, <&k3_clks 157 401>; clock-names = "cpb-mcasp-auxclk", "cpb-mcasp-auxclk-48000", "cpb-mcasp-auxclk-44100", "cpb-codec-scki", "cpb-codec-scki-48000", "cpb-codec-scki-44100"; }; |