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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 | // SPDX-License-Identifier: GPL-2.0-or-later /* * NEC NL8048HL11 Panel driver * * Copyright (C) 2010 Texas Instruments Inc. * Author: Erik Gilling <konkers@android.com> * Converted to new DSS device model: Tomi Valkeinen <tomi.valkeinen@ti.com> */ #include <linux/delay.h> #include <linux/err.h> #include <linux/fb.h> #include <linux/gpio/consumer.h> #include <linux/module.h> #include <linux/spi/spi.h> #include <video/omapfb_dss.h> struct panel_drv_data { struct omap_dss_device dssdev; struct omap_dss_device *in; struct omap_video_timings videomode; int data_lines; struct gpio_desc *res_gpio; struct spi_device *spi; }; #define LCD_XRES 800 #define LCD_YRES 480 /* * NEC PIX Clock Ratings * MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz */ #define LCD_PIXEL_CLOCK 23800000 static const struct { unsigned char addr; unsigned char dat; } nec_8048_init_seq[] = { { 3, 0x01 }, { 0, 0x00 }, { 1, 0x01 }, { 4, 0x00 }, { 5, 0x14 }, { 6, 0x24 }, { 16, 0xD7 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x55 }, { 20, 0x01 }, { 21, 0x70 }, { 22, 0x1E }, { 23, 0x25 }, { 24, 0x25 }, { 25, 0x02 }, { 26, 0x02 }, { 27, 0xA0 }, { 32, 0x2F }, { 33, 0x0F }, { 34, 0x0F }, { 35, 0x0F }, { 36, 0x0F }, { 37, 0x0F }, { 38, 0x0F }, { 39, 0x00 }, { 40, 0x02 }, { 41, 0x02 }, { 42, 0x02 }, { 43, 0x0F }, { 44, 0x0F }, { 45, 0x0F }, { 46, 0x0F }, { 47, 0x0F }, { 48, 0x0F }, { 49, 0x0F }, { 50, 0x00 }, { 51, 0x02 }, { 52, 0x02 }, { 53, 0x02 }, { 80, 0x0C }, { 83, 0x42 }, { 84, 0x42 }, { 85, 0x41 }, { 86, 0x14 }, { 89, 0x88 }, { 90, 0x01 }, { 91, 0x00 }, { 92, 0x02 }, { 93, 0x0C }, { 94, 0x1C }, { 95, 0x27 }, { 98, 0x49 }, { 99, 0x27 }, { 102, 0x76 }, { 103, 0x27 }, { 112, 0x01 }, { 113, 0x0E }, { 114, 0x02 }, { 115, 0x0C }, { 118, 0x0C }, { 121, 0x30 }, { 130, 0x00 }, { 131, 0x00 }, { 132, 0xFC }, { 134, 0x00 }, { 136, 0x00 }, { 138, 0x00 }, { 139, 0x00 }, { 140, 0x00 }, { 141, 0xFC }, { 143, 0x00 }, { 145, 0x00 }, { 147, 0x00 }, { 148, 0x00 }, { 149, 0x00 }, { 150, 0xFC }, { 152, 0x00 }, { 154, 0x00 }, { 156, 0x00 }, { 157, 0x00 }, { 2, 0x00 }, }; static const struct omap_video_timings nec_8048_panel_timings = { .x_res = LCD_XRES, .y_res = LCD_YRES, .pixelclock = LCD_PIXEL_CLOCK, .hfp = 6, .hsw = 1, .hbp = 4, .vfp = 3, .vsw = 1, .vbp = 4, .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, .de_level = OMAPDSS_SIG_ACTIVE_HIGH, .sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, }; #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev) static int nec_8048_spi_send(struct spi_device *spi, unsigned char reg_addr, unsigned char reg_data) { int ret = 0; unsigned int cmd = 0, data = 0; cmd = 0x0000 | reg_addr; /* register address write */ data = 0x0100 | reg_data; /* register data write */ data = (cmd << 16) | data; ret = spi_write(spi, (unsigned char *)&data, 4); if (ret) pr_err("error in spi_write %x\n", data); return ret; } static int init_nec_8048_wvga_lcd(struct spi_device *spi) { unsigned int i; /* Initialization Sequence */ /* nec_8048_spi_send(spi, REG, VAL) */ for (i = 0; i < (ARRAY_SIZE(nec_8048_init_seq) - 1); i++) nec_8048_spi_send(spi, nec_8048_init_seq[i].addr, nec_8048_init_seq[i].dat); udelay(20); nec_8048_spi_send(spi, nec_8048_init_seq[i].addr, nec_8048_init_seq[i].dat); return 0; } static int nec_8048_connect(struct omap_dss_device *dssdev) { struct panel_drv_data *ddata = to_panel_data(dssdev); struct omap_dss_device *in = ddata->in; if (omapdss_device_is_connected(dssdev)) return 0; return in->ops.dpi->connect(in, dssdev); } static void nec_8048_disconnect(struct omap_dss_device *dssdev) { struct panel_drv_data *ddata = to_panel_data(dssdev); struct omap_dss_device *in = ddata->in; if (!omapdss_device_is_connected(dssdev)) return; in->ops.dpi->disconnect(in, dssdev); } static int nec_8048_enable(struct omap_dss_device *dssdev) { struct panel_drv_data *ddata = to_panel_data(dssdev); struct omap_dss_device *in = ddata->in; int r; if (!omapdss_device_is_connected(dssdev)) return -ENODEV; if (omapdss_device_is_enabled(dssdev)) return 0; if (ddata->data_lines) in->ops.dpi->set_data_lines(in, ddata->data_lines); in->ops.dpi->set_timings(in, &ddata->videomode); r = in->ops.dpi->enable(in); if (r) return r; /* Apparently existing DTSes use incorrect polarity (active high) */ gpiod_set_value_cansleep(ddata->res_gpio, 1); dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; return 0; } static void nec_8048_disable(struct omap_dss_device *dssdev) { struct panel_drv_data *ddata = to_panel_data(dssdev); struct omap_dss_device *in = ddata->in; if (!omapdss_device_is_enabled(dssdev)) return; /* Apparently existing DTSes use incorrect polarity (active high) */ gpiod_set_value_cansleep(ddata->res_gpio, 0); in->ops.dpi->disable(in); dssdev->state = OMAP_DSS_DISPLAY_DISABLED; } static void nec_8048_set_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) { struct panel_drv_data *ddata = to_panel_data(dssdev); struct omap_dss_device *in = ddata->in; ddata->videomode = *timings; dssdev->panel.timings = *timings; in->ops.dpi->set_timings(in, timings); } static void nec_8048_get_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) { struct panel_drv_data *ddata = to_panel_data(dssdev); *timings = ddata->videomode; } static int nec_8048_check_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) { struct panel_drv_data *ddata = to_panel_data(dssdev); struct omap_dss_device *in = ddata->in; return in->ops.dpi->check_timings(in, timings); } static struct omap_dss_driver nec_8048_ops = { .connect = nec_8048_connect, .disconnect = nec_8048_disconnect, .enable = nec_8048_enable, .disable = nec_8048_disable, .set_timings = nec_8048_set_timings, .get_timings = nec_8048_get_timings, .check_timings = nec_8048_check_timings, .get_resolution = omapdss_default_get_resolution, }; static int nec_8048_probe(struct spi_device *spi) { struct panel_drv_data *ddata; struct omap_dss_device *dssdev; int r; dev_dbg(&spi->dev, "%s\n", __func__); if (!spi->dev.of_node) return -ENODEV; spi->mode = SPI_MODE_0; spi->bits_per_word = 32; r = spi_setup(spi); if (r < 0) { dev_err(&spi->dev, "spi_setup failed: %d\n", r); return r; } init_nec_8048_wvga_lcd(spi); ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL); if (ddata == NULL) return -ENOMEM; dev_set_drvdata(&spi->dev, ddata); ddata->spi = spi; ddata->in = omapdss_of_find_source_for_first_ep(spi->dev.of_node); r = PTR_ERR_OR_ZERO(ddata->in); if (r) { dev_err(&spi->dev, "failed to find video source: %d\n", r); return r; } ddata->res_gpio = devm_gpiod_get(&spi->dev, "reset", GPIOD_OUT_LOW); r = PTR_ERR_OR_ZERO(ddata->res_gpio); if (r) { dev_err(&spi->dev, "failed to request reset gpio: %d\n", r); goto err_gpio; } gpiod_set_consumer_name(ddata->res_gpio, "lcd RES"); ddata->videomode = nec_8048_panel_timings; dssdev = &ddata->dssdev; dssdev->dev = &spi->dev; dssdev->driver = &nec_8048_ops; dssdev->type = OMAP_DISPLAY_TYPE_DPI; dssdev->owner = THIS_MODULE; dssdev->panel.timings = ddata->videomode; r = omapdss_register_display(dssdev); if (r) { dev_err(&spi->dev, "Failed to register panel\n"); goto err_reg; } return 0; err_reg: err_gpio: omap_dss_put_device(ddata->in); return r; } static void nec_8048_remove(struct spi_device *spi) { struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); struct omap_dss_device *dssdev = &ddata->dssdev; struct omap_dss_device *in = ddata->in; dev_dbg(&ddata->spi->dev, "%s\n", __func__); omapdss_unregister_display(dssdev); nec_8048_disable(dssdev); nec_8048_disconnect(dssdev); omap_dss_put_device(in); } #ifdef CONFIG_PM_SLEEP static int nec_8048_suspend(struct device *dev) { struct spi_device *spi = to_spi_device(dev); nec_8048_spi_send(spi, 2, 0x01); mdelay(40); return 0; } static int nec_8048_resume(struct device *dev) { struct spi_device *spi = to_spi_device(dev); /* reinitialize the panel */ spi_setup(spi); nec_8048_spi_send(spi, 2, 0x00); init_nec_8048_wvga_lcd(spi); return 0; } static SIMPLE_DEV_PM_OPS(nec_8048_pm_ops, nec_8048_suspend, nec_8048_resume); #define NEC_8048_PM_OPS (&nec_8048_pm_ops) #else #define NEC_8048_PM_OPS NULL #endif static const struct of_device_id nec_8048_of_match[] = { { .compatible = "omapdss,nec,nl8048hl11", }, {}, }; MODULE_DEVICE_TABLE(of, nec_8048_of_match); static struct spi_driver nec_8048_driver = { .driver = { .name = "panel-nec-nl8048hl11", .pm = NEC_8048_PM_OPS, .of_match_table = nec_8048_of_match, .suppress_bind_attrs = true, }, .probe = nec_8048_probe, .remove = nec_8048_remove, }; module_spi_driver(nec_8048_driver); MODULE_ALIAS("spi:nec,nl8048hl11"); MODULE_AUTHOR("Erik Gilling <konkers@android.com>"); MODULE_DESCRIPTION("NEC-NL8048HL11 Driver"); MODULE_LICENSE("GPL"); |