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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 | // SPDX-License-Identifier: GPL-2.0+ // // Copyright (c) 2011 Samsung Electronics Co., Ltd // http://www.samsung.com #include <linux/module.h> #include <sound/soc.h> #include <sound/pcm.h> #include <sound/pcm_params.h> #include "../codecs/wm8994.h" #include "pcm.h" /* * Board Settings: * o '1' means 'ON' * o '0' means 'OFF' * o 'X' means 'Don't care' * * SMDKC210, SMDKV310: CFG3- 1001, CFG5-1000, CFG7-111111 */ /* * Configure audio route as :- * $ amixer sset 'DAC1' on,on * $ amixer sset 'Right Headphone Mux' 'DAC' * $ amixer sset 'Left Headphone Mux' 'DAC' * $ amixer sset 'DAC1R Mixer AIF1.1' on * $ amixer sset 'DAC1L Mixer AIF1.1' on * $ amixer sset 'IN2L' on * $ amixer sset 'IN2L PGA IN2LN' on * $ amixer sset 'MIXINL IN2L' on * $ amixer sset 'AIF1ADC1L Mixer ADC/DMIC' on * $ amixer sset 'IN2R' on * $ amixer sset 'IN2R PGA IN2RN' on * $ amixer sset 'MIXINR IN2R' on * $ amixer sset 'AIF1ADC1R Mixer ADC/DMIC' on */ /* SMDK has a 16.9344MHZ crystal attached to WM8994 */ #define SMDK_WM8994_FREQ 16934400 static int smdk_wm8994_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); unsigned long mclk_freq; int rfs, ret; switch(params_rate(params)) { case 8000: rfs = 512; break; default: dev_err(cpu_dai->dev, "%s:%d Sampling Rate %u not supported!\n", __func__, __LINE__, params_rate(params)); return -EINVAL; } mclk_freq = params_rate(params) * rfs; ret = snd_soc_dai_set_sysclk(codec_dai, WM8994_SYSCLK_FLL1, mclk_freq, SND_SOC_CLOCK_IN); if (ret < 0) return ret; ret = snd_soc_dai_set_pll(codec_dai, WM8994_FLL1, WM8994_FLL_SRC_MCLK1, SMDK_WM8994_FREQ, mclk_freq); if (ret < 0) return ret; /* Set PCM source clock on CPU */ ret = snd_soc_dai_set_sysclk(cpu_dai, S3C_PCM_CLKSRC_MUX, mclk_freq, SND_SOC_CLOCK_IN); if (ret < 0) return ret; /* Set SCLK_DIV for making bclk */ ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C_PCM_SCLK_PER_FS, rfs); if (ret < 0) return ret; return 0; } static const struct snd_soc_ops smdk_wm8994_pcm_ops = { .hw_params = smdk_wm8994_pcm_hw_params, }; SND_SOC_DAILINK_DEFS(paif_pcm, DAILINK_COMP_ARRAY(COMP_CPU("samsung-pcm.0")), DAILINK_COMP_ARRAY(COMP_CODEC("wm8994-codec", "wm8994-aif1")), DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-pcm.0"))); static struct snd_soc_dai_link smdk_dai[] = { { .name = "WM8994 PAIF PCM", .stream_name = "Primary PCM", .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_CBS_CFS, .ops = &smdk_wm8994_pcm_ops, SND_SOC_DAILINK_REG(paif_pcm), }, }; static struct snd_soc_card smdk_pcm = { .name = "SMDK-PCM", .owner = THIS_MODULE, .dai_link = smdk_dai, .num_links = 1, }; static int snd_smdk_probe(struct platform_device *pdev) { int ret = 0; smdk_pcm.dev = &pdev->dev; ret = devm_snd_soc_register_card(&pdev->dev, &smdk_pcm); if (ret) dev_err_probe(&pdev->dev, ret, "snd_soc_register_card failed\n"); return ret; } static struct platform_driver snd_smdk_driver = { .driver = { .name = "samsung-smdk-pcm", }, .probe = snd_smdk_probe, }; module_platform_driver(snd_smdk_driver); MODULE_AUTHOR("Sangbeom Kim, <sbkim73@samsung.com>"); MODULE_DESCRIPTION("ALSA SoC SMDK WM8994 for PCM"); MODULE_LICENSE("GPL"); |