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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/media/ti,cal.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL) maintainers: - Benoit Parrot <bparrot@ti.com> description: |- The Camera Adaptation Layer (CAL) is a key component for image capture applications. The capture module provides the system interface and the processing capability to connect CSI2 image-sensor modules to the DRA72x device. CAL supports 2 camera port nodes on MIPI bus. properties: compatible: enum: # for DRA72 controllers - ti,dra72-cal # for DRA72 controllers pre ES2.0 - ti,dra72-pre-es2-cal # for DRA76 controllers - ti,dra76-cal # for AM654 controllers - ti,am654-cal reg: minItems: 2 items: - description: The CAL main register region - description: The RX Core0 (DPHY0) register region - description: The RX Core1 (DPHY1) register region reg-names: minItems: 2 items: - const: cal_top - const: cal_rx_core0 - const: cal_rx_core1 interrupts: maxItems: 1 ti,camerrx-control: $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - description: phandle to device control module - description: offset to the control_camerarx_core register description: phandle to the device control module and offset to the control_camerarx_core register clocks: maxItems: 1 clock-names: const: fck power-domains: description: List of phandle and PM domain specifier as documented in Documentation/devicetree/bindings/power/power_domain.txt maxItems: 1 ports: $ref: /schemas/graph.yaml#/properties/ports properties: port@0: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false description: 'CSI2 Port #0' properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false properties: clock-lanes: maxItems: 1 data-lanes: minItems: 1 maxItems: 4 port@1: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false description: 'CSI2 Port #1' properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false properties: clock-lanes: maxItems: 1 data-lanes: minItems: 1 maxItems: 4 required: - port@0 required: - compatible - reg - reg-names - interrupts - ti,camerrx-control additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> cal: cal@4845b000 { compatible = "ti,dra72-cal"; reg = <0x4845B000 0x400>, <0x4845B800 0x40>, <0x4845B900 0x40>; reg-names = "cal_top", "cal_rx_core0", "cal_rx_core1"; interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; ti,camerrx-control = <&scm_conf 0xE94>; ports { #address-cells = <1>; #size-cells = <0>; csi2_0: port@0 { reg = <0>; csi2_phy0: endpoint { remote-endpoint = <&csi2_cam0>; clock-lanes = <0>; data-lanes = <1 2>; }; }; }; }; i2c { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; camera-sensor@3c { compatible = "ovti,ov5640"; reg = <0x3c>; AVDD-supply = <®_2p8v>; DOVDD-supply = <®_1p8v>; DVDD-supply = <®_1p5v>; clocks = <&clk_ov5640_fixed>; clock-names = "xclk"; port { csi2_cam0: endpoint { remote-endpoint = <&csi2_phy0>; clock-lanes = <0>; data-lanes = <1 2>; }; }; }; }; ... |