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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 | // SPDX-License-Identifier: GPL-2.0 /* * Standard user space access functions based on mvcp/mvcs and doing * interesting things in the secondary space mode. * * Copyright IBM Corp. 2006,2014 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), * Gerald Schaefer (gerald.schaefer@de.ibm.com) */ #include <linux/uaccess.h> #include <linux/export.h> #include <linux/mm.h> #include <asm/asm-extable.h> #ifdef CONFIG_DEBUG_ENTRY void debug_user_asce(int exit) { unsigned long cr1, cr7; __ctl_store(cr1, 1, 1); __ctl_store(cr7, 7, 7); if (cr1 == S390_lowcore.kernel_asce && cr7 == S390_lowcore.user_asce) return; panic("incorrect ASCE on kernel %s\n" "cr1: %016lx cr7: %016lx\n" "kernel: %016llx user: %016llx\n", exit ? "exit" : "entry", cr1, cr7, S390_lowcore.kernel_asce, S390_lowcore.user_asce); } #endif /*CONFIG_DEBUG_ENTRY */ static unsigned long raw_copy_from_user_key(void *to, const void __user *from, unsigned long size, unsigned long key) { unsigned long rem; union oac spec = { .oac2.key = key, .oac2.as = PSW_BITS_AS_SECONDARY, .oac2.k = 1, .oac2.a = 1, }; asm volatile( " lr 0,%[spec]\n" "0: mvcos 0(%[to]),0(%[from]),%[size]\n" "1: jz 5f\n" " algr %[size],%[val]\n" " slgr %[from],%[val]\n" " slgr %[to],%[val]\n" " j 0b\n" "2: la %[rem],4095(%[from])\n" /* rem = from + 4095 */ " nr %[rem],%[val]\n" /* rem = (from + 4095) & -4096 */ " slgr %[rem],%[from]\n" " clgr %[size],%[rem]\n" /* copy crosses next page boundary? */ " jnh 6f\n" "3: mvcos 0(%[to]),0(%[from]),%[rem]\n" "4: slgr %[size],%[rem]\n" " j 6f\n" "5: slgr %[size],%[size]\n" "6:\n" EX_TABLE(0b, 2b) EX_TABLE(1b, 2b) EX_TABLE(3b, 6b) EX_TABLE(4b, 6b) : [size] "+&a" (size), [from] "+&a" (from), [to] "+&a" (to), [rem] "=&a" (rem) : [val] "a" (-4096UL), [spec] "d" (spec.val) : "cc", "memory", "0"); return size; } unsigned long raw_copy_from_user(void *to, const void __user *from, unsigned long n) { return raw_copy_from_user_key(to, from, n, 0); } EXPORT_SYMBOL(raw_copy_from_user); unsigned long _copy_from_user_key(void *to, const void __user *from, unsigned long n, unsigned long key) { unsigned long res = n; might_fault(); if (!should_fail_usercopy()) { instrument_copy_from_user_before(to, from, n); res = raw_copy_from_user_key(to, from, n, key); instrument_copy_from_user_after(to, from, n, res); } if (unlikely(res)) memset(to + (n - res), 0, res); return res; } EXPORT_SYMBOL(_copy_from_user_key); static unsigned long raw_copy_to_user_key(void __user *to, const void *from, unsigned long size, unsigned long key) { unsigned long rem; union oac spec = { .oac1.key = key, .oac1.as = PSW_BITS_AS_SECONDARY, .oac1.k = 1, .oac1.a = 1, }; asm volatile( " lr 0,%[spec]\n" "0: mvcos 0(%[to]),0(%[from]),%[size]\n" "1: jz 5f\n" " algr %[size],%[val]\n" " slgr %[to],%[val]\n" " slgr %[from],%[val]\n" " j 0b\n" "2: la %[rem],4095(%[to])\n" /* rem = to + 4095 */ " nr %[rem],%[val]\n" /* rem = (to + 4095) & -4096 */ " slgr %[rem],%[to]\n" " clgr %[size],%[rem]\n" /* copy crosses next page boundary? */ " jnh 6f\n" "3: mvcos 0(%[to]),0(%[from]),%[rem]\n" "4: slgr %[size],%[rem]\n" " j 6f\n" "5: slgr %[size],%[size]\n" "6:\n" EX_TABLE(0b, 2b) EX_TABLE(1b, 2b) EX_TABLE(3b, 6b) EX_TABLE(4b, 6b) : [size] "+&a" (size), [to] "+&a" (to), [from] "+&a" (from), [rem] "=&a" (rem) : [val] "a" (-4096UL), [spec] "d" (spec.val) : "cc", "memory", "0"); return size; } unsigned long raw_copy_to_user(void __user *to, const void *from, unsigned long n) { return raw_copy_to_user_key(to, from, n, 0); } EXPORT_SYMBOL(raw_copy_to_user); unsigned long _copy_to_user_key(void __user *to, const void *from, unsigned long n, unsigned long key) { might_fault(); if (should_fail_usercopy()) return n; instrument_copy_to_user(to, from, n); return raw_copy_to_user_key(to, from, n, key); } EXPORT_SYMBOL(_copy_to_user_key); unsigned long __clear_user(void __user *to, unsigned long size) { unsigned long rem; union oac spec = { .oac1.as = PSW_BITS_AS_SECONDARY, .oac1.a = 1, }; asm volatile( " lr 0,%[spec]\n" "0: mvcos 0(%[to]),0(%[zeropg]),%[size]\n" "1: jz 5f\n" " algr %[size],%[val]\n" " slgr %[to],%[val]\n" " j 0b\n" "2: la %[rem],4095(%[to])\n" /* rem = to + 4095 */ " nr %[rem],%[val]\n" /* rem = (to + 4095) & -4096 */ " slgr %[rem],%[to]\n" " clgr %[size],%[rem]\n" /* copy crosses next page boundary? */ " jnh 6f\n" "3: mvcos 0(%[to]),0(%[zeropg]),%[rem]\n" "4: slgr %[size],%[rem]\n" " j 6f\n" "5: slgr %[size],%[size]\n" "6:\n" EX_TABLE(0b, 2b) EX_TABLE(1b, 2b) EX_TABLE(3b, 6b) EX_TABLE(4b, 6b) : [size] "+&a" (size), [to] "+&a" (to), [rem] "=&a" (rem) : [val] "a" (-4096UL), [zeropg] "a" (empty_zero_page), [spec] "d" (spec.val) : "cc", "memory", "0"); return size; } EXPORT_SYMBOL(__clear_user); |