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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 | // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 1999 - 2018 Intel Corporation. */ #include "mbx.h" #include "ixgbevf.h" /** * ixgbevf_poll_for_msg - Wait for message notification * @hw: pointer to the HW structure * * returns 0 if it successfully received a message notification **/ static s32 ixgbevf_poll_for_msg(struct ixgbe_hw *hw) { struct ixgbe_mbx_info *mbx = &hw->mbx; int countdown = mbx->timeout; if (!countdown || !mbx->ops.check_for_msg) return IXGBE_ERR_CONFIG; while (countdown && mbx->ops.check_for_msg(hw)) { countdown--; udelay(mbx->udelay); } return countdown ? 0 : IXGBE_ERR_TIMEOUT; } /** * ixgbevf_poll_for_ack - Wait for message acknowledgment * @hw: pointer to the HW structure * * returns 0 if it successfully received a message acknowledgment **/ static s32 ixgbevf_poll_for_ack(struct ixgbe_hw *hw) { struct ixgbe_mbx_info *mbx = &hw->mbx; int countdown = mbx->timeout; if (!countdown || !mbx->ops.check_for_ack) return IXGBE_ERR_CONFIG; while (countdown && mbx->ops.check_for_ack(hw)) { countdown--; udelay(mbx->udelay); } return countdown ? 0 : IXGBE_ERR_TIMEOUT; } /** * ixgbevf_read_mailbox_vf - read VF's mailbox register * @hw: pointer to the HW structure * * This function is used to read the mailbox register dedicated for VF without * losing the read to clear status bits. **/ static u32 ixgbevf_read_mailbox_vf(struct ixgbe_hw *hw) { u32 vf_mailbox = IXGBE_READ_REG(hw, IXGBE_VFMAILBOX); vf_mailbox |= hw->mbx.vf_mailbox; hw->mbx.vf_mailbox |= vf_mailbox & IXGBE_VFMAILBOX_R2C_BITS; return vf_mailbox; } /** * ixgbevf_clear_msg_vf - clear PF status bit * @hw: pointer to the HW structure * * This function is used to clear PFSTS bit in the VFMAILBOX register **/ static void ixgbevf_clear_msg_vf(struct ixgbe_hw *hw) { u32 vf_mailbox = ixgbevf_read_mailbox_vf(hw); if (vf_mailbox & IXGBE_VFMAILBOX_PFSTS) { hw->mbx.stats.reqs++; hw->mbx.vf_mailbox &= ~IXGBE_VFMAILBOX_PFSTS; } } /** * ixgbevf_clear_ack_vf - clear PF ACK bit * @hw: pointer to the HW structure * * This function is used to clear PFACK bit in the VFMAILBOX register **/ static void ixgbevf_clear_ack_vf(struct ixgbe_hw *hw) { u32 vf_mailbox = ixgbevf_read_mailbox_vf(hw); if (vf_mailbox & IXGBE_VFMAILBOX_PFACK) { hw->mbx.stats.acks++; hw->mbx.vf_mailbox &= ~IXGBE_VFMAILBOX_PFACK; } } /** * ixgbevf_clear_rst_vf - clear PF reset bit * @hw: pointer to the HW structure * * This function is used to clear reset indication and reset done bit in * VFMAILBOX register after reset the shared resources and the reset sequence. **/ static void ixgbevf_clear_rst_vf(struct ixgbe_hw *hw) { u32 vf_mailbox = ixgbevf_read_mailbox_vf(hw); if (vf_mailbox & (IXGBE_VFMAILBOX_RSTI | IXGBE_VFMAILBOX_RSTD)) { hw->mbx.stats.rsts++; hw->mbx.vf_mailbox &= ~(IXGBE_VFMAILBOX_RSTI | IXGBE_VFMAILBOX_RSTD); } } /** * ixgbevf_check_for_bit_vf - Determine if a status bit was set * @hw: pointer to the HW structure * @mask: bitmask for bits to be tested and cleared * * This function is used to check for the read to clear bits within * the V2P mailbox. **/ static s32 ixgbevf_check_for_bit_vf(struct ixgbe_hw *hw, u32 mask) { u32 vf_mailbox = ixgbevf_read_mailbox_vf(hw); s32 ret_val = IXGBE_ERR_MBX; if (vf_mailbox & mask) ret_val = 0; return ret_val; } /** * ixgbevf_check_for_msg_vf - checks to see if the PF has sent mail * @hw: pointer to the HW structure * * returns 0 if the PF has set the Status bit or else ERR_MBX **/ static s32 ixgbevf_check_for_msg_vf(struct ixgbe_hw *hw) { s32 ret_val = IXGBE_ERR_MBX; if (!ixgbevf_check_for_bit_vf(hw, IXGBE_VFMAILBOX_PFSTS)) { ret_val = 0; hw->mbx.stats.reqs++; } return ret_val; } /** * ixgbevf_check_for_ack_vf - checks to see if the PF has ACK'd * @hw: pointer to the HW structure * * returns 0 if the PF has set the ACK bit or else ERR_MBX **/ static s32 ixgbevf_check_for_ack_vf(struct ixgbe_hw *hw) { s32 ret_val = IXGBE_ERR_MBX; if (!ixgbevf_check_for_bit_vf(hw, IXGBE_VFMAILBOX_PFACK)) { ret_val = 0; ixgbevf_clear_ack_vf(hw); hw->mbx.stats.acks++; } return ret_val; } /** * ixgbevf_check_for_rst_vf - checks to see if the PF has reset * @hw: pointer to the HW structure * * returns true if the PF has set the reset done bit or else false **/ static s32 ixgbevf_check_for_rst_vf(struct ixgbe_hw *hw) { s32 ret_val = IXGBE_ERR_MBX; if (!ixgbevf_check_for_bit_vf(hw, (IXGBE_VFMAILBOX_RSTD | IXGBE_VFMAILBOX_RSTI))) { ret_val = 0; ixgbevf_clear_rst_vf(hw); hw->mbx.stats.rsts++; } return ret_val; } /** * ixgbevf_obtain_mbx_lock_vf - obtain mailbox lock * @hw: pointer to the HW structure * * return 0 if we obtained the mailbox lock **/ static s32 ixgbevf_obtain_mbx_lock_vf(struct ixgbe_hw *hw) { struct ixgbe_mbx_info *mbx = &hw->mbx; s32 ret_val = IXGBE_ERR_CONFIG; int countdown = mbx->timeout; u32 vf_mailbox; if (!mbx->timeout) return ret_val; while (countdown--) { /* Reserve mailbox for VF use */ vf_mailbox = ixgbevf_read_mailbox_vf(hw); vf_mailbox |= IXGBE_VFMAILBOX_VFU; IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox); /* Verify that VF is the owner of the lock */ if (ixgbevf_read_mailbox_vf(hw) & IXGBE_VFMAILBOX_VFU) { ret_val = 0; break; } /* Wait a bit before trying again */ udelay(mbx->udelay); } if (ret_val) ret_val = IXGBE_ERR_TIMEOUT; return ret_val; } /** * ixgbevf_release_mbx_lock_vf - release mailbox lock * @hw: pointer to the HW structure **/ static void ixgbevf_release_mbx_lock_vf(struct ixgbe_hw *hw) { u32 vf_mailbox; /* Return ownership of the buffer */ vf_mailbox = ixgbevf_read_mailbox_vf(hw); vf_mailbox &= ~IXGBE_VFMAILBOX_VFU; IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox); } /** * ixgbevf_release_mbx_lock_vf_legacy - release mailbox lock * @hw: pointer to the HW structure **/ static void ixgbevf_release_mbx_lock_vf_legacy(struct ixgbe_hw *__always_unused hw) { } /** * ixgbevf_write_mbx_vf - Write a message to the mailbox * @hw: pointer to the HW structure * @msg: The message buffer * @size: Length of buffer * * returns 0 if it successfully copied message into the buffer **/ static s32 ixgbevf_write_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size) { u32 vf_mailbox; s32 ret_val; u16 i; /* lock the mailbox to prevent PF/VF race condition */ ret_val = ixgbevf_obtain_mbx_lock_vf(hw); if (ret_val) goto out_no_write; /* flush msg and acks as we are overwriting the message buffer */ ixgbevf_clear_msg_vf(hw); ixgbevf_clear_ack_vf(hw); /* copy the caller specified message to the mailbox memory buffer */ for (i = 0; i < size; i++) IXGBE_WRITE_REG_ARRAY(hw, IXGBE_VFMBMEM, i, msg[i]); /* update stats */ hw->mbx.stats.msgs_tx++; /* interrupt the PF to tell it a message has been sent */ vf_mailbox = ixgbevf_read_mailbox_vf(hw); vf_mailbox |= IXGBE_VFMAILBOX_REQ; IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox); /* if msg sent wait until we receive an ack */ ret_val = ixgbevf_poll_for_ack(hw); out_no_write: hw->mbx.ops.release(hw); return ret_val; } /** * ixgbevf_write_mbx_vf_legacy - Write a message to the mailbox * @hw: pointer to the HW structure * @msg: The message buffer * @size: Length of buffer * * returns 0 if it successfully copied message into the buffer **/ static s32 ixgbevf_write_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size) { s32 ret_val; u16 i; /* lock the mailbox to prevent PF/VF race condition */ ret_val = ixgbevf_obtain_mbx_lock_vf(hw); if (ret_val) goto out_no_write; /* flush msg and acks as we are overwriting the message buffer */ ixgbevf_check_for_msg_vf(hw); ixgbevf_clear_msg_vf(hw); ixgbevf_check_for_ack_vf(hw); ixgbevf_clear_ack_vf(hw); /* copy the caller specified message to the mailbox memory buffer */ for (i = 0; i < size; i++) IXGBE_WRITE_REG_ARRAY(hw, IXGBE_VFMBMEM, i, msg[i]); /* update stats */ hw->mbx.stats.msgs_tx++; /* Drop VFU and interrupt the PF to tell it a message has been sent */ IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_REQ); out_no_write: return ret_val; } /** * ixgbevf_read_mbx_vf - Reads a message from the inbox intended for VF * @hw: pointer to the HW structure * @msg: The message buffer * @size: Length of buffer * * returns 0 if it successfully read message from buffer **/ static s32 ixgbevf_read_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size) { u32 vf_mailbox; s32 ret_val; u16 i; /* check if there is a message from PF */ ret_val = ixgbevf_check_for_msg_vf(hw); if (ret_val) return ret_val; ixgbevf_clear_msg_vf(hw); /* copy the message from the mailbox memory buffer */ for (i = 0; i < size; i++) msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_VFMBMEM, i); /* Acknowledge receipt */ vf_mailbox = ixgbevf_read_mailbox_vf(hw); vf_mailbox |= IXGBE_VFMAILBOX_ACK; IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox); /* update stats */ hw->mbx.stats.msgs_rx++; return ret_val; } /** * ixgbevf_read_mbx_vf_legacy - Reads a message from the inbox intended for VF * @hw: pointer to the HW structure * @msg: The message buffer * @size: Length of buffer * * returns 0 if it successfully read message from buffer **/ static s32 ixgbevf_read_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size) { s32 ret_val = 0; u16 i; /* lock the mailbox to prevent PF/VF race condition */ ret_val = ixgbevf_obtain_mbx_lock_vf(hw); if (ret_val) goto out_no_read; /* copy the message from the mailbox memory buffer */ for (i = 0; i < size; i++) msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_VFMBMEM, i); /* Acknowledge receipt and release mailbox, then we're done */ IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_ACK); /* update stats */ hw->mbx.stats.msgs_rx++; out_no_read: return ret_val; } /** * ixgbevf_init_mbx_params_vf - set initial values for VF mailbox * @hw: pointer to the HW structure * * Initializes the hw->mbx struct to correct values for VF mailbox */ static s32 ixgbevf_init_mbx_params_vf(struct ixgbe_hw *hw) { struct ixgbe_mbx_info *mbx = &hw->mbx; /* start mailbox as timed out and let the reset_hw call set the timeout * value to begin communications */ mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; mbx->udelay = IXGBE_VF_MBX_INIT_DELAY; mbx->size = IXGBE_VFMAILBOX_SIZE; mbx->stats.msgs_tx = 0; mbx->stats.msgs_rx = 0; mbx->stats.reqs = 0; mbx->stats.acks = 0; mbx->stats.rsts = 0; return 0; } /** * ixgbevf_poll_mbx - Wait for message and read it from the mailbox * @hw: pointer to the HW structure * @msg: The message buffer * @size: Length of buffer * * returns 0 if it successfully read message from buffer **/ s32 ixgbevf_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size) { struct ixgbe_mbx_info *mbx = &hw->mbx; s32 ret_val = IXGBE_ERR_CONFIG; if (!mbx->ops.read || !mbx->ops.check_for_msg || !mbx->timeout) return ret_val; /* limit read to size of mailbox */ if (size > mbx->size) size = mbx->size; ret_val = ixgbevf_poll_for_msg(hw); /* if ack received read message, otherwise we timed out */ if (!ret_val) ret_val = mbx->ops.read(hw, msg, size); return ret_val; } /** * ixgbevf_write_mbx - Write a message to the mailbox and wait for ACK * @hw: pointer to the HW structure * @msg: The message buffer * @size: Length of buffer * * returns 0 if it successfully copied message into the buffer and * received an ACK to that message within specified period **/ s32 ixgbevf_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size) { struct ixgbe_mbx_info *mbx = &hw->mbx; s32 ret_val = IXGBE_ERR_CONFIG; /** * exit if either we can't write, release * or there is no timeout defined */ if (!mbx->ops.write || !mbx->ops.check_for_ack || !mbx->ops.release || !mbx->timeout) return ret_val; if (size > mbx->size) ret_val = IXGBE_ERR_PARAM; else ret_val = mbx->ops.write(hw, msg, size); return ret_val; } const struct ixgbe_mbx_operations ixgbevf_mbx_ops = { .init_params = ixgbevf_init_mbx_params_vf, .release = ixgbevf_release_mbx_lock_vf, .read = ixgbevf_read_mbx_vf, .write = ixgbevf_write_mbx_vf, .check_for_msg = ixgbevf_check_for_msg_vf, .check_for_ack = ixgbevf_check_for_ack_vf, .check_for_rst = ixgbevf_check_for_rst_vf, }; const struct ixgbe_mbx_operations ixgbevf_mbx_ops_legacy = { .init_params = ixgbevf_init_mbx_params_vf, .release = ixgbevf_release_mbx_lock_vf_legacy, .read = ixgbevf_read_mbx_vf_legacy, .write = ixgbevf_write_mbx_vf_legacy, .check_for_msg = ixgbevf_check_for_msg_vf, .check_for_ack = ixgbevf_check_for_ack_vf, .check_for_rst = ixgbevf_check_for_rst_vf, }; /* Mailbox operations when running on Hyper-V. * On Hyper-V, PF/VF communication is not through the * hardware mailbox; this communication is through * a software mediated path. * Most mail box operations are noop while running on * Hyper-V. */ const struct ixgbe_mbx_operations ixgbevf_hv_mbx_ops = { .init_params = ixgbevf_init_mbx_params_vf, .check_for_rst = ixgbevf_check_for_rst_vf, }; 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