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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 | // SPDX-License-Identifier: GPL-2.0-only /* * linux/arch/arm/mach-pxa/pxa25x.c * * Author: Nicolas Pitre * Created: Jun 15, 2001 * Copyright: MontaVista Software Inc. * * Code specific to PXA21x/25x/26x variants. * * Since this file should be linked before any other machine specific file, * the __initcall() here will be executed first. This serves as default * initialization stuff for PXA machines which can be overridden later if * need be. */ #include <linux/dmaengine.h> #include <linux/dma/pxa-dma.h> #include <linux/gpio.h> #include <linux/gpio-pxa.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/suspend.h> #include <linux/syscore_ops.h> #include <linux/irq.h> #include <linux/irqchip.h> #include <linux/platform_data/mmp_dma.h> #include <linux/soc/pxa/cpu.h> #include <linux/soc/pxa/smemc.h> #include <asm/mach/map.h> #include <asm/suspend.h> #include "irqs.h" #include "pxa25x.h" #include "reset.h" #include "pm.h" #include "addr-map.h" #include "smemc.h" #include "generic.h" #include "devices.h" /* * Various clock factors driven by the CCCR register. */ #ifdef CONFIG_PM #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] /* * List of global PXA peripheral registers to preserve. * More ones like CP and general purpose register values are preserved * with the stack pointer in sleep.S. */ enum { SLEEP_SAVE_PSTR, SLEEP_SAVE_COUNT }; static void pxa25x_cpu_pm_save(unsigned long *sleep_save) { SAVE(PSTR); } static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) { RESTORE(PSTR); } static void pxa25x_cpu_pm_enter(suspend_state_t state) { /* Clear reset status */ RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; switch (state) { case PM_SUSPEND_MEM: cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend); break; } } static int pxa25x_cpu_pm_prepare(void) { /* set resume return address */ PSPR = __pa_symbol(cpu_resume); return 0; } static void pxa25x_cpu_pm_finish(void) { /* ensure not to come back here if it wasn't intended */ PSPR = 0; } static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = { .save_count = SLEEP_SAVE_COUNT, .valid = suspend_valid_only_mem, .save = pxa25x_cpu_pm_save, .restore = pxa25x_cpu_pm_restore, .enter = pxa25x_cpu_pm_enter, .prepare = pxa25x_cpu_pm_prepare, .finish = pxa25x_cpu_pm_finish, }; static void __init pxa25x_init_pm(void) { pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns; } #else static inline void pxa25x_init_pm(void) {} #endif /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm */ static int pxa25x_set_wake(struct irq_data *d, unsigned int on) { int gpio = pxa_irq_to_gpio(d->irq); uint32_t mask = 0; if (gpio >= 0 && gpio < 85) return gpio_set_wake(gpio, on); if (d->irq == IRQ_RTCAlrm) { mask = PWER_RTC; goto set_pwer; } return -EINVAL; set_pwer: if (on) PWER |= mask; else PWER &=~mask; return 0; } void __init pxa25x_init_irq(void) { pxa_init_irq(32, pxa25x_set_wake); set_handle_irq(pxa25x_handle_irq); } static int __init __init pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent) { pxa_dt_irq_init(pxa25x_set_wake); set_handle_irq(icip_handle_irq); return 0; } IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq); static struct map_desc pxa25x_io_desc[] __initdata = { { /* Mem Ctl */ .virtual = (unsigned long)SMEMC_VIRT, .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), .length = SMEMC_SIZE, .type = MT_DEVICE }, { /* UNCACHED_PHYS_0 */ .virtual = UNCACHED_PHYS_0, .pfn = __phys_to_pfn(0x00000000), .length = UNCACHED_PHYS_0_SIZE, .type = MT_DEVICE }, }; void __init pxa25x_map_io(void) { pxa_map_io(); iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc)); pxa25x_get_clk_frequency_khz(1); } static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = { .irq_base = PXA_GPIO_TO_IRQ(0), .gpio_set_wake = gpio_set_wake, }; static struct platform_device *pxa25x_devices[] __initdata = { &pxa25x_device_udc, &pxa_device_pmu, &pxa_device_i2s, &sa1100_device_rtc, &pxa25x_device_ssp, &pxa25x_device_nssp, &pxa25x_device_assp, &pxa25x_device_pwm0, &pxa25x_device_pwm1, &pxa_device_asoc_platform, }; static const struct dma_slave_map pxa25x_slave_map[] = { /* PXA25x, PXA27x and PXA3xx common entries */ { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) }, { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) }, { "pxa2xx-ac97", "pcm_pcm_aux_mono_out", PDMA_FILTER_PARAM(LOWEST, 10) }, { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) }, { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) }, { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 13) }, { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 14) }, { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 15) }, { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 16) }, { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) }, { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) }, { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) }, { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) }, /* PXA25x specific map */ { "pxa25x-ssp.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) }, { "pxa25x-ssp.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) }, { "pxa25x-nssp.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) }, { "pxa25x-nssp.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) }, { "pxa25x-nssp.2", "rx", PDMA_FILTER_PARAM(LOWEST, 23) }, { "pxa25x-nssp.2", "tx", PDMA_FILTER_PARAM(LOWEST, 24) }, }; static struct mmp_dma_platdata pxa25x_dma_pdata = { .dma_channels = 16, .nb_requestors = 40, .slave_map = pxa25x_slave_map, .slave_map_cnt = ARRAY_SIZE(pxa25x_slave_map), }; static int __init pxa25x_init(void) { int ret = 0; if (cpu_is_pxa25x()) { pxa_register_wdt(RCSR); pxa25x_init_pm(); register_syscore_ops(&pxa_irq_syscore_ops); register_syscore_ops(&pxa2xx_mfp_syscore_ops); if (!of_have_populated_dt()) { pxa2xx_set_dmac_info(&pxa25x_dma_pdata); pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info); ret = platform_add_devices(pxa25x_devices, ARRAY_SIZE(pxa25x_devices)); } } return ret; } postcore_initcall(pxa25x_init); |