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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 | // SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright 2012 Stefan Roese <sr@denx.de> */ / { #address-cells = <1>; #size-cells = <1>; compatible = "st,spear600"; cpus { #address-cells = <0>; #size-cells = <0>; cpu { compatible = "arm,arm926ej-s"; device_type = "cpu"; }; }; memory { device_type = "memory"; reg = <0 0x40000000>; }; ahb { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges = <0xd0000000 0xd0000000 0x30000000>; vic0: interrupt-controller@f1100000 { compatible = "arm,pl190-vic"; interrupt-controller; reg = <0xf1100000 0x1000>; #interrupt-cells = <1>; }; vic1: interrupt-controller@f1000000 { compatible = "arm,pl190-vic"; interrupt-controller; reg = <0xf1000000 0x1000>; #interrupt-cells = <1>; }; clcd: clcd@fc200000 { compatible = "arm,pl110", "arm,primecell"; reg = <0xfc200000 0x1000>; interrupt-parent = <&vic1>; interrupts = <13>; status = "disabled"; }; dmac: dma@fc400000 { compatible = "arm,pl080", "arm,primecell"; reg = <0xfc400000 0x1000>; interrupt-parent = <&vic1>; interrupts = <10>; status = "disabled"; }; gmac: ethernet@e0800000 { compatible = "st,spear600-gmac"; reg = <0xe0800000 0x8000>; interrupt-parent = <&vic1>; interrupts = <24 23>; interrupt-names = "macirq", "eth_wake_irq"; phy-mode = "gmii"; status = "disabled"; }; fsmc: flash@d1800000 { compatible = "st,spear600-fsmc-nand"; #address-cells = <1>; #size-cells = <1>; reg = <0xd1800000 0x1000 /* FSMC Register */ 0xd2000000 0x0010 /* NAND Base DATA */ 0xd2020000 0x0010 /* NAND Base ADDR */ 0xd2010000 0x0010>; /* NAND Base CMD */ reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; status = "disabled"; }; smi: flash@fc000000 { compatible = "st,spear600-smi"; #address-cells = <1>; #size-cells = <1>; reg = <0xfc000000 0x1000>; interrupt-parent = <&vic1>; interrupts = <12>; status = "disabled"; }; ehci_usb0: ehci@e1800000 { compatible = "st,spear600-ehci", "usb-ehci"; reg = <0xe1800000 0x1000>; interrupt-parent = <&vic1>; interrupts = <27>; status = "disabled"; }; ehci_usb1: ehci@e2000000 { compatible = "st,spear600-ehci", "usb-ehci"; reg = <0xe2000000 0x1000>; interrupt-parent = <&vic1>; interrupts = <29>; status = "disabled"; }; ohci_usb0: ohci@e1900000 { compatible = "st,spear600-ohci", "usb-ohci"; reg = <0xe1900000 0x1000>; interrupt-parent = <&vic1>; interrupts = <26>; status = "disabled"; }; ohci_usb1: ohci@e2100000 { compatible = "st,spear600-ohci", "usb-ohci"; reg = <0xe2100000 0x1000>; interrupt-parent = <&vic1>; interrupts = <28>; status = "disabled"; }; apb { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges = <0xd0000000 0xd0000000 0x30000000>; uart0: serial@d0000000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xd0000000 0x1000>; interrupt-parent = <&vic0>; interrupts = <24>; status = "disabled"; }; uart1: serial@d0080000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xd0080000 0x1000>; interrupt-parent = <&vic0>; interrupts = <25>; status = "disabled"; }; /* local/cpu GPIO */ gpio0: gpio@f0100000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0xf0100000 0x1000>; interrupt-parent = <&vic0>; interrupts = <18>; }; /* basic GPIO */ gpio1: gpio@fc980000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0xfc980000 0x1000>; interrupt-parent = <&vic1>; interrupts = <19>; }; /* appl GPIO */ gpio2: gpio@d8100000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0xd8100000 0x1000>; interrupt-parent = <&vic1>; interrupts = <4>; }; i2c: i2c@d0200000 { #address-cells = <1>; #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xd0200000 0x1000>; interrupt-parent = <&vic0>; interrupts = <28>; status = "disabled"; }; rtc: rtc@fc900000 { compatible = "st,spear600-rtc"; reg = <0xfc900000 0x1000>; interrupt-parent = <&vic0>; interrupts = <10>; status = "disabled"; }; timer@f0000000 { compatible = "st,spear-timer"; reg = <0xf0000000 0x400>; interrupt-parent = <&vic0>; interrupts = <16>; }; adc: adc@d820b000 { compatible = "st,spear600-adc"; reg = <0xd820b000 0x1000>; interrupt-parent = <&vic1>; interrupts = <6>; status = "disabled"; }; ssp1: spi@d0100000 { compatible = "arm,pl022", "arm,primecell"; reg = <0xd0100000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupt-parent = <&vic0>; interrupts = <26>; status = "disabled"; }; ssp2: spi@d0180000 { compatible = "arm,pl022", "arm,primecell"; reg = <0xd0180000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupt-parent = <&vic0>; interrupts = <27>; status = "disabled"; }; ssp3: spi@d8180000 { compatible = "arm,pl022", "arm,primecell"; reg = <0xd8180000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupt-parent = <&vic1>; interrupts = <5>; status = "disabled"; }; }; }; }; |