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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 | // SPDX-License-Identifier: GPL-2.0-only /* * SMBus 2.0 driver for AMD-8111 IO-Hub. * * Copyright (c) 2002 Vojtech Pavlik */ #include <linux/module.h> #include <linux/pci.h> #include <linux/kernel.h> #include <linux/stddef.h> #include <linux/ioport.h> #include <linux/i2c.h> #include <linux/delay.h> #include <linux/acpi.h> #include <linux/slab.h> #include <linux/io.h> MODULE_LICENSE("GPL"); MODULE_AUTHOR ("Vojtech Pavlik <vojtech@suse.cz>"); MODULE_DESCRIPTION("AMD8111 SMBus 2.0 driver"); struct amd_smbus { struct pci_dev *dev; struct i2c_adapter adapter; int base; int size; }; static struct pci_driver amd8111_driver; /* * AMD PCI control registers definitions. */ #define AMD_PCI_MISC 0x48 #define AMD_PCI_MISC_SCI 0x04 /* deliver SCI */ #define AMD_PCI_MISC_INT 0x02 /* deliver PCI IRQ */ #define AMD_PCI_MISC_SPEEDUP 0x01 /* 16x clock speedup */ /* * ACPI 2.0 chapter 13 PCI interface definitions. */ #define AMD_EC_DATA 0x00 /* data register */ #define AMD_EC_SC 0x04 /* status of controller */ #define AMD_EC_CMD 0x04 /* command register */ #define AMD_EC_ICR 0x08 /* interrupt control register */ #define AMD_EC_SC_SMI 0x04 /* smi event pending */ #define AMD_EC_SC_SCI 0x02 /* sci event pending */ #define AMD_EC_SC_BURST 0x01 /* burst mode enabled */ #define AMD_EC_SC_CMD 0x08 /* byte in data reg is command */ #define AMD_EC_SC_IBF 0x02 /* data ready for embedded controller */ #define AMD_EC_SC_OBF 0x01 /* data ready for host */ #define AMD_EC_CMD_RD 0x80 /* read EC */ #define AMD_EC_CMD_WR 0x81 /* write EC */ #define AMD_EC_CMD_BE 0x82 /* enable burst mode */ #define AMD_EC_CMD_BD 0x83 /* disable burst mode */ #define AMD_EC_CMD_QR 0x84 /* query EC */ /* * ACPI 2.0 chapter 13 access of registers of the EC */ static int amd_ec_wait_write(struct amd_smbus *smbus) { int timeout = 500; while ((inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_IBF) && --timeout) udelay(1); if (!timeout) { dev_warn(&smbus->dev->dev, "Timeout while waiting for IBF to clear\n"); return -ETIMEDOUT; } return 0; } static int amd_ec_wait_read(struct amd_smbus *smbus) { int timeout = 500; while ((~inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_OBF) && --timeout) udelay(1); if (!timeout) { dev_warn(&smbus->dev->dev, "Timeout while waiting for OBF to set\n"); return -ETIMEDOUT; } return 0; } static int amd_ec_read(struct amd_smbus *smbus, unsigned char address, unsigned char *data) { int status; status = amd_ec_wait_write(smbus); if (status) return status; outb(AMD_EC_CMD_RD, smbus->base + AMD_EC_CMD); status = amd_ec_wait_write(smbus); if (status) return status; outb(address, smbus->base + AMD_EC_DATA); status = amd_ec_wait_read(smbus); if (status) return status; *data = inb(smbus->base + AMD_EC_DATA); return 0; } static int amd_ec_write(struct amd_smbus *smbus, unsigned char address, unsigned char data) { int status; status = amd_ec_wait_write(smbus); if (status) return status; outb(AMD_EC_CMD_WR, smbus->base + AMD_EC_CMD); status = amd_ec_wait_write(smbus); if (status) return status; outb(address, smbus->base + AMD_EC_DATA); status = amd_ec_wait_write(smbus); if (status) return status; outb(data, smbus->base + AMD_EC_DATA); return 0; } /* * ACPI 2.0 chapter 13 SMBus 2.0 EC register model */ #define AMD_SMB_PRTCL 0x00 /* protocol, PEC */ #define AMD_SMB_STS 0x01 /* status */ #define AMD_SMB_ADDR 0x02 /* address */ #define AMD_SMB_CMD 0x03 /* command */ #define AMD_SMB_DATA 0x04 /* 32 data registers */ #define AMD_SMB_BCNT 0x24 /* number of data bytes */ #define AMD_SMB_ALRM_A 0x25 /* alarm address */ #define AMD_SMB_ALRM_D 0x26 /* 2 bytes alarm data */ #define AMD_SMB_STS_DONE 0x80 #define AMD_SMB_STS_ALRM 0x40 #define AMD_SMB_STS_RES 0x20 #define AMD_SMB_STS_STATUS 0x1f #define AMD_SMB_STATUS_OK 0x00 #define AMD_SMB_STATUS_FAIL 0x07 #define AMD_SMB_STATUS_DNAK 0x10 #define AMD_SMB_STATUS_DERR 0x11 #define AMD_SMB_STATUS_CMD_DENY 0x12 #define AMD_SMB_STATUS_UNKNOWN 0x13 #define AMD_SMB_STATUS_ACC_DENY 0x17 #define AMD_SMB_STATUS_TIMEOUT 0x18 #define AMD_SMB_STATUS_NOTSUP 0x19 #define AMD_SMB_STATUS_BUSY 0x1A #define AMD_SMB_STATUS_PEC 0x1F #define AMD_SMB_PRTCL_WRITE 0x00 #define AMD_SMB_PRTCL_READ 0x01 #define AMD_SMB_PRTCL_QUICK 0x02 #define AMD_SMB_PRTCL_BYTE 0x04 #define AMD_SMB_PRTCL_BYTE_DATA 0x06 #define AMD_SMB_PRTCL_WORD_DATA 0x08 #define AMD_SMB_PRTCL_BLOCK_DATA 0x0a #define AMD_SMB_PRTCL_PROC_CALL 0x0c #define AMD_SMB_PRTCL_BLOCK_PROC_CALL 0x0d #define AMD_SMB_PRTCL_I2C_BLOCK_DATA 0x4a #define AMD_SMB_PRTCL_PEC 0x80 static s32 amd8111_access(struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data) { struct amd_smbus *smbus = adap->algo_data; unsigned char protocol, len, pec, temp[2]; int i, status; protocol = (read_write == I2C_SMBUS_READ) ? AMD_SMB_PRTCL_READ : AMD_SMB_PRTCL_WRITE; pec = (flags & I2C_CLIENT_PEC) ? AMD_SMB_PRTCL_PEC : 0; switch (size) { case I2C_SMBUS_QUICK: protocol |= AMD_SMB_PRTCL_QUICK; read_write = I2C_SMBUS_WRITE; break; case I2C_SMBUS_BYTE: if (read_write == I2C_SMBUS_WRITE) { status = amd_ec_write(smbus, AMD_SMB_CMD, command); if (status) return status; } protocol |= AMD_SMB_PRTCL_BYTE; break; case I2C_SMBUS_BYTE_DATA: status = amd_ec_write(smbus, AMD_SMB_CMD, command); if (status) return status; if (read_write == I2C_SMBUS_WRITE) { status = amd_ec_write(smbus, AMD_SMB_DATA, data->byte); if (status) return status; } protocol |= AMD_SMB_PRTCL_BYTE_DATA; break; case I2C_SMBUS_WORD_DATA: status = amd_ec_write(smbus, AMD_SMB_CMD, command); if (status) return status; if (read_write == I2C_SMBUS_WRITE) { status = amd_ec_write(smbus, AMD_SMB_DATA, data->word & 0xff); if (status) return status; status = amd_ec_write(smbus, AMD_SMB_DATA + 1, data->word >> 8); if (status) return status; } protocol |= AMD_SMB_PRTCL_WORD_DATA | pec; break; case I2C_SMBUS_BLOCK_DATA: status = amd_ec_write(smbus, AMD_SMB_CMD, command); if (status) return status; if (read_write == I2C_SMBUS_WRITE) { len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX); status = amd_ec_write(smbus, AMD_SMB_BCNT, len); if (status) return status; for (i = 0; i < len; i++) { status = amd_ec_write(smbus, AMD_SMB_DATA + i, data->block[i + 1]); if (status) return status; } } protocol |= AMD_SMB_PRTCL_BLOCK_DATA | pec; break; case I2C_SMBUS_I2C_BLOCK_DATA: len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX); status = amd_ec_write(smbus, AMD_SMB_CMD, command); if (status) return status; status = amd_ec_write(smbus, AMD_SMB_BCNT, len); if (status) return status; if (read_write == I2C_SMBUS_WRITE) for (i = 0; i < len; i++) { status = amd_ec_write(smbus, AMD_SMB_DATA + i, data->block[i + 1]); if (status) return status; } protocol |= AMD_SMB_PRTCL_I2C_BLOCK_DATA; break; case I2C_SMBUS_PROC_CALL: status = amd_ec_write(smbus, AMD_SMB_CMD, command); if (status) return status; status = amd_ec_write(smbus, AMD_SMB_DATA, data->word & 0xff); if (status) return status; status = amd_ec_write(smbus, AMD_SMB_DATA + 1, data->word >> 8); if (status) return status; protocol = AMD_SMB_PRTCL_PROC_CALL | pec; read_write = I2C_SMBUS_READ; break; case I2C_SMBUS_BLOCK_PROC_CALL: len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX - 1); status = amd_ec_write(smbus, AMD_SMB_CMD, command); if (status) return status; status = amd_ec_write(smbus, AMD_SMB_BCNT, len); if (status) return status; for (i = 0; i < len; i++) { status = amd_ec_write(smbus, AMD_SMB_DATA + i, data->block[i + 1]); if (status) return status; } protocol = AMD_SMB_PRTCL_BLOCK_PROC_CALL | pec; read_write = I2C_SMBUS_READ; break; default: dev_warn(&adap->dev, "Unsupported transaction %d\n", size); return -EOPNOTSUPP; } status = amd_ec_write(smbus, AMD_SMB_ADDR, addr << 1); if (status) return status; status = amd_ec_write(smbus, AMD_SMB_PRTCL, protocol); if (status) return status; status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0); if (status) return status; if (~temp[0] & AMD_SMB_STS_DONE) { udelay(500); status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0); if (status) return status; } if (~temp[0] & AMD_SMB_STS_DONE) { msleep(1); status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0); if (status) return status; } if ((~temp[0] & AMD_SMB_STS_DONE) || (temp[0] & AMD_SMB_STS_STATUS)) return -EIO; if (read_write == I2C_SMBUS_WRITE) return 0; switch (size) { case I2C_SMBUS_BYTE: case I2C_SMBUS_BYTE_DATA: status = amd_ec_read(smbus, AMD_SMB_DATA, &data->byte); if (status) return status; break; case I2C_SMBUS_WORD_DATA: case I2C_SMBUS_PROC_CALL: status = amd_ec_read(smbus, AMD_SMB_DATA, temp + 0); if (status) return status; status = amd_ec_read(smbus, AMD_SMB_DATA + 1, temp + 1); if (status) return status; data->word = (temp[1] << 8) | temp[0]; break; case I2C_SMBUS_BLOCK_DATA: case I2C_SMBUS_BLOCK_PROC_CALL: status = amd_ec_read(smbus, AMD_SMB_BCNT, &len); if (status) return status; len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX); fallthrough; case I2C_SMBUS_I2C_BLOCK_DATA: for (i = 0; i < len; i++) { status = amd_ec_read(smbus, AMD_SMB_DATA + i, data->block + i + 1); if (status) return status; } data->block[0] = len; break; } return 0; } static u32 amd8111_func(struct i2c_adapter *adapter) { return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | I2C_FUNC_SMBUS_I2C_BLOCK | I2C_FUNC_SMBUS_PEC; } static const struct i2c_algorithm smbus_algorithm = { .smbus_xfer = amd8111_access, .functionality = amd8111_func, }; static const struct pci_device_id amd8111_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS2) }, { 0, } }; MODULE_DEVICE_TABLE (pci, amd8111_ids); static int amd8111_probe(struct pci_dev *dev, const struct pci_device_id *id) { struct amd_smbus *smbus; int error; if (!(pci_resource_flags(dev, 0) & IORESOURCE_IO)) return -ENODEV; smbus = kzalloc(sizeof(struct amd_smbus), GFP_KERNEL); if (!smbus) return -ENOMEM; smbus->dev = dev; smbus->base = pci_resource_start(dev, 0); smbus->size = pci_resource_len(dev, 0); error = acpi_check_resource_conflict(&dev->resource[0]); if (error) { error = -ENODEV; goto out_kfree; } if (!request_region(smbus->base, smbus->size, amd8111_driver.name)) { error = -EBUSY; goto out_kfree; } smbus->adapter.owner = THIS_MODULE; snprintf(smbus->adapter.name, sizeof(smbus->adapter.name), "SMBus2 AMD8111 adapter at %04x", smbus->base); smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD; smbus->adapter.algo = &smbus_algorithm; smbus->adapter.algo_data = smbus; /* set up the sysfs linkage to our parent device */ smbus->adapter.dev.parent = &dev->dev; pci_write_config_dword(smbus->dev, AMD_PCI_MISC, 0); error = i2c_add_adapter(&smbus->adapter); if (error) goto out_release_region; pci_set_drvdata(dev, smbus); return 0; out_release_region: release_region(smbus->base, smbus->size); out_kfree: kfree(smbus); return error; } static void amd8111_remove(struct pci_dev *dev) { struct amd_smbus *smbus = pci_get_drvdata(dev); i2c_del_adapter(&smbus->adapter); release_region(smbus->base, smbus->size); kfree(smbus); } static struct pci_driver amd8111_driver = { .name = "amd8111_smbus2", .id_table = amd8111_ids, .probe = amd8111_probe, .remove = amd8111_remove, }; module_pci_driver(amd8111_driver); |