Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /dts-v1/; #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/leds/common.h> #include <dt-bindings/pinctrl/rockchip.h> #include "rk3566-soquartz.dtsi" / { model = "PINE64 RK3566 SOQuartz on Blade carrier board"; compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566"; /* labeled VCC3V0_SD in schematic to not conflict with PMIC regulator */ vcc3v0_sd: vcc3v0-sd-regulator { compatible = "regulator-fixed"; regulator-name = "vcc3v0_sd"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vcc3v3_sys>; }; /* labeled VCC_SSD in schematic */ vcc3v3_pcie_p: vcc3v3-pcie-regulator { compatible = "regulator-fixed"; regulator-name = "vcc3v3_pcie_p"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vbus>; }; vcc5v_dcin: vcc5v-dcin-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v_dcin"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; }; &combphy2 { phy-supply = <&vcc3v3_sys>; status = "okay"; }; &gmac1 { status = "okay"; }; /* * i2c1 is exposed on CM1 / Module1A * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu */ &i2c1 { status = "okay"; }; /* * i2c2 is exposed on CM1 / Module1A - to PI40 * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3 */ &i2c2 { status = "disabled"; }; /* * i2c3 is exposed on CM1 / Module1A - to PI40 * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3 * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3 */ &i2c3 { status = "disabled"; }; /* * i2c4 is exposed on CM2 / Module1B - to PI40 * pin 45 - GPIO24 - i2c4_scl_m1 * pin 47 - GPIO23 - i2c4_sda_m1 */ &i2c4 { status = "disabled"; }; /* * i2s1_8ch is exposed on CM1 / Module1A - to PI40 * pin 24 - GPIO26 - i2s1_sdi1_m1 * pin 25 - GPIO21 - i2s1_sdo0_m1 * pin 26 - GPIO19 - i2s1_lrck_tx_m1 * pin 27 - GPIO20 - i2s1_sdi0_m1 * pin 29 - GPIO16 - i2s1_sdi3_m1 * pin 30 - GPIO6 - i2s1_sdi2_m1 * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3 * pin 41 - GPIO25 - i2s1_sdo2_m1 * pin 49 - GPIO18 - i2s1_sclk_tx_m1 * pin 50 - GPIO17 - i2s1_mclk_m1 * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2 */ &i2s1_8ch { status = "disabled"; }; &led_diy { color = <LED_COLOR_ID_RED>; function = LED_FUNCTION_DISK_ACTIVITY; linux,default-trigger = "disk-activity"; status = "okay"; }; &led_work { color = <LED_COLOR_ID_GREEN>; function = LED_FUNCTION_STATUS; linux,default-trigger = "heartbeat"; status = "okay"; }; &pcie2x1 { vpcie3v3-supply = <&vcc3v3_pcie_p>; status = "okay"; }; &rgmii_phy1 { status = "okay"; }; /* * saradc is exposed on CM1 / Module1A - to J2 * pin 94 - AIN1 - saradc_vin3 * pin 96 - AIN0 - saradc_vin2 */ &saradc { status = "disabled"; }; &sdmmc0 { vmmc-supply = <&vcc3v0_sd>; status = "okay"; }; /* * spi3 is exposed on CM1 / Module1A - to PI40 * pin 37 - GPIO7 - spi3_cs1_m0 * pin 38 - GPIO11 - spi3_clk_m0 * pin 39 - GPIO8 - spi3_cs0_m0 * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch * pin 44 - GPIO10 - spi3_mosi_m0 */ &spi3 { status = "disabled"; }; /* * uart2 is exposed on CM1 / Module1A - to PI40 * pin 51 - GPIO15 - uart2_rx_m0 * pin 55 - GPIO14 - uart2_tx_m0 */ &uart2 { status = "okay"; }; /* * uart7 is exposed on CM1 / Module1A - to PI40 * pin 46 - GPIO22 - uart7_tx_m2 * pin 47 - GPIO23 - uart7_rx_m2 */ &uart7 { status = "okay"; }; &usb2phy0 { status = "okay"; }; &usb2phy0_otg { phy-supply = <&vbus>; status = "okay"; }; &usb_host0_xhci { status = "okay"; }; &vbus { vin-supply = <&vcc5v_dcin>; }; |