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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 | /* SPDX-License-Identifier: GPL-2.0-only */ /* * arch/arm/include/asm/glue-cache.h * * Copyright (C) 1999-2002 Russell King */ #ifndef ASM_GLUE_CACHE_H #define ASM_GLUE_CACHE_H #include <asm/glue.h> /* * Cache Model * =========== */ #undef _CACHE #undef MULTI_CACHE #if defined(CONFIG_CPU_CACHE_V4) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE v4 # endif #endif #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \ defined(CONFIG_CPU_ARM1026) # define MULTI_CACHE 1 #endif #if defined(CONFIG_CPU_FA526) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE fa # endif #endif #if defined(CONFIG_CPU_ARM926T) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE arm926 # endif #endif #if defined(CONFIG_CPU_ARM940T) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE arm940 # endif #endif #if defined(CONFIG_CPU_ARM946E) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE arm946 # endif #endif #if defined(CONFIG_CPU_CACHE_V4WB) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE v4wb # endif #endif #if defined(CONFIG_CPU_XSCALE) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE xscale # endif #endif #if defined(CONFIG_CPU_XSC3) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE xsc3 # endif #endif #if defined(CONFIG_CPU_MOHAWK) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE mohawk # endif #endif #if defined(CONFIG_CPU_FEROCEON) # define MULTI_CACHE 1 #endif #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE v6 # endif #endif #if defined(CONFIG_CPU_V7) # ifdef _CACHE # define MULTI_CACHE 1 # else # define _CACHE v7 # endif #endif #if defined(CONFIG_CACHE_B15_RAC) # define MULTI_CACHE 1 #endif #if defined(CONFIG_CPU_V7M) # define MULTI_CACHE 1 #endif #if !defined(_CACHE) && !defined(MULTI_CACHE) #error Unknown cache maintenance model #endif #ifndef __ASSEMBLER__ static inline void nop_flush_icache_all(void) { } static inline void nop_flush_kern_cache_all(void) { } static inline void nop_flush_kern_cache_louis(void) { } static inline void nop_flush_user_cache_all(void) { } static inline void nop_flush_user_cache_range(unsigned long a, unsigned long b, unsigned int c) { } static inline void nop_coherent_kern_range(unsigned long a, unsigned long b) { } static inline int nop_coherent_user_range(unsigned long a, unsigned long b) { return 0; } static inline void nop_flush_kern_dcache_area(void *a, size_t s) { } static inline void nop_dma_flush_range(const void *a, const void *b) { } static inline void nop_dma_map_area(const void *s, size_t l, int f) { } static inline void nop_dma_unmap_area(const void *s, size_t l, int f) { } #endif #ifndef MULTI_CACHE #define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all) #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all) #define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_louis) #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area) #define dmac_flush_range __glue(_CACHE,_dma_flush_range) #endif #endif |