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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 | // SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2020, Jiaxun Yang <jiaxun.yang@flygoat.com> * Loongson HTPIC IRQ support */ #include <linux/init.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/irqchip.h> #include <linux/irqchip/chained_irq.h> #include <linux/irq.h> #include <linux/io.h> #include <linux/syscore_ops.h> #include <asm/i8259.h> #define HTPIC_MAX_PARENT_IRQ 4 #define HTINT_NUM_VECTORS 8 #define HTINT_EN_OFF 0x20 struct loongson_htpic { void __iomem *base; struct irq_domain *domain; }; static struct loongson_htpic *htpic; static void htpic_irq_dispatch(struct irq_desc *desc) { struct loongson_htpic *priv = irq_desc_get_handler_data(desc); struct irq_chip *chip = irq_desc_get_chip(desc); uint32_t pending; chained_irq_enter(chip, desc); pending = readl(priv->base); /* Ack all IRQs at once, otherwise IRQ flood might happen */ writel(pending, priv->base); if (!pending) spurious_interrupt(); while (pending) { int bit = __ffs(pending); if (unlikely(bit > 15)) { spurious_interrupt(); break; } generic_handle_domain_irq(priv->domain, bit); pending &= ~BIT(bit); } chained_irq_exit(chip, desc); } static void htpic_reg_init(void) { int i; for (i = 0; i < HTINT_NUM_VECTORS; i++) { /* Disable all HT Vectors */ writel(0x0, htpic->base + HTINT_EN_OFF + i * 0x4); /* Read back to force write */ (void) readl(htpic->base + i * 0x4); /* Ack all possible pending IRQs */ writel(GENMASK(31, 0), htpic->base + i * 0x4); } /* Enable 16 vectors for PIC */ writel(0xffff, htpic->base + HTINT_EN_OFF); } static void htpic_resume(void) { htpic_reg_init(); } struct syscore_ops htpic_syscore_ops = { .resume = htpic_resume, }; static int __init htpic_of_init(struct device_node *node, struct device_node *parent) { unsigned int parent_irq[4]; int i, err; int num_parents = 0; if (htpic) { pr_err("loongson-htpic: Only one HTPIC is allowed in the system\n"); return -ENODEV; } htpic = kzalloc(sizeof(*htpic), GFP_KERNEL); if (!htpic) return -ENOMEM; htpic->base = of_iomap(node, 0); if (!htpic->base) { err = -ENODEV; goto out_free; } htpic->domain = __init_i8259_irqs(node); if (!htpic->domain) { pr_err("loongson-htpic: Failed to initialize i8259 IRQs\n"); err = -ENOMEM; goto out_iounmap; } /* Interrupt may come from any of the 4 interrupt line */ for (i = 0; i < HTPIC_MAX_PARENT_IRQ; i++) { parent_irq[i] = irq_of_parse_and_map(node, i); if (parent_irq[i] <= 0) break; num_parents++; } if (!num_parents) { pr_err("loongson-htpic: Failed to get parent irqs\n"); err = -ENODEV; goto out_remove_domain; } htpic_reg_init(); for (i = 0; i < num_parents; i++) { irq_set_chained_handler_and_data(parent_irq[i], htpic_irq_dispatch, htpic); } register_syscore_ops(&htpic_syscore_ops); return 0; out_remove_domain: irq_domain_remove(htpic->domain); out_iounmap: iounmap(htpic->base); out_free: kfree(htpic); return err; } IRQCHIP_DECLARE(loongson_htpic, "loongson,htpic-1.0", htpic_of_init); |