Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 | /* * Copyright 2014 Gateworks Corporation * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public * License along with this file; if not, write to the Free * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, * MA 02110-1301 USA * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/media/tda1997x.h> #include <dt-bindings/input/linux-event-codes.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/sound/fsl-imx-audmux.h> / { /* these are used by bootloader for disabling nodes */ aliases { led0 = &led0; nand = &gpmi; ssi0 = &ssi1; usb0 = &usbh1; usb1 = &usbotg; }; chosen { bootargs = "console=ttymxc1,115200"; }; gpio-keys { compatible = "gpio-keys"; user-pb { label = "user_pb"; gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; linux,code = <BTN_0>; }; user-pb1x { label = "user_pb1x"; linux,code = <BTN_1>; interrupt-parent = <&gsc>; interrupts = <0>; }; key-erased { label = "key-erased"; linux,code = <BTN_2>; interrupt-parent = <&gsc>; interrupts = <1>; }; eeprom-wp { label = "eeprom_wp"; linux,code = <BTN_3>; interrupt-parent = <&gsc>; interrupts = <2>; }; tamper { label = "tamper"; linux,code = <BTN_4>; interrupt-parent = <&gsc>; interrupts = <5>; }; switch-hold { label = "switch_hold"; linux,code = <BTN_5>; interrupt-parent = <&gsc>; interrupts = <7>; }; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; led0: led-user1 { label = "user1"; gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; default-state = "on"; linux,default-trigger = "heartbeat"; }; }; memory@10000000 { device_type = "memory"; reg = <0x10000000 0x20000000>; }; reg_5p0v: regulator-5p0v { compatible = "regulator-fixed"; regulator-name = "5P0V"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; reg_usb_h1_vbus: regulator-usb-h1-vbus { compatible = "regulator-fixed"; regulator-name = "usb_h1_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; reg_usb_otg_vbus: regulator-usb-otg-vbus { compatible = "regulator-fixed"; regulator-name = "usb_otg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; sound-digital { compatible = "simple-audio-card"; simple-audio-card,name = "tda1997x-audio"; simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&sound_codec>; simple-audio-card,frame-master = <&sound_codec>; sound_cpu: simple-audio-card,cpu { sound-dai = <&ssi1>; }; sound_codec: simple-audio-card,codec { sound-dai = <&hdmi_receiver>; }; }; }; &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */ status = "okay"; ssi1 { fsl,audmux-port = <0>; fsl,port-config = < (IMX_AUDMUX_V2_PTCR_TFSDIR | IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */ IMX_AUDMUX_V2_PTCR_TCLKDIR | IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */ IMX_AUDMUX_V2_PTCR_SYN) IMX_AUDMUX_V2_PDCR_RXDSEL(4) >; }; aud5 { fsl,audmux-port = <4>; fsl,port-config = < IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)>; }; }; &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan1>; status = "okay"; }; &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; status = "okay"; }; &hdmi { ddc-i2c-bus = <&i2c3>; status = "okay"; }; &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; gsc: gsc@20 { compatible = "gw,gsc"; reg = <0x20>; interrupt-parent = <&gpio1>; interrupts = <4 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; #size-cells = <0>; adc { compatible = "gw,gsc-adc"; #address-cells = <1>; #size-cells = <0>; channel@0 { gw,mode = <0>; reg = <0x00>; label = "temp"; }; channel@2 { gw,mode = <1>; reg = <0x02>; label = "vdd_vin"; }; channel@5 { gw,mode = <1>; reg = <0x05>; label = "vdd_3p3"; }; channel@8 { gw,mode = <1>; reg = <0x08>; label = "vdd_bat"; }; channel@b { gw,mode = <1>; reg = <0x0b>; label = "vdd_5p0"; }; channel@e { gw,mode = <1>; reg = <0xe>; label = "vdd_arm"; }; channel@11 { gw,mode = <1>; reg = <0x11>; label = "vdd_soc"; }; channel@14 { gw,mode = <1>; reg = <0x14>; label = "vdd_3p0"; }; channel@17 { gw,mode = <1>; reg = <0x17>; label = "vdd_1p5"; }; channel@1d { gw,mode = <1>; reg = <0x1d>; label = "vdd_1p8a"; }; channel@20 { gw,mode = <1>; reg = <0x20>; label = "vdd_1p0b"; }; }; }; gsc_gpio: gpio@23 { compatible = "nxp,pca9555"; reg = <0x23>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&gsc>; interrupts = <4>; }; eeprom1: eeprom@50 { compatible = "atmel,24c02"; reg = <0x50>; pagesize = <16>; }; eeprom2: eeprom@51 { compatible = "atmel,24c02"; reg = <0x51>; pagesize = <16>; }; eeprom3: eeprom@52 { compatible = "atmel,24c02"; reg = <0x52>; pagesize = <16>; }; eeprom4: eeprom@53 { compatible = "atmel,24c02"; reg = <0x53>; pagesize = <16>; }; rtc: ds1672@68 { compatible = "dallas,ds1672"; reg = <0x68>; }; }; &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; ltc3676: pmic@3c { compatible = "lltc,ltc3676"; reg = <0x3c>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio1>; interrupts = <8 IRQ_TYPE_EDGE_FALLING>; regulators { /* VDD_SOC (1+R1/R2 = 1.635) */ reg_vdd_soc: sw1 { regulator-name = "vddsoc"; regulator-min-microvolt = <674400>; regulator-max-microvolt = <1308000>; lltc,fb-voltage-divider = <127000 200000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_DDR (1+R1/R2 = 2.105) */ reg_vdd_ddr: sw2 { regulator-name = "vddddr"; regulator-min-microvolt = <868310>; regulator-max-microvolt = <1684000>; lltc,fb-voltage-divider = <221000 200000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_ARM (1+R1/R2 = 1.635) */ reg_vdd_arm: sw3 { regulator-name = "vddarm"; regulator-min-microvolt = <674400>; regulator-max-microvolt = <1308000>; lltc,fb-voltage-divider = <127000 200000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_3P3 (1+R1/R2 = 1.281) */ reg_3p3: sw4 { regulator-name = "vdd3p3"; regulator-min-microvolt = <1880000>; regulator-max-microvolt = <3647000>; lltc,fb-voltage-divider = <200000 56200>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */ reg_1p8a: ldo2 { regulator-name = "vdd1p8a"; regulator-min-microvolt = <1816125>; regulator-max-microvolt = <1816125>; lltc,fb-voltage-divider = <301000 200000>; regulator-boot-on; regulator-always-on; }; /* VDD_1P8b: HDMI In analog */ reg_1p8b: ldo3 { regulator-name = "vdd1p8b"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; }; /* VDD_HIGH (1+R1/R2 = 4.17) */ reg_3p0: ldo4 { regulator-name = "vdd3p0"; regulator-min-microvolt = <3023250>; regulator-max-microvolt = <3023250>; lltc,fb-voltage-divider = <634000 200000>; regulator-boot-on; regulator-always-on; }; }; }; }; &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; gpio_exp: pca9555@24 { compatible = "nxp,pca9555"; reg = <0x24>; gpio-controller; #gpio-cells = <2>; }; hdmi_receiver: hdmi-receiver@48 { compatible = "nxp,tda19971"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tda1997x>; reg = <0x48>; interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_LEVEL_LOW>; DOVDD-supply = <®_3p3>; AVDD-supply = <®_1p8b>; DVDD-supply = <®_1p8a>; #sound-dai-cells = <0>; nxp,audout-format = "i2s"; nxp,audout-layout = <0>; nxp,audout-width = <16>; nxp,audout-mclk-fs = <128>; /* * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] * and Y[11:4] across 16bits in the same cycle * which we map to VP[15:08]<->CSI_DATA[19:12] */ nxp,vidout-portcfg = /*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/ < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, /*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/ < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, /*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/ < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, /*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/ < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; port { tda1997x_to_ipu1_csi0_mux: endpoint { remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; bus-width = <16>; hsync-active = <1>; vsync-active = <1>; data-active = <1>; }; }; }; }; &ipu1_csi0_from_ipu1_csi0_mux { bus-width = <16>; }; &ipu1_csi0_mux_from_parallel_sensor { remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>; bus-width = <16>; }; &ipu1_csi0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_csi0>; }; &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; status = "okay"; }; &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ status = "disabled"; }; &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ status = "disabled"; }; &ssi1 { status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; status = "okay"; }; &usbotg { vbus-supply = <®_usb_otg_vbus>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; disable-over-current; status = "okay"; }; &usbh1 { vbus-supply = <®_usb_h1_vbus>; status = "okay"; }; &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; fsl,ext-reset-output; }; &iomuxc { pinctrl_audmux: audmuxgrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 MX6QDL_PAD_DISP0_DAT14__AUD5_RXC 0x130b0 MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS 0x130b0 >; }; pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */ >; }; pinctrl_gpio_leds: gpioledsgrp { fsl,pins = < MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 >; }; pinctrl_gpmi_nand: gpminandgrp { fsl,pins = < MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 >; }; pinctrl_ipu1_csi0: ipu1_csi0grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x1b0b0 MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x1b0b0 MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x1b0b0 MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x1b0b0 MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0 MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0 MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0 MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 >; }; pinctrl_pcie: pciegrp { fsl,pins = < MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */ >; }; pinctrl_pmic: pmicgrp { fsl,pins = < MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ >; }; pinctrl_pwm2: pwm2grp { fsl,pins = < MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 >; }; pinctrl_pwm3: pwm3grp { fsl,pins = < MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 >; }; pinctrl_tda1997x: tda1997xgrp { fsl,pins = < MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 >; }; pinctrl_uart3: uart3grp { fsl,pins = < MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 >; }; pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 >; }; pinctrl_wdog: wdoggrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 >; }; }; |