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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 | Broadcom Kona Family Clocks This binding is associated with Broadcom SoCs having "Kona" style clock control units (CCUs). A CCU is a clock provider that manages a set of clock signals. Each CCU is represented by a node in the device tree. This binding uses the common clock binding: Documentation/devicetree/bindings/clock/clock-bindings.txt Required properties: - compatible Shall have a value of the form "brcm,<model>-<which>-ccu", where <model> is a Broadcom SoC model number and <which> is the name of a defined CCU. For example: "brcm,bcm11351-root-ccu" The compatible strings used for each supported SoC family are defined below. - reg Shall define the base and range of the address space containing clock control registers - #clock-cells Shall have value <1>. The permitted clock-specifier values are defined below. - clock-output-names Shall be an ordered list of strings defining the names of the clocks provided by the CCU. Device tree example: slave_ccu: slave_ccu { compatible = "brcm,bcm11351-slave-ccu"; reg = <0x3e011000 0x0f00>; #clock-cells = <1>; clock-output-names = "uartb", "uartb2", "uartb3", "uartb4"; }; ref_crystal_clk: ref_crystal { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <26000000>; }; uart@3e002000 { compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; reg = <0x3e002000 0x1000>; clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; }; BCM281XX family --------------- CCU compatible string values for SoCs in the BCM281XX family are: "brcm,bcm11351-root-ccu" "brcm,bcm11351-aon-ccu" "brcm,bcm11351-hub-ccu" "brcm,bcm11351-master-ccu" "brcm,bcm11351-slave-ccu" The following table defines the set of CCUs and clock specifiers for BCM281XX family clocks. When a clock consumer references a clocks, its symbolic specifier (rather than its numeric index value) should be used. These specifiers are defined in: "include/dt-bindings/clock/bcm281xx.h" CCU Clock Type Index Specifier --- ----- ---- ----- --------- root frac_1m peri 0 BCM281XX_ROOT_CCU_FRAC_1M aon hub_timer peri 0 BCM281XX_AON_CCU_HUB_TIMER aon pmu_bsc peri 1 BCM281XX_AON_CCU_PMU_BSC aon pmu_bsc_var peri 2 BCM281XX_AON_CCU_PMU_BSC_VAR hub tmon_1m peri 0 BCM281XX_HUB_CCU_TMON_1M master sdio1 peri 0 BCM281XX_MASTER_CCU_SDIO1 master sdio2 peri 1 BCM281XX_MASTER_CCU_SDIO2 master sdio3 peri 2 BCM281XX_MASTER_CCU_SDIO3 master sdio4 peri 3 BCM281XX_MASTER_CCU_SDIO4 master dmac peri 4 BCM281XX_MASTER_CCU_DMAC master usb_ic peri 5 BCM281XX_MASTER_CCU_USB_IC master hsic2_48m peri 6 BCM281XX_MASTER_CCU_HSIC_48M master hsic2_12m peri 7 BCM281XX_MASTER_CCU_HSIC_12M slave uartb peri 0 BCM281XX_SLAVE_CCU_UARTB slave uartb2 peri 1 BCM281XX_SLAVE_CCU_UARTB2 slave uartb3 peri 2 BCM281XX_SLAVE_CCU_UARTB3 slave uartb4 peri 3 BCM281XX_SLAVE_CCU_UARTB4 slave ssp0 peri 4 BCM281XX_SLAVE_CCU_SSP0 slave ssp2 peri 5 BCM281XX_SLAVE_CCU_SSP2 slave bsc1 peri 6 BCM281XX_SLAVE_CCU_BSC1 slave bsc2 peri 7 BCM281XX_SLAVE_CCU_BSC2 slave bsc3 peri 8 BCM281XX_SLAVE_CCU_BSC3 slave pwm peri 9 BCM281XX_SLAVE_CCU_PWM BCM21664 family --------------- CCU compatible string values for SoCs in the BCM21664 family are: "brcm,bcm21664-root-ccu" "brcm,bcm21664-aon-ccu" "brcm,bcm21664-master-ccu" "brcm,bcm21664-slave-ccu" The following table defines the set of CCUs and clock specifiers for BCM21664 family clocks. When a clock consumer references a clocks, its symbolic specifier (rather than its numeric index value) should be used. These specifiers are defined in: "include/dt-bindings/clock/bcm21664.h" CCU Clock Type Index Specifier --- ----- ---- ----- --------- root frac_1m peri 0 BCM21664_ROOT_CCU_FRAC_1M aon hub_timer peri 0 BCM21664_AON_CCU_HUB_TIMER master sdio1 peri 0 BCM21664_MASTER_CCU_SDIO1 master sdio2 peri 1 BCM21664_MASTER_CCU_SDIO2 master sdio3 peri 2 BCM21664_MASTER_CCU_SDIO3 master sdio4 peri 3 BCM21664_MASTER_CCU_SDIO4 master sdio1_sleep peri 4 BCM21664_MASTER_CCU_SDIO1_SLEEP master sdio2_sleep peri 5 BCM21664_MASTER_CCU_SDIO2_SLEEP master sdio3_sleep peri 6 BCM21664_MASTER_CCU_SDIO3_SLEEP master sdio4_sleep peri 7 BCM21664_MASTER_CCU_SDIO4_SLEEP slave uartb peri 0 BCM21664_SLAVE_CCU_UARTB slave uartb2 peri 1 BCM21664_SLAVE_CCU_UARTB2 slave uartb3 peri 2 BCM21664_SLAVE_CCU_UARTB3 slave uartb4 peri 3 BCM21664_SLAVE_CCU_UARTB4 slave bsc1 peri 4 BCM21664_SLAVE_CCU_BSC1 slave bsc2 peri 5 BCM21664_SLAVE_CCU_BSC2 slave bsc3 peri 6 BCM21664_SLAVE_CCU_BSC3 slave bsc4 peri 7 BCM21664_SLAVE_CCU_BSC4 |