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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 | // SPDX-License-Identifier: GPL-2.0-only /* * tools/testing/selftests/kvm/lib/x86_64/svm.c * Helpers used for nested SVM testing * Largely inspired from KVM unit test svm.c * * Copyright (C) 2020, Red Hat, Inc. */ #include "test_util.h" #include "kvm_util.h" #include "processor.h" #include "svm_util.h" #define SEV_DEV_PATH "/dev/sev" struct gpr64_regs guest_regs; u64 rflags; /* Allocate memory regions for nested SVM tests. * * Input Args: * vm - The VM to allocate guest-virtual addresses in. * * Output Args: * p_svm_gva - The guest virtual address for the struct svm_test_data. * * Return: * Pointer to structure with the addresses of the SVM areas. */ struct svm_test_data * vcpu_alloc_svm(struct kvm_vm *vm, vm_vaddr_t *p_svm_gva) { vm_vaddr_t svm_gva = vm_vaddr_alloc_page(vm); struct svm_test_data *svm = addr_gva2hva(vm, svm_gva); svm->vmcb = (void *)vm_vaddr_alloc_page(vm); svm->vmcb_hva = addr_gva2hva(vm, (uintptr_t)svm->vmcb); svm->vmcb_gpa = addr_gva2gpa(vm, (uintptr_t)svm->vmcb); svm->save_area = (void *)vm_vaddr_alloc_page(vm); svm->save_area_hva = addr_gva2hva(vm, (uintptr_t)svm->save_area); svm->save_area_gpa = addr_gva2gpa(vm, (uintptr_t)svm->save_area); svm->msr = (void *)vm_vaddr_alloc_page(vm); svm->msr_hva = addr_gva2hva(vm, (uintptr_t)svm->msr); svm->msr_gpa = addr_gva2gpa(vm, (uintptr_t)svm->msr); memset(svm->msr_hva, 0, getpagesize()); *p_svm_gva = svm_gva; return svm; } static void vmcb_set_seg(struct vmcb_seg *seg, u16 selector, u64 base, u32 limit, u32 attr) { seg->selector = selector; seg->attrib = attr; seg->limit = limit; seg->base = base; } void generic_svm_setup(struct svm_test_data *svm, void *guest_rip, void *guest_rsp) { struct vmcb *vmcb = svm->vmcb; uint64_t vmcb_gpa = svm->vmcb_gpa; struct vmcb_save_area *save = &vmcb->save; struct vmcb_control_area *ctrl = &vmcb->control; u32 data_seg_attr = 3 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK | SVM_SELECTOR_DB_MASK | SVM_SELECTOR_G_MASK; u32 code_seg_attr = 9 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK | SVM_SELECTOR_L_MASK | SVM_SELECTOR_G_MASK; uint64_t efer; efer = rdmsr(MSR_EFER); wrmsr(MSR_EFER, efer | EFER_SVME); wrmsr(MSR_VM_HSAVE_PA, svm->save_area_gpa); memset(vmcb, 0, sizeof(*vmcb)); asm volatile ("vmsave %0\n\t" : : "a" (vmcb_gpa) : "memory"); vmcb_set_seg(&save->es, get_es(), 0, -1U, data_seg_attr); vmcb_set_seg(&save->cs, get_cs(), 0, -1U, code_seg_attr); vmcb_set_seg(&save->ss, get_ss(), 0, -1U, data_seg_attr); vmcb_set_seg(&save->ds, get_ds(), 0, -1U, data_seg_attr); vmcb_set_seg(&save->gdtr, 0, get_gdt().address, get_gdt().size, 0); vmcb_set_seg(&save->idtr, 0, get_idt().address, get_idt().size, 0); ctrl->asid = 1; save->cpl = 0; save->efer = rdmsr(MSR_EFER); asm volatile ("mov %%cr4, %0" : "=r"(save->cr4) : : "memory"); asm volatile ("mov %%cr3, %0" : "=r"(save->cr3) : : "memory"); asm volatile ("mov %%cr0, %0" : "=r"(save->cr0) : : "memory"); asm volatile ("mov %%dr7, %0" : "=r"(save->dr7) : : "memory"); asm volatile ("mov %%dr6, %0" : "=r"(save->dr6) : : "memory"); asm volatile ("mov %%cr2, %0" : "=r"(save->cr2) : : "memory"); save->g_pat = rdmsr(MSR_IA32_CR_PAT); save->dbgctl = rdmsr(MSR_IA32_DEBUGCTLMSR); ctrl->intercept = (1ULL << INTERCEPT_VMRUN) | (1ULL << INTERCEPT_VMMCALL); ctrl->msrpm_base_pa = svm->msr_gpa; vmcb->save.rip = (u64)guest_rip; vmcb->save.rsp = (u64)guest_rsp; guest_regs.rdi = (u64)svm; } /* * save/restore 64-bit general registers except rax, rip, rsp * which are directly handed through the VMCB guest processor state */ #define SAVE_GPR_C \ "xchg %%rbx, guest_regs+0x20\n\t" \ "xchg %%rcx, guest_regs+0x10\n\t" \ "xchg %%rdx, guest_regs+0x18\n\t" \ "xchg %%rbp, guest_regs+0x30\n\t" \ "xchg %%rsi, guest_regs+0x38\n\t" \ "xchg %%rdi, guest_regs+0x40\n\t" \ "xchg %%r8, guest_regs+0x48\n\t" \ "xchg %%r9, guest_regs+0x50\n\t" \ "xchg %%r10, guest_regs+0x58\n\t" \ "xchg %%r11, guest_regs+0x60\n\t" \ "xchg %%r12, guest_regs+0x68\n\t" \ "xchg %%r13, guest_regs+0x70\n\t" \ "xchg %%r14, guest_regs+0x78\n\t" \ "xchg %%r15, guest_regs+0x80\n\t" #define LOAD_GPR_C SAVE_GPR_C /* * selftests do not use interrupts so we dropped clgi/sti/cli/stgi * for now. registers involved in LOAD/SAVE_GPR_C are eventually * unmodified so they do not need to be in the clobber list. */ void run_guest(struct vmcb *vmcb, uint64_t vmcb_gpa) { asm volatile ( "vmload %[vmcb_gpa]\n\t" "mov rflags, %%r15\n\t" // rflags "mov %%r15, 0x170(%[vmcb])\n\t" "mov guest_regs, %%r15\n\t" // rax "mov %%r15, 0x1f8(%[vmcb])\n\t" LOAD_GPR_C "vmrun %[vmcb_gpa]\n\t" SAVE_GPR_C "mov 0x170(%[vmcb]), %%r15\n\t" // rflags "mov %%r15, rflags\n\t" "mov 0x1f8(%[vmcb]), %%r15\n\t" // rax "mov %%r15, guest_regs\n\t" "vmsave %[vmcb_gpa]\n\t" : : [vmcb] "r" (vmcb), [vmcb_gpa] "a" (vmcb_gpa) : "r15", "memory"); } /* * Open SEV_DEV_PATH if available, otherwise exit the entire program. * * Return: * The opened file descriptor of /dev/sev. */ int open_sev_dev_path_or_exit(void) { return open_path_or_exit(SEV_DEV_PATH, 0); } |