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// SPDX-License-Identifier: GPL-2.0 /* * Copyright 2020, Compass Electronics Group, LLC */ /dts-v1/; #include "r8a774a1.dtsi" #include "beacon-renesom-som.dtsi" #include "beacon-renesom-baseboard.dtsi" / { model = "Beacon EmbeddedWorks RZ/G2M Development Kit"; compatible = "beacon,beacon-rzg2m", "renesas,r8a774a1"; aliases { i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; i2c6 = &i2c6; i2c7 = &iic_pmic; serial0 = &scif2; serial1 = &hscif0; serial2 = &hscif1; serial3 = &scif0; serial4 = &hscif2; serial5 = &scif5; ethernet0 = &avb; mmc0 = &sdhi3; mmc1 = &sdhi0; mmc2 = &sdhi2; }; chosen { stdout-path = "serial0:115200n8"; }; memory@600000000 { device_type = "memory"; reg = <0x6 0x00000000 0x0 0x80000000>; }; }; &du { pinctrl-0 = <&du_pins>; pinctrl-names = "default"; status = "okay"; clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>, <&versaclock5 1>, <&x302_clk>, <&versaclock5 2>; clock-names = "du.0", "du.1", "du.2", "dclkin.0", "dclkin.1", "dclkin.2"; }; /* Reference versaclock instead of audio_clk_a */ &rcar_sound { clocks = <&cpg CPG_MOD 1005>, <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, <&versaclock6_bb 4>, <&audio_clk_b>, <&audio_clk_c>, <&cpg CPG_CORE R8A774A1_CLK_S0D4>; }; |