Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 | // SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2015 Andrea Merello <adnrea.merello@gmail.com> * Copyright (C) 2017 Alexander Graf <agraf@suse.de> * * Based on zynq-zed.dts which is: * Copyright (C) 2011 - 2014 Xilinx * Copyright (C) 2012 National Instruments Corp. * */ /dts-v1/; /include/ "zynq-7000.dtsi" / { compatible = "xlnx,zynq-7000"; aliases { ethernet0 = &gem0; serial0 = &uart1; serial1 = &uart0; mmc0 = &sdhci0; }; memory@0 { device_type = "memory"; reg = <0x0 0x40000000>; }; chosen { stdout-path = "serial0:115200n8"; }; gpio-leds { compatible = "gpio-leds"; usr-led1 { label = "usr-led1"; gpios = <&gpio0 0x0 0x1>; default-state = "off"; }; usr-led2 { label = "usr-led2"; gpios = <&gpio0 0x9 0x1>; default-state = "off"; }; }; gpio-keys { compatible = "gpio-keys"; autorepeat; key { label = "K1"; gpios = <&gpio0 0x32 0x1>; linux,code = <0x66>; wakeup-source; autorepeat; }; }; }; &clkc { ps-clk-frequency = <33333333>; }; &gem0 { status = "okay"; phy-mode = "rgmii-id"; phy-handle = <ðernet_phy>; ethernet_phy: ethernet-phy@0 { }; }; &sdhci0 { status = "okay"; }; &uart0 { status = "okay"; }; &uart1 { status = "okay"; }; &usb0 { status = "okay"; dr_mode = "host"; }; &can0 { status = "okay"; }; &i2c0 { status = "okay"; clock-frequency = <400000>; stlm75@49 { status = "okay"; compatible = "lm75"; reg = <0x49>; }; accelerometer@53 { compatible = "adi,adxl345"; reg = <0x53>; interrupt-parent = <&intc>; interrupts = <0x0 0x1e 0x4>; }; }; |