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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 | [ { "BriefDescription": "ES segment renames", "EventCode": "0xD5", "EventName": "ES_REG_RENAMES", "SampleAfterValue": "2000000", "UMask": "0x1" }, { "BriefDescription": "I/O transactions", "EventCode": "0x6C", "EventName": "IO_TRANSACTIONS", "SampleAfterValue": "2000000", "UMask": "0x1" }, { "BriefDescription": "L1I instruction fetch stall cycles", "EventCode": "0x80", "EventName": "L1I.CYCLES_STALLED", "SampleAfterValue": "2000000", "UMask": "0x4" }, { "BriefDescription": "L1I instruction fetch hits", "EventCode": "0x80", "EventName": "L1I.HITS", "SampleAfterValue": "2000000", "UMask": "0x1" }, { "BriefDescription": "L1I instruction fetch misses", "EventCode": "0x80", "EventName": "L1I.MISSES", "SampleAfterValue": "2000000", "UMask": "0x2" }, { "BriefDescription": "L1I Instruction fetches", "EventCode": "0x80", "EventName": "L1I.READS", "SampleAfterValue": "2000000", "UMask": "0x3" }, { "BriefDescription": "Large ITLB hit", "EventCode": "0x82", "EventName": "LARGE_ITLB.HIT", "SampleAfterValue": "200000", "UMask": "0x1" }, { "BriefDescription": "All loads dispatched", "EventCode": "0x13", "EventName": "LOAD_DISPATCH.ANY", "SampleAfterValue": "2000000", "UMask": "0x7" }, { "BriefDescription": "Loads dispatched from the MOB", "EventCode": "0x13", "EventName": "LOAD_DISPATCH.MOB", "SampleAfterValue": "2000000", "UMask": "0x4" }, { "BriefDescription": "Loads dispatched that bypass the MOB", "EventCode": "0x13", "EventName": "LOAD_DISPATCH.RS", "SampleAfterValue": "2000000", "UMask": "0x1" }, { "BriefDescription": "Loads dispatched from stage 305", "EventCode": "0x13", "EventName": "LOAD_DISPATCH.RS_DELAYED", "SampleAfterValue": "2000000", "UMask": "0x2" }, { "BriefDescription": "False dependencies due to partial address aliasing", "EventCode": "0x7", "EventName": "PARTIAL_ADDRESS_ALIAS", "SampleAfterValue": "200000", "UMask": "0x1" }, { "BriefDescription": "All Store buffer stall cycles", "EventCode": "0x4", "EventName": "SB_DRAIN.ANY", "SampleAfterValue": "200000", "UMask": "0x7" }, { "BriefDescription": "Segment rename stall cycles", "EventCode": "0xD4", "EventName": "SEG_RENAME_STALLS", "SampleAfterValue": "2000000", "UMask": "0x1" }, { "BriefDescription": "Thread responded HIT to snoop", "EventCode": "0xB8", "EventName": "SNOOP_RESPONSE.HIT", "SampleAfterValue": "100000", "UMask": "0x1" }, { "BriefDescription": "Thread responded HITE to snoop", "EventCode": "0xB8", "EventName": "SNOOP_RESPONSE.HITE", "SampleAfterValue": "100000", "UMask": "0x2" }, { "BriefDescription": "Thread responded HITM to snoop", "EventCode": "0xB8", "EventName": "SNOOP_RESPONSE.HITM", "SampleAfterValue": "100000", "UMask": "0x4" }, { "BriefDescription": "Super Queue full stall cycles", "EventCode": "0xF6", "EventName": "SQ_FULL_STALL_CYCLES", "SampleAfterValue": "2000000", "UMask": "0x1" } ] |