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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2018 Amlogic, Inc. All rights reserved. */ #include "meson-g12.dtsi" / { compatible = "amlogic,g12a"; cpus { #address-cells = <0x2>; #size-cells = <0x0>; cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&l2>; #cooling-cells = <2>; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x1>; enable-method = "psci"; next-level-cache = <&l2>; #cooling-cells = <2>; }; cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x2>; enable-method = "psci"; next-level-cache = <&l2>; #cooling-cells = <2>; }; cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x3>; enable-method = "psci"; next-level-cache = <&l2>; #cooling-cells = <2>; }; l2: l2-cache0 { compatible = "cache"; cache-level = <2>; }; }; cpu_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared; opp-100000000 { opp-hz = /bits/ 64 <100000000>; opp-microvolt = <731000>; }; opp-250000000 { opp-hz = /bits/ 64 <250000000>; opp-microvolt = <731000>; }; opp-500000000 { opp-hz = /bits/ 64 <500000000>; opp-microvolt = <731000>; }; opp-667000000 { opp-hz = /bits/ 64 <666666666>; opp-microvolt = <731000>; }; opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <731000>; }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <731000>; }; opp-1398000000 { opp-hz = /bits/ 64 <1398000000>; opp-microvolt = <761000>; }; opp-1512000000 { opp-hz = /bits/ 64 <1512000000>; opp-microvolt = <791000>; }; opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <831000>; }; opp-1704000000 { opp-hz = /bits/ 64 <1704000000>; opp-microvolt = <861000>; }; opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <981000>; }; }; }; &cpu_thermal { cooling-maps { map0 { trip = <&cpu_passive>; cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu_hot>; cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; &pmu { compatible = "amlogic,g12a-ddr-pmu"; }; |