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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright 2021 NXP * Copyright 2023 Variscite Ltd. */ /dts-v1/; #include <dt-bindings/leds/common.h> #include "imx93-var-som.dtsi" /{ model = "Variscite VAR-SOM-MX93 on Symphony evaluation board"; compatible = "variscite,var-som-mx93-symphony", "variscite,var-som-mx93", "fsl,imx93"; aliases { ethernet0 = &eqos; ethernet1 = &fec; }; chosen { stdout-path = &lpuart1; }; /* * Needed only for Symphony <= v1.5 */ reg_fec_phy: regulator-fec-phy { compatible = "regulator-fixed"; regulator-name = "fec-phy"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-enable-ramp-delay = <20000>; gpio = <&pca9534 7 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-always-on; }; reg_usdhc2_vmmc: regulator-usdhc2 { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; regulator-name = "VSD_3V3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>; off-on-delay-us = <20000>; enable-active-high; }; reg_vref_1v8: regulator-adc-vref { compatible = "regulator-fixed"; regulator-name = "vref_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; ethosu_mem: ethosu-region@88000000 { compatible = "shared-dma-pool"; reusable; reg = <0x0 0x88000000 0x0 0x8000000>; }; vdev0vring0: vdev0vring0@87ee0000 { reg = <0 0x87ee0000 0 0x8000>; no-map; }; vdev0vring1: vdev0vring1@87ee8000 { reg = <0 0x87ee8000 0 0x8000>; no-map; }; vdev1vring0: vdev1vring0@87ef0000 { reg = <0 0x87ef0000 0 0x8000>; no-map; }; vdev1vring1: vdev1vring1@87ef8000 { reg = <0 0x87ef8000 0 0x8000>; no-map; }; rsc_table: rsc-table@2021f000 { reg = <0 0x2021f000 0 0x1000>; no-map; }; vdevbuffer: vdevbuffer@87f00000 { compatible = "shared-dma-pool"; reg = <0 0x87f00000 0 0x100000>; no-map; }; ele_reserved: ele-reserved@87de0000 { compatible = "shared-dma-pool"; reg = <0 0x87de0000 0 0x100000>; no-map; }; }; gpio-keys { compatible = "gpio-keys"; key-back { label = "Back"; gpios = <&pca9534 1 GPIO_ACTIVE_LOW>; linux,code = <KEY_BACK>; }; key-home { label = "Home"; gpios = <&pca9534 2 GPIO_ACTIVE_LOW>; linux,code = <KEY_HOME>; }; key-menu { label = "Menu"; gpios = <&pca9534 3 GPIO_ACTIVE_LOW>; linux,code = <KEY_MENU>; }; }; leds { compatible = "gpio-leds"; led-0 { function = LED_FUNCTION_STATUS; color = <LED_COLOR_ID_GREEN>; gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; }; /* Use external instead of internal RTC*/ &bbnsm_rtc { status = "disabled"; }; &eqos { mdio { ethphy1: ethernet-phy@5 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <5>; qca,disable-smarteee; eee-broken-1000t; reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; reset-deassert-us = <20000>; vddio-supply = <&vddio1>; vddio1: vddio-regulator { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; }; }; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "rgmii"; phy-handle = <ðphy1>; phy-supply = <®_fec_phy>; status = "okay"; }; &flexcan1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan1>; status = "okay"; }; &lpi2c1 { clock-frequency = <400000>; pinctrl-names = "default", "sleep", "gpio"; pinctrl-0 = <&pinctrl_lpi2c1>; pinctrl-1 = <&pinctrl_lpi2c1_gpio>; pinctrl-2 = <&pinctrl_lpi2c1_gpio>; scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; status = "okay"; /* DS1337 RTC module */ rtc@68 { compatible = "dallas,ds1337"; reg = <0x68>; }; }; &lpi2c5 { clock-frequency = <400000>; pinctrl-names = "default", "sleep", "gpio"; pinctrl-0 = <&pinctrl_lpi2c5>; pinctrl-1 = <&pinctrl_lpi2c5_gpio>; pinctrl-2 = <&pinctrl_lpi2c5_gpio>; scl-gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; status = "okay"; pca9534: gpio@20 { compatible = "nxp,pca9534"; reg = <0x20>; gpio-controller; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pca9534>; interrupt-parent = <&gpio3>; interrupts = <26 IRQ_TYPE_EDGE_FALLING>; #gpio-cells = <2>; wakeup-source; }; }; /* Console */ &lpuart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; /* J18.7, J18.9 */ &lpuart6 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart6>; status = "okay"; }; /* SD */ &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; bus-width = <4>; status = "okay"; no-sdio; no-mmc; }; /* Watchdog */ &wdog3 { status = "okay"; }; &iomuxc { pinctrl_fec: fecgrp { fsl,pins = < MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e >; }; pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX93_PAD_PDM_CLK__CAN1_TX 0x139e MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e >; }; pinctrl_lpi2c1: lpi2c1grp { fsl,pins = < MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e >; }; pinctrl_lpi2c1_gpio: lpi2c1gpiogrp { fsl,pins = < MX93_PAD_I2C1_SCL__GPIO1_IO00 0x31e MX93_PAD_I2C1_SDA__GPIO1_IO01 0x31e >; }; pinctrl_lpi2c5: lpi2c5grp { fsl,pins = < MX93_PAD_GPIO_IO23__LPI2C5_SCL 0x40000b9e MX93_PAD_GPIO_IO22__LPI2C5_SDA 0x40000b9e >; }; pinctrl_lpi2c5_gpio: lpi2c5gpiogrp { fsl,pins = < MX93_PAD_GPIO_IO23__GPIO2_IO23 0x31e MX93_PAD_GPIO_IO22__GPIO2_IO22 0x31e >; }; pinctrl_pca9534: pca9534grp { fsl,pins = < MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x31e >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX93_PAD_UART1_RXD__LPUART1_RX 0x31e MX93_PAD_UART1_TXD__LPUART1_TX 0x31e >; }; pinctrl_uart6: uart6grp { fsl,pins = < MX93_PAD_GPIO_IO05__LPUART6_RX 0x31e MX93_PAD_GPIO_IO04__LPUART6_TX 0x31e >; }; pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins = < MX93_PAD_GPIO_IO18__GPIO2_IO18 0x31e >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e >; }; pinctrl_usdhc2_gpio: usdhc2gpiogrp { fsl,pins = < MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e >; }; }; |