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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 | // SPDX-License-Identifier: GPL-2.0 /* * PCIe Native PME support * * Copyright (C) 2007 - 2009 Intel Corp * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com> * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc. */ #define dev_fmt(fmt) "PME: " fmt #include <linux/bitfield.h> #include <linux/pci.h> #include <linux/kernel.h> #include <linux/errno.h> #include <linux/slab.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/device.h> #include <linux/pm_runtime.h> #include "../pci.h" #include "portdrv.h" /* * If this switch is set, MSI will not be used for PCIe PME signaling. This * causes the PCIe port driver to use INTx interrupts only, but it turns out * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based * wake-up from system sleep states. */ bool pcie_pme_msi_disabled; static int __init pcie_pme_setup(char *str) { if (!strncmp(str, "nomsi", 5)) pcie_pme_msi_disabled = true; return 1; } __setup("pcie_pme=", pcie_pme_setup); struct pcie_pme_service_data { spinlock_t lock; struct pcie_device *srv; struct work_struct work; bool noirq; /* If set, keep the PME interrupt disabled. */ }; /** * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation. * @dev: PCIe root port or event collector. * @enable: Enable or disable the interrupt. */ void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable) { if (enable) pcie_capability_set_word(dev, PCI_EXP_RTCTL, PCI_EXP_RTCTL_PMEIE); else pcie_capability_clear_word(dev, PCI_EXP_RTCTL, PCI_EXP_RTCTL_PMEIE); } /** * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#. * @bus: PCI bus to scan. * * Scan given PCI bus and all buses under it for devices asserting PME#. */ static bool pcie_pme_walk_bus(struct pci_bus *bus) { struct pci_dev *dev; bool ret = false; list_for_each_entry(dev, &bus->devices, bus_list) { /* Skip PCIe devices in case we started from a root port. */ if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) { if (dev->pme_poll) dev->pme_poll = false; pci_wakeup_event(dev); pm_request_resume(&dev->dev); ret = true; } if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate)) ret = true; } return ret; } /** * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME. * @bus: Secondary bus of the bridge. * @devfn: Device/function number to check. * * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band * PCIe PME message. In such that case the bridge should use the Requester ID * of device/function number 0 on its secondary bus. */ static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn) { struct pci_dev *dev; bool found = false; if (devfn) return false; dev = pci_dev_get(bus->self); if (!dev) return false; if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) { down_read(&pci_bus_sem); if (pcie_pme_walk_bus(bus)) found = true; up_read(&pci_bus_sem); } pci_dev_put(dev); return found; } /** * pcie_pme_handle_request - Find device that generated PME and handle it. * @port: Root port or event collector that generated the PME interrupt. * @req_id: PCIe Requester ID of the device that generated the PME. */ static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id) { u8 busnr = req_id >> 8, devfn = req_id & 0xff; struct pci_bus *bus; struct pci_dev *dev; bool found = false; /* First, check if the PME is from the root port itself. */ if (port->devfn == devfn && port->bus->number == busnr) { if (port->pme_poll) port->pme_poll = false; if (pci_check_pme_status(port)) { pm_request_resume(&port->dev); found = true; } else { /* * Apparently, the root port generated the PME on behalf * of a non-PCIe device downstream. If this is done by * a root port, the Requester ID field in its status * register may contain either the root port's, or the * source device's information (PCI Express Base * Specification, Rev. 2.0, Section 6.1.9). */ down_read(&pci_bus_sem); found = pcie_pme_walk_bus(port->subordinate); up_read(&pci_bus_sem); } goto out; } /* Second, find the bus the source device is on. */ bus = pci_find_bus(pci_domain_nr(port->bus), busnr); if (!bus) goto out; /* Next, check if the PME is from a PCIe-PCI bridge. */ found = pcie_pme_from_pci_bridge(bus, devfn); if (found) goto out; /* Finally, try to find the PME source on the bus. */ down_read(&pci_bus_sem); list_for_each_entry(dev, &bus->devices, bus_list) { pci_dev_get(dev); if (dev->devfn == devfn) { found = true; break; } pci_dev_put(dev); } up_read(&pci_bus_sem); if (found) { /* The device is there, but we have to check its PME status. */ found = pci_check_pme_status(dev); if (found) { if (dev->pme_poll) dev->pme_poll = false; pci_wakeup_event(dev); pm_request_resume(&dev->dev); } pci_dev_put(dev); } else if (devfn) { /* * The device is not there, but we can still try to recover by * assuming that the PME was reported by a PCIe-PCI bridge that * used devfn different from zero. */ pci_info(port, "interrupt generated for non-existent device %02x:%02x.%d\n", busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); found = pcie_pme_from_pci_bridge(bus, 0); } out: if (!found) pci_info(port, "Spurious native interrupt!\n"); } /** * pcie_pme_work_fn - Work handler for PCIe PME interrupt. * @work: Work structure giving access to service data. */ static void pcie_pme_work_fn(struct work_struct *work) { struct pcie_pme_service_data *data = container_of(work, struct pcie_pme_service_data, work); struct pci_dev *port = data->srv->port; u32 rtsta; spin_lock_irq(&data->lock); for (;;) { if (data->noirq) break; pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta); if (PCI_POSSIBLE_ERROR(rtsta)) break; if (rtsta & PCI_EXP_RTSTA_PME) { /* * Clear PME status of the port. If there are other * pending PMEs, the status will be set again. */ pcie_clear_root_pme_status(port); spin_unlock_irq(&data->lock); pcie_pme_handle_request(port, FIELD_GET(PCI_EXP_RTSTA_PME_RQ_ID, rtsta)); spin_lock_irq(&data->lock); continue; } /* No need to loop if there are no more PMEs pending. */ if (!(rtsta & PCI_EXP_RTSTA_PENDING)) break; spin_unlock_irq(&data->lock); cpu_relax(); spin_lock_irq(&data->lock); } if (!data->noirq) pcie_pme_interrupt_enable(port, true); spin_unlock_irq(&data->lock); } /** * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt. * @irq: Interrupt vector. * @context: Interrupt context pointer. */ static irqreturn_t pcie_pme_irq(int irq, void *context) { struct pci_dev *port; struct pcie_pme_service_data *data; u32 rtsta; unsigned long flags; port = ((struct pcie_device *)context)->port; data = get_service_data((struct pcie_device *)context); spin_lock_irqsave(&data->lock, flags); pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta); if (PCI_POSSIBLE_ERROR(rtsta) || !(rtsta & PCI_EXP_RTSTA_PME)) { spin_unlock_irqrestore(&data->lock, flags); return IRQ_NONE; } pcie_pme_interrupt_enable(port, false); spin_unlock_irqrestore(&data->lock, flags); /* We don't use pm_wq, because it's freezable. */ schedule_work(&data->work); return IRQ_HANDLED; } /** * pcie_pme_can_wakeup - Set the wakeup capability flag. * @dev: PCI device to handle. * @ign: Ignored. */ static int pcie_pme_can_wakeup(struct pci_dev *dev, void *ign) { device_set_wakeup_capable(&dev->dev, true); return 0; } /** * pcie_pme_mark_devices - Set the wakeup flag for devices below a port. * @port: PCIe root port or event collector to handle. * * For each device below given root port, including the port itself (or for each * root complex integrated endpoint if @port is a root complex event collector) * set the flag indicating that it can signal run-time wake-up events. */ static void pcie_pme_mark_devices(struct pci_dev *port) { pcie_pme_can_wakeup(port, NULL); if (pci_pcie_type(port) == PCI_EXP_TYPE_RC_EC) pcie_walk_rcec(port, pcie_pme_can_wakeup, NULL); else if (port->subordinate) pci_walk_bus(port->subordinate, pcie_pme_can_wakeup, NULL); } /** * pcie_pme_probe - Initialize PCIe PME service for given root port. * @srv: PCIe service to initialize. */ static int pcie_pme_probe(struct pcie_device *srv) { struct pci_dev *port = srv->port; struct pcie_pme_service_data *data; int type = pci_pcie_type(port); int ret; /* Limit to Root Ports or Root Complex Event Collectors */ if (type != PCI_EXP_TYPE_RC_EC && type != PCI_EXP_TYPE_ROOT_PORT) return -ENODEV; data = kzalloc(sizeof(*data), GFP_KERNEL); if (!data) return -ENOMEM; spin_lock_init(&data->lock); INIT_WORK(&data->work, pcie_pme_work_fn); data->srv = srv; set_service_data(srv, data); pcie_pme_interrupt_enable(port, false); pcie_clear_root_pme_status(port); ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv); if (ret) { kfree(data); return ret; } pci_info(port, "Signaling with IRQ %d\n", srv->irq); pcie_pme_mark_devices(port); pcie_pme_interrupt_enable(port, true); return 0; } static bool pcie_pme_check_wakeup(struct pci_bus *bus) { struct pci_dev *dev; if (!bus) return false; list_for_each_entry(dev, &bus->devices, bus_list) if (device_may_wakeup(&dev->dev) || pcie_pme_check_wakeup(dev->subordinate)) return true; return false; } static void pcie_pme_disable_interrupt(struct pci_dev *port, struct pcie_pme_service_data *data) { spin_lock_irq(&data->lock); pcie_pme_interrupt_enable(port, false); pcie_clear_root_pme_status(port); data->noirq = true; spin_unlock_irq(&data->lock); } /** * pcie_pme_suspend - Suspend PCIe PME service device. * @srv: PCIe service device to suspend. */ static int pcie_pme_suspend(struct pcie_device *srv) { struct pcie_pme_service_data *data = get_service_data(srv); struct pci_dev *port = srv->port; bool wakeup; int ret; if (device_may_wakeup(&port->dev)) { wakeup = true; } else { down_read(&pci_bus_sem); wakeup = pcie_pme_check_wakeup(port->subordinate); up_read(&pci_bus_sem); } if (wakeup) { ret = enable_irq_wake(srv->irq); if (!ret) return 0; } pcie_pme_disable_interrupt(port, data); synchronize_irq(srv->irq); return 0; } /** * pcie_pme_resume - Resume PCIe PME service device. * @srv: PCIe service device to resume. */ static int pcie_pme_resume(struct pcie_device *srv) { struct pcie_pme_service_data *data = get_service_data(srv); spin_lock_irq(&data->lock); if (data->noirq) { struct pci_dev *port = srv->port; pcie_clear_root_pme_status(port); pcie_pme_interrupt_enable(port, true); data->noirq = false; } else { disable_irq_wake(srv->irq); } spin_unlock_irq(&data->lock); return 0; } /** * pcie_pme_remove - Prepare PCIe PME service device for removal. * @srv: PCIe service device to remove. */ static void pcie_pme_remove(struct pcie_device *srv) { struct pcie_pme_service_data *data = get_service_data(srv); pcie_pme_disable_interrupt(srv->port, data); free_irq(srv->irq, srv); cancel_work_sync(&data->work); kfree(data); } static struct pcie_port_service_driver pcie_pme_driver = { .name = "pcie_pme", .port_type = PCIE_ANY_PORT, .service = PCIE_PORT_SERVICE_PME, .probe = pcie_pme_probe, .suspend = pcie_pme_suspend, .resume = pcie_pme_resume, .remove = pcie_pme_remove, }; /** * pcie_pme_init - Register the PCIe PME service driver. */ int __init pcie_pme_init(void) { return pcie_port_service_register(&pcie_pme_driver); } |