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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 | // SPDX-License-Identifier: GPL-2.0 /* * ddbridge.c: Digital Devices PCIe bridge driver * * Copyright (C) 2010-2017 Digital Devices GmbH * Ralph Metzler <rjkm@metzlerbros.de> * Marcus Metzler <mocm@metzlerbros.de> */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include <linux/module.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/delay.h> #include <linux/slab.h> #include <linux/poll.h> #include <linux/io.h> #include <linux/pci.h> #include <linux/pci_ids.h> #include <linux/timer.h> #include <linux/i2c.h> #include <linux/swab.h> #include <linux/vmalloc.h> #include "ddbridge.h" #include "ddbridge-i2c.h" #include "ddbridge-regs.h" #include "ddbridge-hw.h" #include "ddbridge-io.h" /****************************************************************************/ /* module parameters */ #ifdef CONFIG_PCI_MSI #ifdef CONFIG_DVB_DDBRIDGE_MSIENABLE static int msi = 1; #else static int msi; #endif module_param(msi, int, 0444); #ifdef CONFIG_DVB_DDBRIDGE_MSIENABLE MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable, 1-enable (default)"); #else MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable (default), 1-enable"); #endif #endif /****************************************************************************/ /****************************************************************************/ /****************************************************************************/ static void ddb_irq_disable(struct ddb *dev) { ddbwritel(dev, 0, INTERRUPT_ENABLE); ddbwritel(dev, 0, MSI1_ENABLE); } static void ddb_msi_exit(struct ddb *dev) { #ifdef CONFIG_PCI_MSI if (dev->msi) pci_free_irq_vectors(dev->pdev); #endif } static void ddb_irq_exit(struct ddb *dev) { ddb_irq_disable(dev); if (dev->msi == 2) free_irq(pci_irq_vector(dev->pdev, 1), dev); free_irq(pci_irq_vector(dev->pdev, 0), dev); } static void ddb_remove(struct pci_dev *pdev) { struct ddb *dev = (struct ddb *)pci_get_drvdata(pdev); ddb_device_destroy(dev); ddb_ports_detach(dev); ddb_i2c_release(dev); ddb_irq_exit(dev); ddb_msi_exit(dev); ddb_ports_release(dev); ddb_buffers_free(dev); ddb_unmap(dev); pci_set_drvdata(pdev, NULL); pci_disable_device(pdev); } #ifdef CONFIG_PCI_MSI static void ddb_irq_msi(struct ddb *dev, int nr) { int stat; if (msi && pci_msi_enabled()) { stat = pci_alloc_irq_vectors(dev->pdev, 1, nr, PCI_IRQ_MSI | PCI_IRQ_MSIX); if (stat >= 1) { dev->msi = stat; dev_info(dev->dev, "using %d MSI interrupt(s)\n", dev->msi); } else { dev_info(dev->dev, "MSI not available.\n"); } } } #endif static int ddb_irq_init(struct ddb *dev) { int stat; int irq_flag = IRQF_SHARED; ddbwritel(dev, 0x00000000, INTERRUPT_ENABLE); ddbwritel(dev, 0x00000000, MSI1_ENABLE); ddbwritel(dev, 0x00000000, MSI2_ENABLE); ddbwritel(dev, 0x00000000, MSI3_ENABLE); ddbwritel(dev, 0x00000000, MSI4_ENABLE); ddbwritel(dev, 0x00000000, MSI5_ENABLE); ddbwritel(dev, 0x00000000, MSI6_ENABLE); ddbwritel(dev, 0x00000000, MSI7_ENABLE); #ifdef CONFIG_PCI_MSI ddb_irq_msi(dev, 2); if (dev->msi) irq_flag = 0; if (dev->msi == 2) { stat = request_irq(pci_irq_vector(dev->pdev, 0), ddb_irq_handler0, irq_flag, "ddbridge", (void *)dev); if (stat < 0) return stat; stat = request_irq(pci_irq_vector(dev->pdev, 1), ddb_irq_handler1, irq_flag, "ddbridge", (void *)dev); if (stat < 0) { free_irq(pci_irq_vector(dev->pdev, 0), dev); return stat; } } else #endif { stat = request_irq(pci_irq_vector(dev->pdev, 0), ddb_irq_handler, irq_flag, "ddbridge", (void *)dev); if (stat < 0) return stat; } if (dev->msi == 2) { ddbwritel(dev, 0x0fffff00, INTERRUPT_ENABLE); ddbwritel(dev, 0x0000000f, MSI1_ENABLE); } else { ddbwritel(dev, 0x0fffff0f, INTERRUPT_ENABLE); ddbwritel(dev, 0x00000000, MSI1_ENABLE); } return stat; } static int ddb_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct ddb *dev; int stat = 0; if (pci_enable_device(pdev) < 0) return -ENODEV; pci_set_master(pdev); if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) return -ENODEV; dev = vzalloc(sizeof(*dev)); if (!dev) return -ENOMEM; mutex_init(&dev->mutex); dev->has_dma = 1; dev->pdev = pdev; dev->dev = &pdev->dev; pci_set_drvdata(pdev, dev); dev->link[0].ids.vendor = id->vendor; dev->link[0].ids.device = id->device; dev->link[0].ids.subvendor = id->subvendor; dev->link[0].ids.subdevice = pdev->subsystem_device; dev->link[0].ids.devid = (id->device << 16) | id->vendor; dev->link[0].dev = dev; dev->link[0].info = get_ddb_info(id->vendor, id->device, id->subvendor, pdev->subsystem_device); dev_info(&pdev->dev, "detected %s\n", dev->link[0].info->name); dev->regs_len = pci_resource_len(dev->pdev, 0); dev->regs = ioremap(pci_resource_start(dev->pdev, 0), pci_resource_len(dev->pdev, 0)); if (!dev->regs) { dev_err(&pdev->dev, "not enough memory for register map\n"); stat = -ENOMEM; goto fail; } if (ddbreadl(dev, 0) == 0xffffffff) { dev_err(&pdev->dev, "cannot read registers\n"); stat = -ENODEV; goto fail; } dev->link[0].ids.hwid = ddbreadl(dev, 0); dev->link[0].ids.regmapid = ddbreadl(dev, 4); dev_info(&pdev->dev, "HW %08x REGMAP %08x\n", dev->link[0].ids.hwid, dev->link[0].ids.regmapid); ddbwritel(dev, 0, DMA_BASE_READ); ddbwritel(dev, 0, DMA_BASE_WRITE); stat = ddb_irq_init(dev); if (stat < 0) goto fail0; if (ddb_init(dev) == 0) return 0; ddb_irq_exit(dev); fail0: dev_err(&pdev->dev, "fail0\n"); ddb_msi_exit(dev); fail: dev_err(&pdev->dev, "fail\n"); ddb_unmap(dev); pci_set_drvdata(pdev, NULL); pci_disable_device(pdev); return stat; } /****************************************************************************/ /****************************************************************************/ /****************************************************************************/ #define DDB_DEVICE_ANY(_device) \ { PCI_DEVICE_SUB(DDVID, _device, DDVID, PCI_ANY_ID) } static const struct pci_device_id ddb_id_table[] = { DDB_DEVICE_ANY(0x0002), DDB_DEVICE_ANY(0x0003), DDB_DEVICE_ANY(0x0005), DDB_DEVICE_ANY(0x0006), DDB_DEVICE_ANY(0x0007), DDB_DEVICE_ANY(0x0008), DDB_DEVICE_ANY(0x0009), DDB_DEVICE_ANY(0x0011), DDB_DEVICE_ANY(0x0012), DDB_DEVICE_ANY(0x0013), DDB_DEVICE_ANY(0x0201), DDB_DEVICE_ANY(0x0203), DDB_DEVICE_ANY(0x0210), DDB_DEVICE_ANY(0x0220), DDB_DEVICE_ANY(0x0320), DDB_DEVICE_ANY(0x0321), DDB_DEVICE_ANY(0x0322), DDB_DEVICE_ANY(0x0323), DDB_DEVICE_ANY(0x0328), DDB_DEVICE_ANY(0x0329), {0} }; MODULE_DEVICE_TABLE(pci, ddb_id_table); static struct pci_driver ddb_pci_driver = { .name = "ddbridge", .id_table = ddb_id_table, .probe = ddb_probe, .remove = ddb_remove, }; static __init int module_init_ddbridge(void) { int stat; pr_info("Digital Devices PCIE bridge driver " DDBRIDGE_VERSION ", Copyright (C) 2010-17 Digital Devices GmbH\n"); stat = ddb_init_ddbridge(); if (stat < 0) return stat; stat = pci_register_driver(&ddb_pci_driver); if (stat < 0) ddb_exit_ddbridge(0, stat); return stat; } static __exit void module_exit_ddbridge(void) { pci_unregister_driver(&ddb_pci_driver); ddb_exit_ddbridge(0, 0); } module_init(module_init_ddbridge); module_exit(module_exit_ddbridge); MODULE_DESCRIPTION("Digital Devices PCIe Bridge"); MODULE_AUTHOR("Ralph and Marcus Metzler, Metzler Brothers Systementwicklung GbR"); MODULE_LICENSE("GPL v2"); MODULE_VERSION(DDBRIDGE_VERSION); |