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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 | /* * arch/arm/plat-orion/common.c * * Marvell Orion SoC common setup code used by multiple mach-/common.c * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> #include <linux/serial_8250.h> #include <linux/ata_platform.h> #include <linux/clk.h> #include <linux/clkdev.h> #include <linux/mv643xx_eth.h> #include <linux/mv643xx_i2c.h> #include <linux/platform_data/dma-mv_xor.h> #include <linux/platform_data/usb-ehci-orion.h> #include <plat/common.h> #include <linux/phy.h> /* Create a clkdev entry for a given device/clk */ void __init orion_clkdev_add(const char *con_id, const char *dev_id, struct clk *clk) { clkdev_create(clk, con_id, "%s", dev_id); } /* Create clkdev entries for all orion platforms except kirkwood. Kirkwood has gated clocks for some of its peripherals, so creates its own clkdev entries. For all the other orion devices, create clkdev entries to the tclk. */ void __init orion_clkdev_init(struct clk *tclk) { orion_clkdev_add(NULL, "orion_spi.0", tclk); orion_clkdev_add(NULL, "orion_spi.1", tclk); orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); orion_clkdev_add(NULL, "orion_wdt", tclk); orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); } /* Fill in the resources structure and link it into the platform device structure. There is always a memory region, and nearly always an interrupt.*/ static void fill_resources(struct platform_device *device, struct resource *resources, resource_size_t mapbase, resource_size_t size) { device->resource = resources; device->num_resources = 1; resources[0].flags = IORESOURCE_MEM; resources[0].start = mapbase; resources[0].end = mapbase + size; } static void fill_resources_irq(struct platform_device *device, struct resource *resources, resource_size_t mapbase, resource_size_t size, unsigned int irq) { fill_resources(device, resources, mapbase, size); device->num_resources++; resources[1].flags = IORESOURCE_IRQ; resources[1].start = irq; resources[1].end = irq; } /***************************************************************************** * UART ****************************************************************************/ static unsigned long __init uart_get_clk_rate(struct clk *clk) { clk_prepare_enable(clk); return clk_get_rate(clk); } static void __init uart_complete( struct platform_device *orion_uart, struct plat_serial8250_port *data, struct resource *resources, void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) { data->mapbase = mapbase; data->membase = membase; data->irq = irq; data->uartclk = uart_get_clk_rate(clk); orion_uart->dev.platform_data = data; fill_resources_irq(orion_uart, resources, mapbase, 0xff, irq); platform_device_register(orion_uart); } /***************************************************************************** * UART0 ****************************************************************************/ static struct plat_serial8250_port orion_uart0_data[] = { { .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, }, { }, }; static struct resource orion_uart0_resources[2]; static struct platform_device orion_uart0 = { .name = "serial8250", .id = PLAT8250_DEV_PLATFORM, }; void __init orion_uart0_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) { uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, membase, mapbase, irq, clk); } /***************************************************************************** * UART1 ****************************************************************************/ static struct plat_serial8250_port orion_uart1_data[] = { { .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, }, { }, }; static struct resource orion_uart1_resources[2]; static struct platform_device orion_uart1 = { .name = "serial8250", .id = PLAT8250_DEV_PLATFORM1, }; void __init orion_uart1_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) { uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, membase, mapbase, irq, clk); } /***************************************************************************** * UART2 ****************************************************************************/ static struct plat_serial8250_port orion_uart2_data[] = { { .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, }, { }, }; static struct resource orion_uart2_resources[2]; static struct platform_device orion_uart2 = { .name = "serial8250", .id = PLAT8250_DEV_PLATFORM2, }; void __init orion_uart2_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) { uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, membase, mapbase, irq, clk); } /***************************************************************************** * UART3 ****************************************************************************/ static struct plat_serial8250_port orion_uart3_data[] = { { .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, }, { }, }; static struct resource orion_uart3_resources[2]; static struct platform_device orion_uart3 = { .name = "serial8250", .id = 3, }; void __init orion_uart3_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) { uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, membase, mapbase, irq, clk); } /***************************************************************************** * SoC RTC ****************************************************************************/ static struct resource orion_rtc_resource[2]; void __init orion_rtc_init(unsigned long mapbase, unsigned long irq) { orion_rtc_resource[0].start = mapbase; orion_rtc_resource[0].end = mapbase + SZ_32 - 1; orion_rtc_resource[0].flags = IORESOURCE_MEM; orion_rtc_resource[1].start = irq; orion_rtc_resource[1].end = irq; orion_rtc_resource[1].flags = IORESOURCE_IRQ; platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2); } /***************************************************************************** * GE ****************************************************************************/ static __init void ge_complete( struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, struct resource *orion_ge_resource, unsigned long irq, struct platform_device *orion_ge_shared, struct platform_device *orion_ge_mvmdio, struct mv643xx_eth_platform_data *eth_data, struct platform_device *orion_ge) { orion_ge_resource->start = irq; orion_ge_resource->end = irq; eth_data->shared = orion_ge_shared; orion_ge->dev.platform_data = eth_data; platform_device_register(orion_ge_shared); if (orion_ge_mvmdio) platform_device_register(orion_ge_mvmdio); platform_device_register(orion_ge); } /***************************************************************************** * GE00 ****************************************************************************/ static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; static struct resource orion_ge00_shared_resources[] = { { .name = "ge00 base", }, }; static struct platform_device orion_ge00_shared = { .name = MV643XX_ETH_SHARED_NAME, .id = 0, .dev = { .platform_data = &orion_ge00_shared_data, }, }; static struct resource orion_ge_mvmdio_resources[] = { { .name = "ge00 mvmdio base", }, { .name = "ge00 mvmdio err irq", }, }; static struct platform_device orion_ge_mvmdio = { .name = "orion-mdio", .id = -1, }; static struct resource orion_ge00_resources[] = { { .name = "ge00 irq", .flags = IORESOURCE_IRQ, }, }; static struct platform_device orion_ge00 = { .name = MV643XX_ETH_NAME, .id = 0, .num_resources = 1, .resource = orion_ge00_resources, .dev = { .coherent_dma_mask = DMA_BIT_MASK(32), }, }; void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq, unsigned long irq_err, unsigned int tx_csum_limit) { fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, mapbase + 0x2000, SZ_16K - 1); fill_resources_irq(&orion_ge_mvmdio, orion_ge_mvmdio_resources, mapbase + 0x2004, 0x84 - 1, irq_err); orion_ge00_shared_data.tx_csum_limit = tx_csum_limit; ge_complete(&orion_ge00_shared_data, orion_ge00_resources, irq, &orion_ge00_shared, &orion_ge_mvmdio, eth_data, &orion_ge00); } /***************************************************************************** * GE01 ****************************************************************************/ static struct mv643xx_eth_shared_platform_data orion_ge01_shared_data; static struct resource orion_ge01_shared_resources[] = { { .name = "ge01 base", } }; static struct platform_device orion_ge01_shared = { .name = MV643XX_ETH_SHARED_NAME, .id = 1, .dev = { .platform_data = &orion_ge01_shared_data, }, }; static struct resource orion_ge01_resources[] = { { .name = "ge01 irq", .flags = IORESOURCE_IRQ, }, }; static struct platform_device orion_ge01 = { .name = MV643XX_ETH_NAME, .id = 1, .num_resources = 1, .resource = orion_ge01_resources, .dev = { .coherent_dma_mask = DMA_BIT_MASK(32), }, }; void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq, unsigned int tx_csum_limit) { fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, mapbase + 0x2000, SZ_16K - 1); orion_ge01_shared_data.tx_csum_limit = tx_csum_limit; ge_complete(&orion_ge01_shared_data, orion_ge01_resources, irq, &orion_ge01_shared, NULL, eth_data, &orion_ge01); } /***************************************************************************** * GE10 ****************************************************************************/ static struct mv643xx_eth_shared_platform_data orion_ge10_shared_data; static struct resource orion_ge10_shared_resources[] = { { .name = "ge10 base", } }; static struct platform_device orion_ge10_shared = { .name = MV643XX_ETH_SHARED_NAME, .id = 2, .dev = { .platform_data = &orion_ge10_shared_data, }, }; static struct resource orion_ge10_resources[] = { { .name = "ge10 irq", .flags = IORESOURCE_IRQ, }, }; static struct platform_device orion_ge10 = { .name = MV643XX_ETH_NAME, .id = 2, .num_resources = 1, .resource = orion_ge10_resources, .dev = { .coherent_dma_mask = DMA_BIT_MASK(32), }, }; void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq) { fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, mapbase + 0x2000, SZ_16K - 1); ge_complete(&orion_ge10_shared_data, orion_ge10_resources, irq, &orion_ge10_shared, NULL, eth_data, &orion_ge10); } /***************************************************************************** * GE11 ****************************************************************************/ static struct mv643xx_eth_shared_platform_data orion_ge11_shared_data; static struct resource orion_ge11_shared_resources[] = { { .name = "ge11 base", }, }; static struct platform_device orion_ge11_shared = { .name = MV643XX_ETH_SHARED_NAME, .id = 3, .dev = { .platform_data = &orion_ge11_shared_data, }, }; static struct resource orion_ge11_resources[] = { { .name = "ge11 irq", .flags = IORESOURCE_IRQ, }, }; static struct platform_device orion_ge11 = { .name = MV643XX_ETH_NAME, .id = 3, .num_resources = 1, .resource = orion_ge11_resources, .dev = { .coherent_dma_mask = DMA_BIT_MASK(32), }, }; void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq) { fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, mapbase + 0x2000, SZ_16K - 1); ge_complete(&orion_ge11_shared_data, orion_ge11_resources, irq, &orion_ge11_shared, NULL, eth_data, &orion_ge11); } /***************************************************************************** * I2C ****************************************************************************/ static struct mv64xxx_i2c_pdata orion_i2c_pdata = { .freq_n = 3, .timeout = 1000, /* Default timeout of 1 second */ }; static struct resource orion_i2c_resources[2]; static struct platform_device orion_i2c = { .name = MV64XXX_I2C_CTLR_NAME, .id = 0, .dev = { .platform_data = &orion_i2c_pdata, }, }; static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { .freq_n = 3, .timeout = 1000, /* Default timeout of 1 second */ }; static struct resource orion_i2c_1_resources[2]; static struct platform_device orion_i2c_1 = { .name = MV64XXX_I2C_CTLR_NAME, .id = 1, .dev = { .platform_data = &orion_i2c_1_pdata, }, }; void __init orion_i2c_init(unsigned long mapbase, unsigned long irq, unsigned long freq_m) { orion_i2c_pdata.freq_m = freq_m; fill_resources_irq(&orion_i2c, orion_i2c_resources, mapbase, SZ_32 - 1, irq); platform_device_register(&orion_i2c); } void __init orion_i2c_1_init(unsigned long mapbase, unsigned long irq, unsigned long freq_m) { orion_i2c_1_pdata.freq_m = freq_m; fill_resources_irq(&orion_i2c_1, orion_i2c_1_resources, mapbase, SZ_32 - 1, irq); platform_device_register(&orion_i2c_1); } /***************************************************************************** * SPI ****************************************************************************/ static struct resource orion_spi_resources; static struct platform_device orion_spi = { .name = "orion_spi", .id = 0, }; static struct resource orion_spi_1_resources; static struct platform_device orion_spi_1 = { .name = "orion_spi", .id = 1, }; /* Note: The SPI silicon core does have interrupts. However the * current Linux software driver does not use interrupts. */ void __init orion_spi_init(unsigned long mapbase) { fill_resources(&orion_spi, &orion_spi_resources, mapbase, SZ_512 - 1); platform_device_register(&orion_spi); } void __init orion_spi_1_init(unsigned long mapbase) { fill_resources(&orion_spi_1, &orion_spi_1_resources, mapbase, SZ_512 - 1); platform_device_register(&orion_spi_1); } /***************************************************************************** * XOR ****************************************************************************/ static u64 orion_xor_dmamask = DMA_BIT_MASK(32); /***************************************************************************** * XOR0 ****************************************************************************/ static struct resource orion_xor0_shared_resources[] = { { .name = "xor 0 low", .flags = IORESOURCE_MEM, }, { .name = "xor 0 high", .flags = IORESOURCE_MEM, }, { .name = "irq channel 0", .flags = IORESOURCE_IRQ, }, { .name = "irq channel 1", .flags = IORESOURCE_IRQ, }, }; static struct mv_xor_channel_data orion_xor0_channels_data[2]; static struct mv_xor_platform_data orion_xor0_pdata = { .channels = orion_xor0_channels_data, }; static struct platform_device orion_xor0_shared = { .name = MV_XOR_NAME, .id = 0, .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), .resource = orion_xor0_shared_resources, .dev = { .dma_mask = &orion_xor_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &orion_xor0_pdata, }, }; void __init orion_xor0_init(unsigned long mapbase_low, unsigned long mapbase_high, unsigned long irq_0, unsigned long irq_1) { orion_xor0_shared_resources[0].start = mapbase_low; orion_xor0_shared_resources[0].end = mapbase_low + 0xff; orion_xor0_shared_resources[1].start = mapbase_high; orion_xor0_shared_resources[1].end = mapbase_high + 0xff; orion_xor0_shared_resources[2].start = irq_0; orion_xor0_shared_resources[2].end = irq_0; orion_xor0_shared_resources[3].start = irq_1; orion_xor0_shared_resources[3].end = irq_1; dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask); dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask); dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask); dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask); platform_device_register(&orion_xor0_shared); } /***************************************************************************** * XOR1 ****************************************************************************/ static struct resource orion_xor1_shared_resources[] = { { .name = "xor 1 low", .flags = IORESOURCE_MEM, }, { .name = "xor 1 high", .flags = IORESOURCE_MEM, }, { .name = "irq channel 0", .flags = IORESOURCE_IRQ, }, { .name = "irq channel 1", .flags = IORESOURCE_IRQ, }, }; static struct mv_xor_channel_data orion_xor1_channels_data[2]; static struct mv_xor_platform_data orion_xor1_pdata = { .channels = orion_xor1_channels_data, }; static struct platform_device orion_xor1_shared = { .name = MV_XOR_NAME, .id = 1, .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), .resource = orion_xor1_shared_resources, .dev = { .dma_mask = &orion_xor_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &orion_xor1_pdata, }, }; void __init orion_xor1_init(unsigned long mapbase_low, unsigned long mapbase_high, unsigned long irq_0, unsigned long irq_1) { orion_xor1_shared_resources[0].start = mapbase_low; orion_xor1_shared_resources[0].end = mapbase_low + 0xff; orion_xor1_shared_resources[1].start = mapbase_high; orion_xor1_shared_resources[1].end = mapbase_high + 0xff; orion_xor1_shared_resources[2].start = irq_0; orion_xor1_shared_resources[2].end = irq_0; orion_xor1_shared_resources[3].start = irq_1; orion_xor1_shared_resources[3].end = irq_1; dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask); dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask); dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask); dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask); platform_device_register(&orion_xor1_shared); } /***************************************************************************** * EHCI ****************************************************************************/ static struct orion_ehci_data orion_ehci_data; static u64 ehci_dmamask = DMA_BIT_MASK(32); /***************************************************************************** * EHCI0 ****************************************************************************/ static struct resource orion_ehci_resources[2]; static struct platform_device orion_ehci = { .name = "orion-ehci", .id = 0, .dev = { .dma_mask = &ehci_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &orion_ehci_data, }, }; void __init orion_ehci_init(unsigned long mapbase, unsigned long irq, enum orion_ehci_phy_ver phy_version) { orion_ehci_data.phy_version = phy_version; fill_resources_irq(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, irq); platform_device_register(&orion_ehci); } /***************************************************************************** * EHCI1 ****************************************************************************/ static struct resource orion_ehci_1_resources[2]; static struct platform_device orion_ehci_1 = { .name = "orion-ehci", .id = 1, .dev = { .dma_mask = &ehci_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &orion_ehci_data, }, }; void __init orion_ehci_1_init(unsigned long mapbase, unsigned long irq) { fill_resources_irq(&orion_ehci_1, orion_ehci_1_resources, mapbase, SZ_4K - 1, irq); platform_device_register(&orion_ehci_1); } /***************************************************************************** * EHCI2 ****************************************************************************/ static struct resource orion_ehci_2_resources[2]; static struct platform_device orion_ehci_2 = { .name = "orion-ehci", .id = 2, .dev = { .dma_mask = &ehci_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &orion_ehci_data, }, }; void __init orion_ehci_2_init(unsigned long mapbase, unsigned long irq) { fill_resources_irq(&orion_ehci_2, orion_ehci_2_resources, mapbase, SZ_4K - 1, irq); platform_device_register(&orion_ehci_2); } /***************************************************************************** * SATA ****************************************************************************/ static struct resource orion_sata_resources[2] = { { .name = "sata base", }, { .name = "sata irq", }, }; static struct platform_device orion_sata = { .name = "sata_mv", .id = 0, .dev = { .coherent_dma_mask = DMA_BIT_MASK(32), }, }; void __init orion_sata_init(struct mv_sata_platform_data *sata_data, unsigned long mapbase, unsigned long irq) { orion_sata.dev.platform_data = sata_data; fill_resources_irq(&orion_sata, orion_sata_resources, mapbase, 0x5000 - 1, irq); platform_device_register(&orion_sata); } /***************************************************************************** * Cryptographic Engines and Security Accelerator (CESA) ****************************************************************************/ static struct resource orion_crypto_resources[] = { { .name = "regs", }, { .name = "crypto interrupt", }, { .name = "sram", .flags = IORESOURCE_MEM, }, }; static struct platform_device orion_crypto = { .name = "mv_crypto", .id = -1, }; void __init orion_crypto_init(unsigned long mapbase, unsigned long srambase, unsigned long sram_size, unsigned long irq) { fill_resources_irq(&orion_crypto, orion_crypto_resources, mapbase, 0xffff, irq); orion_crypto.num_resources = 3; orion_crypto_resources[2].start = srambase; orion_crypto_resources[2].end = srambase + sram_size - 1; platform_device_register(&orion_crypto); } |