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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 | // SPDX-License-Identifier: GPL-2.0 /* * NVM helpers * * Copyright (C) 2020, Intel Corporation * Author: Mika Westerberg <mika.westerberg@linux.intel.com> */ #include <linux/idr.h> #include <linux/slab.h> #include <linux/vmalloc.h> #include "tb.h" #define NVM_MIN_SIZE SZ_32K #define NVM_MAX_SIZE SZ_1M #define NVM_DATA_DWORDS 16 /* Intel specific NVM offsets */ #define INTEL_NVM_DEVID 0x05 #define INTEL_NVM_VERSION 0x08 #define INTEL_NVM_CSS 0x10 #define INTEL_NVM_FLASH_SIZE 0x45 /* ASMedia specific NVM offsets */ #define ASMEDIA_NVM_DATE 0x1c #define ASMEDIA_NVM_VERSION 0x28 static DEFINE_IDA(nvm_ida); /** * struct tb_nvm_vendor_ops - Vendor specific NVM operations * @read_version: Reads out NVM version from the flash * @validate: Validates the NVM image before update (optional) * @write_headers: Writes headers before the rest of the image (optional) */ struct tb_nvm_vendor_ops { int (*read_version)(struct tb_nvm *nvm); int (*validate)(struct tb_nvm *nvm); int (*write_headers)(struct tb_nvm *nvm); }; /** * struct tb_nvm_vendor - Vendor to &struct tb_nvm_vendor_ops mapping * @vendor: Vendor ID * @vops: Vendor specific NVM operations * * Maps vendor ID to NVM vendor operations. If there is no mapping then * NVM firmware upgrade is disabled for the device. */ struct tb_nvm_vendor { u16 vendor; const struct tb_nvm_vendor_ops *vops; }; static int intel_switch_nvm_version(struct tb_nvm *nvm) { struct tb_switch *sw = tb_to_switch(nvm->dev); u32 val, nvm_size, hdr_size; int ret; /* * If the switch is in safe-mode the only accessible portion of * the NVM is the non-active one where userspace is expected to * write new functional NVM. */ if (sw->safe_mode) return 0; ret = tb_switch_nvm_read(sw, INTEL_NVM_FLASH_SIZE, &val, sizeof(val)); if (ret) return ret; hdr_size = sw->generation < 3 ? SZ_8K : SZ_16K; nvm_size = (SZ_1M << (val & 7)) / 8; nvm_size = (nvm_size - hdr_size) / 2; ret = tb_switch_nvm_read(sw, INTEL_NVM_VERSION, &val, sizeof(val)); if (ret) return ret; nvm->major = (val >> 16) & 0xff; nvm->minor = (val >> 8) & 0xff; nvm->active_size = nvm_size; return 0; } static int intel_switch_nvm_validate(struct tb_nvm *nvm) { struct tb_switch *sw = tb_to_switch(nvm->dev); unsigned int image_size, hdr_size; u16 ds_size, device_id; u8 *buf = nvm->buf; image_size = nvm->buf_data_size; /* * FARB pointer must point inside the image and must at least * contain parts of the digital section we will be reading here. */ hdr_size = (*(u32 *)buf) & 0xffffff; if (hdr_size + INTEL_NVM_DEVID + 2 >= image_size) return -EINVAL; /* Digital section start should be aligned to 4k page */ if (!IS_ALIGNED(hdr_size, SZ_4K)) return -EINVAL; /* * Read digital section size and check that it also fits inside * the image. */ ds_size = *(u16 *)(buf + hdr_size); if (ds_size >= image_size) return -EINVAL; if (sw->safe_mode) return 0; /* * Make sure the device ID in the image matches the one * we read from the switch config space. */ device_id = *(u16 *)(buf + hdr_size + INTEL_NVM_DEVID); if (device_id != sw->config.device_id) return -EINVAL; /* Skip headers in the image */ nvm->buf_data_start = buf + hdr_size; nvm->buf_data_size = image_size - hdr_size; return 0; } static int intel_switch_nvm_write_headers(struct tb_nvm *nvm) { struct tb_switch *sw = tb_to_switch(nvm->dev); if (sw->generation < 3) { int ret; /* Write CSS headers first */ ret = dma_port_flash_write(sw->dma_port, DMA_PORT_CSS_ADDRESS, nvm->buf + INTEL_NVM_CSS, DMA_PORT_CSS_MAX_SIZE); if (ret) return ret; } return 0; } static const struct tb_nvm_vendor_ops intel_switch_nvm_ops = { .read_version = intel_switch_nvm_version, .validate = intel_switch_nvm_validate, .write_headers = intel_switch_nvm_write_headers, }; static int asmedia_switch_nvm_version(struct tb_nvm *nvm) { struct tb_switch *sw = tb_to_switch(nvm->dev); u32 val; int ret; ret = tb_switch_nvm_read(sw, ASMEDIA_NVM_VERSION, &val, sizeof(val)); if (ret) return ret; nvm->major = (val << 16) & 0xff0000; nvm->major |= val & 0x00ff00; nvm->major |= (val >> 16) & 0x0000ff; ret = tb_switch_nvm_read(sw, ASMEDIA_NVM_DATE, &val, sizeof(val)); if (ret) return ret; nvm->minor = (val << 16) & 0xff0000; nvm->minor |= val & 0x00ff00; nvm->minor |= (val >> 16) & 0x0000ff; /* ASMedia NVM size is fixed to 512k */ nvm->active_size = SZ_512K; return 0; } static const struct tb_nvm_vendor_ops asmedia_switch_nvm_ops = { .read_version = asmedia_switch_nvm_version, }; /* Router vendor NVM support table */ static const struct tb_nvm_vendor switch_nvm_vendors[] = { { 0x174c, &asmedia_switch_nvm_ops }, { PCI_VENDOR_ID_INTEL, &intel_switch_nvm_ops }, { 0x8087, &intel_switch_nvm_ops }, }; static int intel_retimer_nvm_version(struct tb_nvm *nvm) { struct tb_retimer *rt = tb_to_retimer(nvm->dev); u32 val, nvm_size; int ret; ret = tb_retimer_nvm_read(rt, INTEL_NVM_VERSION, &val, sizeof(val)); if (ret) return ret; nvm->major = (val >> 16) & 0xff; nvm->minor = (val >> 8) & 0xff; ret = tb_retimer_nvm_read(rt, INTEL_NVM_FLASH_SIZE, &val, sizeof(val)); if (ret) return ret; nvm_size = (SZ_1M << (val & 7)) / 8; nvm_size = (nvm_size - SZ_16K) / 2; nvm->active_size = nvm_size; return 0; } static int intel_retimer_nvm_validate(struct tb_nvm *nvm) { struct tb_retimer *rt = tb_to_retimer(nvm->dev); unsigned int image_size, hdr_size; u8 *buf = nvm->buf; u16 ds_size, device; image_size = nvm->buf_data_size; /* * FARB pointer must point inside the image and must at least * contain parts of the digital section we will be reading here. */ hdr_size = (*(u32 *)buf) & 0xffffff; if (hdr_size + INTEL_NVM_DEVID + 2 >= image_size) return -EINVAL; /* Digital section start should be aligned to 4k page */ if (!IS_ALIGNED(hdr_size, SZ_4K)) return -EINVAL; /* * Read digital section size and check that it also fits inside * the image. */ ds_size = *(u16 *)(buf + hdr_size); if (ds_size >= image_size) return -EINVAL; /* * Make sure the device ID in the image matches the retimer * hardware. */ device = *(u16 *)(buf + hdr_size + INTEL_NVM_DEVID); if (device != rt->device) return -EINVAL; /* Skip headers in the image */ nvm->buf_data_start = buf + hdr_size; nvm->buf_data_size = image_size - hdr_size; return 0; } static const struct tb_nvm_vendor_ops intel_retimer_nvm_ops = { .read_version = intel_retimer_nvm_version, .validate = intel_retimer_nvm_validate, }; /* Retimer vendor NVM support table */ static const struct tb_nvm_vendor retimer_nvm_vendors[] = { { 0x8087, &intel_retimer_nvm_ops }, }; /** * tb_nvm_alloc() - Allocate new NVM structure * @dev: Device owning the NVM * * Allocates new NVM structure with unique @id and returns it. In case * of error returns ERR_PTR(). Specifically returns %-EOPNOTSUPP if the * NVM format of the @dev is not known by the kernel. */ struct tb_nvm *tb_nvm_alloc(struct device *dev) { const struct tb_nvm_vendor_ops *vops = NULL; struct tb_nvm *nvm; int ret, i; if (tb_is_switch(dev)) { const struct tb_switch *sw = tb_to_switch(dev); for (i = 0; i < ARRAY_SIZE(switch_nvm_vendors); i++) { const struct tb_nvm_vendor *v = &switch_nvm_vendors[i]; if (v->vendor == sw->config.vendor_id) { vops = v->vops; break; } } if (!vops) { tb_sw_dbg(sw, "router NVM format of vendor %#x unknown\n", sw->config.vendor_id); return ERR_PTR(-EOPNOTSUPP); } } else if (tb_is_retimer(dev)) { const struct tb_retimer *rt = tb_to_retimer(dev); for (i = 0; i < ARRAY_SIZE(retimer_nvm_vendors); i++) { const struct tb_nvm_vendor *v = &retimer_nvm_vendors[i]; if (v->vendor == rt->vendor) { vops = v->vops; break; } } if (!vops) { dev_dbg(dev, "retimer NVM format of vendor %#x unknown\n", rt->vendor); return ERR_PTR(-EOPNOTSUPP); } } else { return ERR_PTR(-EOPNOTSUPP); } nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); if (!nvm) return ERR_PTR(-ENOMEM); ret = ida_alloc(&nvm_ida, GFP_KERNEL); if (ret < 0) { kfree(nvm); return ERR_PTR(ret); } nvm->id = ret; nvm->dev = dev; nvm->vops = vops; return nvm; } /** * tb_nvm_read_version() - Read and populate NVM version * @nvm: NVM structure * * Uses vendor specific means to read out and fill in the existing * active NVM version. Returns %0 in case of success and negative errno * otherwise. */ int tb_nvm_read_version(struct tb_nvm *nvm) { const struct tb_nvm_vendor_ops *vops = nvm->vops; if (vops && vops->read_version) return vops->read_version(nvm); return -EOPNOTSUPP; } /** * tb_nvm_validate() - Validate new NVM image * @nvm: NVM structure * * Runs vendor specific validation over the new NVM image and if all * checks pass returns %0. As side effect updates @nvm->buf_data_start * and @nvm->buf_data_size fields to match the actual data to be written * to the NVM. * * If the validation does not pass then returns negative errno. */ int tb_nvm_validate(struct tb_nvm *nvm) { const struct tb_nvm_vendor_ops *vops = nvm->vops; unsigned int image_size; u8 *buf = nvm->buf; if (!buf) return -EINVAL; if (!vops) return -EOPNOTSUPP; /* Just do basic image size checks */ image_size = nvm->buf_data_size; if (image_size < NVM_MIN_SIZE || image_size > NVM_MAX_SIZE) return -EINVAL; /* * Set the default data start in the buffer. The validate method * below can change this if needed. */ nvm->buf_data_start = buf; return vops->validate ? vops->validate(nvm) : 0; } /** * tb_nvm_write_headers() - Write headers before the rest of the image * @nvm: NVM structure * * If the vendor NVM format requires writing headers before the rest of * the image, this function does that. Can be called even if the device * does not need this. * * Returns %0 in case of success and negative errno otherwise. */ int tb_nvm_write_headers(struct tb_nvm *nvm) { const struct tb_nvm_vendor_ops *vops = nvm->vops; return vops->write_headers ? vops->write_headers(nvm) : 0; } /** * tb_nvm_add_active() - Adds active NVMem device to NVM * @nvm: NVM structure * @reg_read: Pointer to the function to read the NVM (passed directly to the * NVMem device) * * Registers new active NVmem device for @nvm. The @reg_read is called * directly from NVMem so it must handle possible concurrent access if * needed. The first parameter passed to @reg_read is @nvm structure. * Returns %0 in success and negative errno otherwise. */ int tb_nvm_add_active(struct tb_nvm *nvm, nvmem_reg_read_t reg_read) { struct nvmem_config config; struct nvmem_device *nvmem; memset(&config, 0, sizeof(config)); config.name = "nvm_active"; config.reg_read = reg_read; config.read_only = true; config.id = nvm->id; config.stride = 4; config.word_size = 4; config.size = nvm->active_size; config.dev = nvm->dev; config.owner = THIS_MODULE; config.priv = nvm; nvmem = nvmem_register(&config); if (IS_ERR(nvmem)) return PTR_ERR(nvmem); nvm->active = nvmem; return 0; } /** * tb_nvm_write_buf() - Write data to @nvm buffer * @nvm: NVM structure * @offset: Offset where to write the data * @val: Data buffer to write * @bytes: Number of bytes to write * * Helper function to cache the new NVM image before it is actually * written to the flash. Copies @bytes from @val to @nvm->buf starting * from @offset. */ int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val, size_t bytes) { if (!nvm->buf) { nvm->buf = vmalloc(NVM_MAX_SIZE); if (!nvm->buf) return -ENOMEM; } nvm->flushed = false; nvm->buf_data_size = offset + bytes; memcpy(nvm->buf + offset, val, bytes); return 0; } /** * tb_nvm_add_non_active() - Adds non-active NVMem device to NVM * @nvm: NVM structure * @reg_write: Pointer to the function to write the NVM (passed directly * to the NVMem device) * * Registers new non-active NVmem device for @nvm. The @reg_write is called * directly from NVMem so it must handle possible concurrent access if * needed. The first parameter passed to @reg_write is @nvm structure. * The size of the NVMem device is set to %NVM_MAX_SIZE. * * Returns %0 in success and negative errno otherwise. */ int tb_nvm_add_non_active(struct tb_nvm *nvm, nvmem_reg_write_t reg_write) { struct nvmem_config config; struct nvmem_device *nvmem; memset(&config, 0, sizeof(config)); config.name = "nvm_non_active"; config.reg_write = reg_write; config.root_only = true; config.id = nvm->id; config.stride = 4; config.word_size = 4; config.size = NVM_MAX_SIZE; config.dev = nvm->dev; config.owner = THIS_MODULE; config.priv = nvm; nvmem = nvmem_register(&config); if (IS_ERR(nvmem)) return PTR_ERR(nvmem); nvm->non_active = nvmem; return 0; } /** * tb_nvm_free() - Release NVM and its resources * @nvm: NVM structure to release * * Releases NVM and the NVMem devices if they were registered. */ void tb_nvm_free(struct tb_nvm *nvm) { if (nvm) { nvmem_unregister(nvm->non_active); nvmem_unregister(nvm->active); vfree(nvm->buf); ida_free(&nvm_ida, nvm->id); } kfree(nvm); } /** * tb_nvm_read_data() - Read data from NVM * @address: Start address on the flash * @buf: Buffer where the read data is copied * @size: Size of the buffer in bytes * @retries: Number of retries if block read fails * @read_block: Function that reads block from the flash * @read_block_data: Data passsed to @read_block * * This is a generic function that reads data from NVM or NVM like * device. * * Returns %0 on success and negative errno otherwise. */ int tb_nvm_read_data(unsigned int address, void *buf, size_t size, unsigned int retries, read_block_fn read_block, void *read_block_data) { do { unsigned int dwaddress, dwords, offset; u8 data[NVM_DATA_DWORDS * 4]; size_t nbytes; int ret; offset = address & 3; nbytes = min_t(size_t, size + offset, NVM_DATA_DWORDS * 4); dwaddress = address / 4; dwords = ALIGN(nbytes, 4) / 4; ret = read_block(read_block_data, dwaddress, data, dwords); if (ret) { if (ret != -ENODEV && retries--) continue; return ret; } nbytes -= offset; memcpy(buf, data + offset, nbytes); size -= nbytes; address += nbytes; buf += nbytes; } while (size > 0); return 0; } /** * tb_nvm_write_data() - Write data to NVM * @address: Start address on the flash * @buf: Buffer where the data is copied from * @size: Size of the buffer in bytes * @retries: Number of retries if the block write fails * @write_block: Function that writes block to the flash * @write_block_data: Data passwd to @write_block * * This is generic function that writes data to NVM or NVM like device. * * Returns %0 on success and negative errno otherwise. */ int tb_nvm_write_data(unsigned int address, const void *buf, size_t size, unsigned int retries, write_block_fn write_block, void *write_block_data) { do { unsigned int offset, dwaddress; u8 data[NVM_DATA_DWORDS * 4]; size_t nbytes; int ret; offset = address & 3; nbytes = min_t(u32, size + offset, NVM_DATA_DWORDS * 4); memcpy(data + offset, buf, nbytes); dwaddress = address / 4; ret = write_block(write_block_data, dwaddress, data, nbytes / 4); if (ret) { if (ret == -ETIMEDOUT) { if (retries--) continue; ret = -EIO; } return ret; } size -= nbytes; address += nbytes; buf += nbytes; } while (size > 0); return 0; } void tb_nvm_exit(void) { ida_destroy(&nvm_ida); } |