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// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC Family MCU Domain peripherals * * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_mcu { mcu_pmx0: pinctrl@4084000 { compatible = "pinctrl-single"; reg = <0x00 0x04084000 0x00 0x88>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xffffffff>; }; mcu_uart0: serial@4a00000 { compatible = "ti,am64-uart", "ti,am654-uart"; reg = <0x00 0x04a00000 0x00 0x100>; interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 149 0>; clock-names = "fclk"; }; mcu_i2c0: i2c@4900000 { compatible = "ti,am64-i2c", "ti,omap4-i2c"; reg = <0x00 0x04900000 0x00 0x100>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 106 2>; clock-names = "fck"; }; mcu_spi0: spi@4b00000 { compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; reg = <0x00 0x04b00000 0x00 0x400>; interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 147 0>; status = "disabled"; }; mcu_spi1: spi@4b10000 { compatible = "ti,am654-mcspi","ti,omap4-mcspi"; reg = <0x00 0x04b10000 0x00 0x400>; interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 148 0>; status = "disabled"; }; mcu_gpio_intr: interrupt-controller@4210000 { compatible = "ti,sci-intr"; reg = <0x00 0x04210000 0x00 0x200>; ti,intr-trigger-type = <1>; interrupt-controller; interrupt-parent = <&gic500>; #interrupt-cells = <1>; ti,sci = <&dmsc>; ti,sci-dev-id = <5>; ti,interrupt-ranges = <0 104 4>; }; mcu_gpio0: gpio@4201000 { compatible = "ti,am64-gpio", "ti,keystone-gpio"; reg = <0x00 0x4201000 0x00 0x100>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&mcu_gpio_intr>; interrupts = <30>, <31>; interrupt-controller; #interrupt-cells = <2>; ti,ngpio = <24>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 79 0>; clock-names = "gpio"; }; }; |