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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Technologies, Inc. MSM8226 TLMM block maintainers: - Bjorn Andersson <bjorn.andersson@linaro.org> description: | This binding describes the Top Level Mode Multiplexer block found in the MSM8226 platform. properties: compatible: const: qcom,msm8226-pinctrl reg: description: Specifies the base address and size of the TLMM register space maxItems: 1 interrupts: description: Specifies the TLMM summary IRQ maxItems: 1 interrupt-controller: true '#interrupt-cells': description: Specifies the PIN numbers and Flags, as defined in include/dt-bindings/interrupt-controller/irq.h const: 2 gpio-controller: true '#gpio-cells': description: Specifying the pin number and flags, as defined in include/dt-bindings/gpio/gpio.h const: 2 gpio-ranges: maxItems: 1 gpio-reserved-ranges: maxItems: 1 #PIN CONFIGURATION NODES patternProperties: '-pins$': type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. $ref: "/schemas/pinctrl/pincfg-node.yaml" properties: pins: description: List of gpio pins affected by the properties specified in this subnode. items: oneOf: - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$" - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ] minItems: 1 maxItems: 36 function: description: Specify the alternative function to be configured for the specified pins. Functions are only valid for gpio pins. enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2, blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ] drive-strength: enum: [2, 4, 6, 8, 10, 12, 14, 16] default: 2 description: Selects the drive strength for the specified pins, in mA. bias-pull-down: true bias-pull-up: true bias-disable: true output-high: true output-low: true required: - pins - function additionalProperties: false allOf: - $ref: "pinctrl.yaml#" required: - compatible - reg - interrupts - interrupt-controller - '#interrupt-cells' - gpio-controller - '#gpio-cells' - gpio-ranges additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> msmgpio: pinctrl@fd510000 { compatible = "qcom,msm8226-pinctrl"; reg = <0xfd510000 0x4000>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&msmgpio 0 0 117>; interrupt-controller; #interrupt-cells = <2>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; serial-pins { pins = "gpio8", "gpio9"; function = "blsp_uart3"; drive-strength = <8>; bias-disable; }; }; |