Loading...
// SPDX-License-Identifier: GPL-2.0 /* * Hantro VPU codec driver * * Copyright (C) 2018 Rockchip Electronics Co., Ltd. * Jeffy Chen <jeffy.chen@rock-chips.com> * Copyright (C) 2019 Pengutronix, Philipp Zabel <kernel@pengutronix.de> * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com> */ #include "hantro.h" #include "hantro_g1_regs.h" irqreturn_t hantro_g1_irq(int irq, void *dev_id) { struct hantro_dev *vpu = dev_id; enum vb2_buffer_state state; u32 status; status = vdpu_read(vpu, G1_REG_INTERRUPT); state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ? VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; vdpu_write(vpu, 0, G1_REG_INTERRUPT); vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); hantro_irq_done(vpu, state); return IRQ_HANDLED; } void hantro_g1_reset(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT); vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); vdpu_write(vpu, 1, G1_REG_SOFT_RESET); } |