Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 | /* * Copyright (C) 2014 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef __ASM_OPENRISC_BITOPS_ATOMIC_H #define __ASM_OPENRISC_BITOPS_ATOMIC_H static inline void set_bit(int nr, volatile unsigned long *addr) { unsigned long mask = BIT_MASK(nr); unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); unsigned long tmp; __asm__ __volatile__( "1: l.lwa %0,0(%1) \n" " l.or %0,%0,%2 \n" " l.swa 0(%1),%0 \n" " l.bnf 1b \n" " l.nop \n" : "=&r"(tmp) : "r"(p), "r"(mask) : "cc", "memory"); } static inline void clear_bit(int nr, volatile unsigned long *addr) { unsigned long mask = BIT_MASK(nr); unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); unsigned long tmp; __asm__ __volatile__( "1: l.lwa %0,0(%1) \n" " l.and %0,%0,%2 \n" " l.swa 0(%1),%0 \n" " l.bnf 1b \n" " l.nop \n" : "=&r"(tmp) : "r"(p), "r"(~mask) : "cc", "memory"); } static inline void change_bit(int nr, volatile unsigned long *addr) { unsigned long mask = BIT_MASK(nr); unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); unsigned long tmp; __asm__ __volatile__( "1: l.lwa %0,0(%1) \n" " l.xor %0,%0,%2 \n" " l.swa 0(%1),%0 \n" " l.bnf 1b \n" " l.nop \n" : "=&r"(tmp) : "r"(p), "r"(mask) : "cc", "memory"); } static inline int test_and_set_bit(int nr, volatile unsigned long *addr) { unsigned long mask = BIT_MASK(nr); unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); unsigned long old; unsigned long tmp; __asm__ __volatile__( "1: l.lwa %0,0(%2) \n" " l.or %1,%0,%3 \n" " l.swa 0(%2),%1 \n" " l.bnf 1b \n" " l.nop \n" : "=&r"(old), "=&r"(tmp) : "r"(p), "r"(mask) : "cc", "memory"); return (old & mask) != 0; } static inline int test_and_clear_bit(int nr, volatile unsigned long *addr) { unsigned long mask = BIT_MASK(nr); unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); unsigned long old; unsigned long tmp; __asm__ __volatile__( "1: l.lwa %0,0(%2) \n" " l.and %1,%0,%3 \n" " l.swa 0(%2),%1 \n" " l.bnf 1b \n" " l.nop \n" : "=&r"(old), "=&r"(tmp) : "r"(p), "r"(~mask) : "cc", "memory"); return (old & mask) != 0; } static inline int test_and_change_bit(int nr, volatile unsigned long *addr) { unsigned long mask = BIT_MASK(nr); unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); unsigned long old; unsigned long tmp; __asm__ __volatile__( "1: l.lwa %0,0(%2) \n" " l.xor %1,%0,%3 \n" " l.swa 0(%2),%1 \n" " l.bnf 1b \n" " l.nop \n" : "=&r"(old), "=&r"(tmp) : "r"(p), "r"(mask) : "cc", "memory"); return (old & mask) != 0; } #endif /* __ASM_OPENRISC_BITOPS_ATOMIC_H */ |