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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 | // SPDX-License-Identifier: GPL-2.0 /* * Handler for Realtek 8 byte switch tags * * Copyright (C) 2021 Alvin Šipraga <alsi@bang-olufsen.dk> * * NOTE: Currently only supports protocol "4" found in the RTL8365MB, hence * named tag_rtl8_4. * * This tag has the following format: * * 0 7|8 15 * |-----------------------------------+-----------------------------------|--- * | (16-bit) | ^ * | Realtek EtherType [0x8899] | | * |-----------------------------------+-----------------------------------| 8 * | (8-bit) | (8-bit) | * | Protocol [0x04] | REASON | b * |-----------------------------------+-----------------------------------| y * | (1) | (1) | (2) | (1) | (3) | (1) | (1) | (1) | (5) | t * | FID_EN | X | FID | PRI_EN | PRI | KEEP | X | LEARN_DIS | X | e * |-----------------------------------+-----------------------------------| s * | (1) | (15-bit) | | * | ALLOW | TX/RX | v * |-----------------------------------+-----------------------------------|--- * * With the following field descriptions: * * field | description * ------------+------------- * Realtek | 0x8899: indicates that this is a proprietary Realtek tag; * EtherType | note that Realtek uses the same EtherType for * | other incompatible tag formats (e.g. tag_rtl4_a.c) * Protocol | 0x04: indicates that this tag conforms to this format * X | reserved * ------------+------------- * REASON | reason for forwarding packet to CPU * | 0: packet was forwarded or flooded to CPU * | 80: packet was trapped to CPU * FID_EN | 1: packet has an FID * | 0: no FID * FID | FID of packet (if FID_EN=1) * PRI_EN | 1: force priority of packet * | 0: don't force priority * PRI | priority of packet (if PRI_EN=1) * KEEP | preserve packet VLAN tag format * LEARN_DIS | don't learn the source MAC address of the packet * ALLOW | 1: treat TX/RX field as an allowance port mask, meaning the * | packet may only be forwarded to ports specified in the * | mask * | 0: no allowance port mask, TX/RX field is the forwarding * | port mask * TX/RX | TX (switch->CPU): port number the packet was received on * | RX (CPU->switch): forwarding port mask (if ALLOW=0) * | allowance port mask (if ALLOW=1) * * The tag can be positioned before Ethertype, using tag "rtl8_4": * * +--------+--------+------------+------+----- * | MAC DA | MAC SA | 8 byte tag | Type | ... * +--------+--------+------------+------+----- * * The tag can also appear between the end of the payload and before the CRC, * using tag "rtl8_4t": * * +--------+--------+------+-----+---------+------------+-----+ * | MAC DA | MAC SA | TYPE | ... | payload | 8-byte tag | CRC | * +--------+--------+------+-----+---------+------------+-----+ * * The added bytes after the payload will break most checksums, either in * software or hardware. To avoid this issue, if the checksum is still pending, * this tagger checksums the packet in software before adding the tag. * */ #include <linux/bitfield.h> #include <linux/bits.h> #include <linux/etherdevice.h> #include "dsa_priv.h" /* Protocols supported: * * 0x04 = RTL8365MB DSA protocol */ #define RTL8_4_TAG_LEN 8 #define RTL8_4_PROTOCOL GENMASK(15, 8) #define RTL8_4_PROTOCOL_RTL8365MB 0x04 #define RTL8_4_REASON GENMASK(7, 0) #define RTL8_4_REASON_FORWARD 0 #define RTL8_4_REASON_TRAP 80 #define RTL8_4_LEARN_DIS BIT(5) #define RTL8_4_TX GENMASK(3, 0) #define RTL8_4_RX GENMASK(10, 0) static void rtl8_4_write_tag(struct sk_buff *skb, struct net_device *dev, void *tag) { struct dsa_port *dp = dsa_slave_to_port(dev); __be16 tag16[RTL8_4_TAG_LEN / 2]; /* Set Realtek EtherType */ tag16[0] = htons(ETH_P_REALTEK); /* Set Protocol; zero REASON */ tag16[1] = htons(FIELD_PREP(RTL8_4_PROTOCOL, RTL8_4_PROTOCOL_RTL8365MB)); /* Zero FID_EN, FID, PRI_EN, PRI, KEEP; set LEARN_DIS */ tag16[2] = htons(FIELD_PREP(RTL8_4_LEARN_DIS, 1)); /* Zero ALLOW; set RX (CPU->switch) forwarding port mask */ tag16[3] = htons(FIELD_PREP(RTL8_4_RX, BIT(dp->index))); memcpy(tag, tag16, RTL8_4_TAG_LEN); } static struct sk_buff *rtl8_4_tag_xmit(struct sk_buff *skb, struct net_device *dev) { skb_push(skb, RTL8_4_TAG_LEN); dsa_alloc_etype_header(skb, RTL8_4_TAG_LEN); rtl8_4_write_tag(skb, dev, dsa_etype_header_pos_tx(skb)); return skb; } static struct sk_buff *rtl8_4t_tag_xmit(struct sk_buff *skb, struct net_device *dev) { /* Calculate the checksum here if not done yet as trailing tags will * break either software or hardware based checksum */ if (skb->ip_summed == CHECKSUM_PARTIAL && skb_checksum_help(skb)) return NULL; rtl8_4_write_tag(skb, dev, skb_put(skb, RTL8_4_TAG_LEN)); return skb; } static int rtl8_4_read_tag(struct sk_buff *skb, struct net_device *dev, void *tag) { __be16 tag16[RTL8_4_TAG_LEN / 2]; u16 etype; u8 reason; u8 proto; u8 port; memcpy(tag16, tag, RTL8_4_TAG_LEN); /* Parse Realtek EtherType */ etype = ntohs(tag16[0]); if (unlikely(etype != ETH_P_REALTEK)) { dev_warn_ratelimited(&dev->dev, "non-realtek ethertype 0x%04x\n", etype); return -EPROTO; } /* Parse Protocol */ proto = FIELD_GET(RTL8_4_PROTOCOL, ntohs(tag16[1])); if (unlikely(proto != RTL8_4_PROTOCOL_RTL8365MB)) { dev_warn_ratelimited(&dev->dev, "unknown realtek protocol 0x%02x\n", proto); return -EPROTO; } /* Parse REASON */ reason = FIELD_GET(RTL8_4_REASON, ntohs(tag16[1])); /* Parse TX (switch->CPU) */ port = FIELD_GET(RTL8_4_TX, ntohs(tag16[3])); skb->dev = dsa_master_find_slave(dev, 0, port); if (!skb->dev) { dev_warn_ratelimited(&dev->dev, "could not find slave for port %d\n", port); return -ENOENT; } if (reason != RTL8_4_REASON_TRAP) dsa_default_offload_fwd_mark(skb); return 0; } static struct sk_buff *rtl8_4_tag_rcv(struct sk_buff *skb, struct net_device *dev) { if (unlikely(!pskb_may_pull(skb, RTL8_4_TAG_LEN))) return NULL; if (unlikely(rtl8_4_read_tag(skb, dev, dsa_etype_header_pos_rx(skb)))) return NULL; /* Remove tag and recalculate checksum */ skb_pull_rcsum(skb, RTL8_4_TAG_LEN); dsa_strip_etype_header(skb, RTL8_4_TAG_LEN); return skb; } static struct sk_buff *rtl8_4t_tag_rcv(struct sk_buff *skb, struct net_device *dev) { if (skb_linearize(skb)) return NULL; if (unlikely(rtl8_4_read_tag(skb, dev, skb_tail_pointer(skb) - RTL8_4_TAG_LEN))) return NULL; if (pskb_trim_rcsum(skb, skb->len - RTL8_4_TAG_LEN)) return NULL; return skb; } /* Ethertype version */ static const struct dsa_device_ops rtl8_4_netdev_ops = { .name = "rtl8_4", .proto = DSA_TAG_PROTO_RTL8_4, .xmit = rtl8_4_tag_xmit, .rcv = rtl8_4_tag_rcv, .needed_headroom = RTL8_4_TAG_LEN, }; DSA_TAG_DRIVER(rtl8_4_netdev_ops); MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_RTL8_4); /* Tail version */ static const struct dsa_device_ops rtl8_4t_netdev_ops = { .name = "rtl8_4t", .proto = DSA_TAG_PROTO_RTL8_4T, .xmit = rtl8_4t_tag_xmit, .rcv = rtl8_4t_tag_rcv, .needed_tailroom = RTL8_4_TAG_LEN, }; DSA_TAG_DRIVER(rtl8_4t_netdev_ops); MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_RTL8_4T); static struct dsa_tag_driver *dsa_tag_drivers[] = { &DSA_TAG_DRIVER_NAME(rtl8_4_netdev_ops), &DSA_TAG_DRIVER_NAME(rtl8_4t_netdev_ops), }; module_dsa_tag_drivers(dsa_tag_drivers); MODULE_LICENSE("GPL"); |