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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 | // SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for Sunplus SP7021 * * Copyright (C) 2021 Sunplus Technology Co. */ #include <dt-bindings/clock/sunplus,sp7021-clkc.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/reset/sunplus,sp7021-reset.h> #include <dt-bindings/pinctrl/sppctl-sp7021.h> #include <dt-bindings/gpio/gpio.h> #define XTAL 27000000 / { compatible = "sunplus,sp7021"; model = "Sunplus SP7021"; clocks { extclk: osc0 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <XTAL>; clock-output-names = "extclk"; }; }; soc@9c000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x9c000000 0x400000>; interrupt-parent = <&intc>; clkc: clock-controller@4 { compatible = "sunplus,sp7021-clkc"; reg = <0x4 0x28>, <0x200 0x44>, <0x268 0x04>; clocks = <&extclk>; #clock-cells = <1>; }; intc: interrupt-controller@780 { compatible = "sunplus,sp7021-intc"; reg = <0x780 0x80>, <0xa80 0x80>; interrupt-controller; #interrupt-cells = <2>; }; otp: otp@af00 { compatible = "sunplus,sp7021-ocotp"; reg = <0xaf00 0x34>, <0xaf80 0x58>; reg-names = "hb_gpio", "otprx"; clocks = <&clkc CLK_OTPRX>; resets = <&rstc RST_OTPRX>; #address-cells = <1>; #size-cells = <1>; therm_calib: thermal-calibration@14 { reg = <0x14 0x3>; }; disc_vol: disconnect-voltage@18 { reg = <0x18 0x2>; }; mac_addr0: mac-address0@34 { reg = <0x34 0x6>; }; mac_addr1: mac-address1@3a { reg = <0x3a 0x6>; }; }; pctl: pinctrl@100 { compatible = "sunplus,sp7021-pctl"; reg = <0x100 0x100>, <0x300 0x100>, <0x32e4 0x1C>, <0x80 0x20>; reg-names = "moon2", "gpioxt", "first", "moon1"; gpio-controller; #gpio-cells = <2>; clocks = <&clkc CLK_GPIO>; resets = <&rstc RST_GPIO>; emac_pins: pinmux-emac-pins { sunplus,pins = < SPPCTL_IOPAD(49,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_CLK_OUT,0) SPPCTL_IOPAD(44,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_MAC_SMI_MDC,0) SPPCTL_IOPAD(43,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_MAC_SMI_MDIO,0) SPPCTL_IOPAD(52,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_TXEN,0) SPPCTL_IOPAD(50,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_TXD0,0) SPPCTL_IOPAD(51,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_TXD1,0) SPPCTL_IOPAD(46,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_CRSDV,0) SPPCTL_IOPAD(47,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_RXD0,0) SPPCTL_IOPAD(48,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_RXD1,0) SPPCTL_IOPAD(45,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_RXER,0) SPPCTL_IOPAD(59,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P1_MAC_RMII_TXEN,0) SPPCTL_IOPAD(57,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P1_MAC_RMII_TXD0,0) SPPCTL_IOPAD(58,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P1_MAC_RMII_TXD1,0) SPPCTL_IOPAD(54,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P1_MAC_RMII_CRSDV,0) SPPCTL_IOPAD(55,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P1_MAC_RMII_RXD0,0) SPPCTL_IOPAD(56,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P1_MAC_RMII_RXD1,0) SPPCTL_IOPAD(53,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P1_MAC_RMII_RXER,0) >; sunplus,zerofunc = < MUXF_L2SW_LED_FLASH0 MUXF_L2SW_LED_FLASH1 MUXF_L2SW_LED_ON0 MUXF_L2SW_LED_ON1 MUXF_DAISY_MODE >; }; emmc_pins: pinmux-emmc-pins { function = "CARD0_EMMC"; groups = "CARD0_EMMC"; }; leds_pins: pinmux-leds-pins { sunplus,pins = < SPPCTL_IOPAD(0,SPPCTL_PCTL_G_GPIO,0,SPPCTL_PCTL_L_OUT) >; }; sdcard_pins: pinmux-sdcard-pins { function = "SD_CARD"; groups = "SD_CARD"; sunplus,pins = < SPPCTL_IOPAD(91, SPPCTL_PCTL_G_GPIO, 0, 0) >; }; spi0_pins: pinmux-spi0-pins { sunplus,pins = < SPPCTL_IOPAD(26,SPPCTL_PCTL_G_GPIO,0,0) SPPCTL_IOPAD(28,SPPCTL_PCTL_G_GPIO,0,0) SPPCTL_IOPAD(23,SPPCTL_PCTL_G_PMUX,MUXF_SPI0S_DO,0) SPPCTL_IOPAD(25,SPPCTL_PCTL_G_PMUX,MUXF_SPI0S_DI,0) SPPCTL_IOPAD(27,SPPCTL_PCTL_G_PMUX,MUXF_SPI0S_CLK,0) >; }; uart0_pins: pinmux-uart0-pins { function = "UA0"; groups = "UA0"; }; uart1_pins: pinmux-uart1-pins { sunplus,pins = < SPPCTL_IOPAD(14,SPPCTL_PCTL_G_PMUX,MUXF_UA4_TX,0) SPPCTL_IOPAD(16,SPPCTL_PCTL_G_PMUX,MUXF_UA4_RX,0) >; }; uart2_pins: pinmux-uart2-pins { sunplus,pins = < SPPCTL_IOPAD(16,SPPCTL_PCTL_G_PMUX,MUXF_UA2_TX,0) SPPCTL_IOPAD(17,SPPCTL_PCTL_G_PMUX,MUXF_UA2_RX,0) SPPCTL_IOPAD(18,SPPCTL_PCTL_G_PMUX,MUXF_UA2_RTS,0) SPPCTL_IOPAD(19,SPPCTL_PCTL_G_PMUX,MUXF_UA2_CTS,0) >; }; uart4_pins: pinmux-uart4-pins { sunplus,pins = < SPPCTL_IOPAD(22,SPPCTL_PCTL_G_PMUX,MUXF_UA4_TX,0) SPPCTL_IOPAD(20,SPPCTL_PCTL_G_PMUX,MUXF_UA4_RX,0) SPPCTL_IOPAD(23,SPPCTL_PCTL_G_PMUX,MUXF_UA4_RTS,0) SPPCTL_IOPAD(21,SPPCTL_PCTL_G_PMUX,MUXF_UA4_CTS,0) >; }; }; rstc: reset@54 { compatible = "sunplus,sp7021-reset"; reg = <0x54 0x28>; #reset-cells = <1>; }; rtc: rtc@3a00 { compatible = "sunplus,sp7021-rtc"; reg = <0x3a00 0x80>; reg-names = "rtc"; clocks = <&clkc CLK_RTC>; resets = <&rstc RST_RTC>; interrupts = <163 IRQ_TYPE_EDGE_RISING>; }; spi_controller0: spi@2d80 { compatible = "sunplus,sp7021-spi"; reg = <0x2d80 0x80>, <0x2e00 0x80>; reg-names = "master", "slave"; interrupts = <144 IRQ_TYPE_LEVEL_HIGH>, <146 IRQ_TYPE_LEVEL_HIGH>, <145 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "dma_w", "master_risc", "slave_risc"; clocks = <&clkc CLK_SPI_COMBO_0>; resets = <&rstc RST_SPI_COMBO_0>; pinctrl-names = "default"; pinctrl-0 = <&spi0_pins>; cs-gpios = <&pctl 26 GPIO_ACTIVE_LOW>, <&pctl 28 GPIO_ACTIVE_LOW>; }; spi_controller1: spi@f480 { compatible = "sunplus,sp7021-spi"; reg = <0xf480 0x80>, <0xf500 0x80>; reg-names = "master", "slave"; interrupts = <67 IRQ_TYPE_LEVEL_HIGH>, <69 IRQ_TYPE_LEVEL_HIGH>, <68 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "dma_w", "master_risc", "slave_risc"; clocks = <&clkc CLK_SPI_COMBO_1>; resets = <&rstc RST_SPI_COMBO_1>; spi-max-frequency = <25000000>; status = "disabled"; }; spi_controller2: spi@f600 { compatible = "sunplus,sp7021-spi"; reg = <0xf600 0x80>, <0xf680 0x80>; reg-names = "master", "slave"; interrupts = <70 IRQ_TYPE_LEVEL_HIGH>, <72 IRQ_TYPE_LEVEL_HIGH>, <71 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "dma_w", "master_risc", "slave_risc"; clocks = <&clkc CLK_SPI_COMBO_2>; resets = <&rstc RST_SPI_COMBO_2>; spi-max-frequency = <25000000>; status = "disabled"; }; spi_controller3: spi@f780 { compatible = "sunplus,sp7021-spi"; reg = <0xf780 0x80>, <0xf800 0x80>; reg-names = "master", "slave"; interrupts = <73 IRQ_TYPE_LEVEL_HIGH>, <75 IRQ_TYPE_LEVEL_HIGH>, <74 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "dma_w", "master_risc", "slave_risc"; clocks = <&clkc CLK_SPI_COMBO_3>; resets = <&rstc RST_SPI_COMBO_3>; spi-max-frequency = <25000000>; status = "disabled"; }; uart0: serial@900 { compatible = "sunplus,sp7021-uart"; reg = <0x900 0x80>; interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clkc CLK_UA0>; resets = <&rstc RST_UA0>; pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; }; uart1: serial@980 { compatible = "sunplus,sp7021-uart"; reg = <0x980 0x80>; interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clkc CLK_UA1>; resets = <&rstc RST_UA1>; pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; status = "disabled"; }; uart2: serial@800 { compatible = "sunplus,sp7021-uart"; reg = <0x800 0x80>; interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clkc CLK_UA2>; resets = <&rstc RST_UA2>; pinctrl-names = "default"; pinctrl-0 = <&uart2_pins>; status = "disabled"; }; uart3: serial@880 { compatible = "sunplus,sp7021-uart"; reg = <0x880 0x80>; interrupts = <56 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clkc CLK_UA3>; resets = <&rstc RST_UA3>; status = "disabled"; }; uart4: serial@8780 { compatible = "sunplus,sp7021-uart"; reg = <0x8780 0x80>; interrupts = <134 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clkc CLK_UA4>; resets = <&rstc RST_UA4>; pinctrl-names = "default"; pinctrl-0 = <&uart4_pins>; status = "disabled"; }; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&leds_pins>; system-led { label = "system-led"; gpios = <&pctl 0 GPIO_ACTIVE_HIGH>; default-state = "off"; linux,default-trigger = "heartbeat"; }; }; }; |